0001B30 Search Results

Contextual Info: Data Sheet 200 mW EPITAXIAL PLANAR DIODES Semiconductor Mechanical Dimensions Description Pin 3 Pin 1HC Pin 2 Features • INDUSTRY STANDARD SOT-23 PACKAGE ■ MEETS UL SPECIFICATION 94V-0 ■ PLANAR PROCESS ■ 200 mW POWER DISSIPATION E le c tr ic a l C h a r a c te r is tic s 9

transistor DA3 309

Abstract: APR26 DSP56300 DSP56300FM DSP56301 DSP56301UM DSP56302 DSP56303 DSP56303EVM DSP56303UM
Contextual Info: Freescale Semiconductor Application Note Interfacing Flash Memory with the DSP56300 Family of Digital Signal Processors by Phil Brewer This application note describes how to interface Flash memory to the DSP56300 family of DSPs. This document is a supplement to the DSP56300 24-Bit Digital Signal Processor

Contextual Info: moi _ EDI8F82045C Electronic Designs Inc. Commercial Sixteen Megabit SRAM Module , 2 Megabits x 8 Static RAM CMOS Module Features The EDI8F82045C is a 16 megabit CMOS Static RAM based on four 512Kx8 Static RAMs mounted on a multi-layered epoxy laminate FR4 substrate.

Contextual Info: T fí I Q U I N T S E M I C O N D U C T O R , I N C TB Ü I TQ8103 General Description Its on-chip phase-locked loop PLL generates a stable 622.08 Mb/s reference based upon an external 38.88 MHzTTL reference. The PLL is based on a VCO constructed from integrated reactive

0d108

Abstract: DSP56300 APR26 DSP56300FM DSP56301 DSP56301UM DSP56302 DSP56303 DSP56303EVM DSP56303UM
Contextual Info: Freescale Semiconductor Application Note APR26 Rev. 1, 10/2005 Interfacing Flash Memory with the DSP56300 Family of Digital Signal Processors by Phil Brewer This application note describes how to interface Flash memory to the DSP56300 family of DSPs. This document is a

Contextual Info: CIRCUIT BOARD INDICATOR RED GREEN YELLOW SUPER BRITE 20 mcd LED T-1 3 mm SERIES 5 3 1 1F, 5 3 1 3 F OUTLINE DIMENSIONS FEATURES • Block mounting, height & spacing alignment saves assembly time & cost •*—.21 (5.3) D IA . - • Standoffs prevent flux entrapment