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    /74HC112, Search Results

    /74HC112, Result Highlights (5)

    Part ECAD Model Manufacturer Description Download Buy
    CD74HC112E
    		Texas Instruments High Speed CMOS Logic Dual Negative-Edge-Triggered J-K Flip-Flops with Set and Reset 16-PDIP -55 to 125 Visit Texas Instruments Buy
    CD74HC112NSR
    		Texas Instruments High Speed CMOS Logic Dual Negative-Edge-Triggered J-K Flip-Flops with Set and Reset 16-SO -55 to 125 Visit Texas Instruments Buy
    SN74HC112DR
    		Texas Instruments Dual J-K Negative-Edge-Triggered Flip-Flops With Clear and Preset 16-SOIC -40 to 85 Visit Texas Instruments Buy
    CD74HC112M96
    		Texas Instruments High Speed CMOS Logic Dual Negative-Edge-Triggered J-K Flip-Flops with Set and Reset 16-SOIC -55 to 125 Visit Texas Instruments Buy
    CD74HC112PWR
    		Texas Instruments High Speed CMOS Logic Dual Negative-Edge-Triggered J-K Flip-Flops with Set and Reset 16-TSSOP -55 to 125 Visit Texas Instruments Buy

    /74HC112, Datasheets (24)

    Select Manufacturer
    Part ECAD Model Manufacturer Description Datasheet Type PDF PDF Size Page count
    74HC112
    		Philips Semiconductors Negative-edge trigger Original PDF 90.34KB 15
    74HC112D
    		Philips Semiconductors dual JK flip-flop with set and reset negative-edge trigger Original PDF 109.44KB 15
    74HC112D
    		Unknown Historical semiconductor price guide (US$ - 1998). From our catalog scanning project. Historical PDF 32.93KB 1
    74HC112D,652
    		NXP Semiconductors dual JK flip-flop with set and reset; negative-edge trigger - Description: Dual J-K Flip-Flop with Set and Reset; Negative-Edge Trigger ; Fmax: 66 MHz; Logic switching levels: CMOS ; Output drive capability: +/- 5.2 mA ; Power dissipation considerations: Low Power or Battery Applications ; Propagation delay: 15@5V ns; Voltage: 2.0-6.0 V; Package: SOT109-1 (SO16); Container: Bulk Pack, CECC Original PDF 90.33KB 15
    74HC112D,653
    		NXP Semiconductors dual JK flip-flop with set and reset; negative-edge trigger - Description: Dual J-K Flip-Flop with Set and Reset; Negative-Edge Trigger ; Fmax: 66 MHz; Logic switching levels: CMOS ; Output drive capability: +/- 5.2 mA ; Power dissipation considerations: Low Power or Battery Applications ; Propagation delay: 15@5V ns; Voltage: 2.0-6.0 V; Package: SOT109-1 (SO16); Container: Reel Pack, SMD, 13", CECC Original PDF 90.33KB 15
    74HC112DB
    		Philips Semiconductors dual JK flip-flop with set and reset negative-edge trigger Original PDF 109.44KB 15
    74HC112DB
    		Unknown Historical semiconductor price guide (US$ - 1998). From our catalog scanning project. Historical PDF 32.93KB 1
    74HC112DB,112
    		NXP Semiconductors dual JK flip-flop with set and reset; negative-edge trigger - Description: Dual J-K Flip-Flop with Set and Reset; Negative-Edge Trigger ; Fmax: 66 MHz; Logic switching levels: CMOS ; Output drive capability: +/- 5.2 mA ; Power dissipation considerations: Low Power or Battery Applications ; Propagation delay: 17@5V ns; Voltage: 2.0-6.0 V; Package: SOT338-1 (SSOP16); Container: Tube Original PDF 90.33KB 15
    74HC112DB,118
    		NXP Semiconductors dual JK flip-flop with set and reset; negative-edge trigger - Description: Dual J-K Flip-Flop with Set and Reset; Negative-Edge Trigger ; Fmax: 66 MHz; Logic switching levels: CMOS ; Output drive capability: +/- 5.2 mA ; Power dissipation considerations: Low Power or Battery Applications ; Propagation delay: 17@5V ns; Voltage: 2.0-6.0 V; Package: SOT338-1 (SSOP16); Container: Reel Pack, SMD, 13" Original PDF 90.33KB 15
    74HC112DB-T
    		NXP Semiconductors dual JK flip-flop with set and reset; negative-edge trigger - Description: Dual J-K Flip-Flop with Set and Reset; Negative-Edge Trigger ; Fmax: 66 MHz; Logic switching levels: CMOS ; Output drive capability: +/- 5.2 mA ; Power dissipation considerations: Low Power or Battery Applications ; Propagation delay: 17@5V ns; Voltage: 2.0-6.0 V Original PDF 90.33KB 15
    74HC112DB-T
    		Unknown Historical semiconductor price guide (US$ - 1998). From our catalog scanning project. Historical PDF 32.93KB 1
    74HC112D-T
    		NXP Semiconductors dual JK flip-flop with set and reset; negative-edge trigger - Description: Dual J-K Flip-Flop with Set and Reset; Negative-Edge Trigger ; Fmax: 66 MHz; Logic switching levels: CMOS ; Output drive capability: +/- 5.2 mA ; Power dissipation considerations: Low Power or Battery Applications ; Propagation delay: 15@5V ns; Voltage: 2.0-6.0 V Original PDF 90.33KB 15
    74HC112D-T
    		Unknown Historical semiconductor price guide (US$ - 1998). From our catalog scanning project. Historical PDF 32.93KB 1
    74HC112N
    		Philips Semiconductors dual JK flip-flop with set and reset negative-edge trigger Original PDF 109.44KB 15
    74HC112N
    		Unknown Historical semiconductor price guide (US$ - 1998). From our catalog scanning project. Historical PDF 32.93KB 1
    74HC112N,652
    		NXP Semiconductors dual JK flip-flop with set and reset; negative-edge trigger - Description: Dual J-K Flip-Flop with Set and Reset; Negative-Edge Trigger ; Fmax: 66 MHz; Logic switching levels: CMOS ; Output drive capability: +/- 5.2 mA ; Power dissipation considerations: Low Power or Battery Applications ; Propagation delay: 17@5V ns; Voltage: 2.0-6.0 V; Package: SOT38-4 (DIP16); Container: Bulk Pack, CECC Original PDF 90.33KB 15
    74HC112PW
    		Philips Semiconductors dual JK flip-flop with set and reset negative-edge trigger Original PDF 109.44KB 15
    74HC112PW
    		Unknown Historical semiconductor price guide (US$ - 1998). From our catalog scanning project. Historical PDF 32.93KB 1
    74HC112PW,112
    		NXP Semiconductors dual JK flip-flop with set and reset; negative-edge trigger - Description: Dual J-K Flip-Flop with Set and Reset; Negative-Edge Trigger ; Fmax: 66 MHz; Logic switching levels: CMOS ; Output drive capability: +/- 5.2 mA ; Power dissipation considerations: Low Power or Battery Applications ; Propagation delay: 17@5V ns; Voltage: 2.0-6.0 V; Package: SOT403-1 (TSSOP16); Container: Tube Original PDF 90.33KB 15
    74HC112PW,118
    		NXP Semiconductors dual JK flip-flop with set and reset; negative-edge trigger - Description: Dual J-K Flip-Flop with Set and Reset; Negative-Edge Trigger ; Fmax: 66 MHz; Logic switching levels: CMOS ; Output drive capability: +/- 5.2 mA ; Power dissipation considerations: Low Power or Battery Applications ; Propagation delay: 17@5V ns; Voltage: 2.0-6.0 V; Package: SOT403-1 (TSSOP16); Container: Reel Pack, SMD, 13" Original PDF 90.33KB 15
    SF Impression Pixel

    /74HC112, Price and Stock

    Rochester Electronics LLC

    Rochester Electronics LLC 74HC112FPEL-E

    IC FF JK-TYPE 2-ELE 1-BIT
    Distributors Part Package Stock Lead Time Min Order Qty Price Buy
    DigiKey 74HC112FPEL-E Bulk 10,000 481
    • 1 -
    • 10 -
    • 100 -
    • 1000 $0.62
    • 10000 $0.62
    		Buy Now

    Rochester Electronics LLC 74HC112TELL-E

    IC FF JK-TYPE 2-ELE 1-BIT
    Distributors Part Package Stock Lead Time Min Order Qty Price Buy
    DigiKey 74HC112TELL-E Bulk 8,000 481
    • 1 -
    • 10 -
    • 100 -
    • 1000 $0.62
    • 10000 $0.62
    		Buy Now

    Rochester Electronics LLC SN74HC112N

    IC FF JK-TYPE 2-ELE 1-BIT
    Distributors Part Package Stock Lead Time Min Order Qty Price Buy
    DigiKey SN74HC112N Bulk 6,709 406
    • 1 -
    • 10 -
    • 100 -
    • 1000 $0.74
    • 10000 $0.74
    		Buy Now

    Rochester Electronics LLC 74HC112P-E

    IC FF JK-TYPE 2-ELE 1-BIT
    Distributors Part Package Stock Lead Time Min Order Qty Price Buy
    DigiKey 74HC112P-E Bulk 6,000 481
    • 1 -
    • 10 -
    • 100 -
    • 1000 $0.62
    • 10000 $0.62
    		Buy Now

    Rochester Electronics LLC MC74HC112FR2

    IC FF JK-TYPE 2-ELE 1-BIT
    Distributors Part Package Stock Lead Time Min Order Qty Price Buy
    DigiKey MC74HC112FR2 Bulk 6,000 956
    • 1 -
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    • 100 -
    • 1000 $0.31
    • 10000 $0.31
    		Buy Now
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