NEW DATABASE - 350 MILLION DATASHEETS FROM 8500 MANUFACTURERS
NEW DATABASE - 350 MILLION DATASHEETS FROM 8500 MANUFACTURERS
| Catalog Datasheet Results | Type | Document Tags |
| Abstract: (Processor operating current is 40mA) CompactFlash / Hard Disk Drive Functionality UDMA Modes 0.4 , Windows OS Supports Microsoft PD-DRM UDMA CF Benchmark Numbers UDMA 2 20MB/Sec Reads & 16MB/Sec Writes UDMA 4 35MB/Sec Reads & 28MB/Sec Writes UDMA 4 UDMA 2 0 10 20 30 UDMA 2 UDMA 4 Writes in MB/Sec 16 28 Reads in MB/Sec 20 40 35 3.5" Hard Disk Drive ... | Original |
2 pages, |
udma SHA-256 hard disk toshiba seagate diagram maxtor hard disk drive diagram samsung hdd disk drive diagram HARD DISK diagram seagate hard disk drive diagram SHA-256 abstract |
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| Abstract: interrupt source of PPG is not cleared by uDMA. However at using only PPG (not using uDMA), this bug is not , implement permanent countermeasure (hardware revision). Use the interrupt of PPG but not uDMA. , behavior I2C INTERFACE, Note added Interrupt by uDMA, usage of uDMA Low power consumption mode , hm90480-cm44-10121-3e-corr-x1-02.doc 2 / 5 HWM90480003 HWM90480003 TOP Chapter 3.6 Interrupt by uDMA There might be problems when using uDMA with UART or PPG. 1) Detailed of bug for uDMA transmission Fujitsu found the bug, as uDMA ... | Original |
5 pages, |
MB90488A mb90487a MB90486 485-Series mb90f488b mb90488b MB90487 MB90480 MB90480 abstract |
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| Abstract: internal frequency is 16MHz to guarantee correct working of uDMAC. HWM90470002 HWM90470002 TOP PLL Clock , hm90470-cm44-10115-3e-corr-x1-03.doc 4 / 5 specification as interrupt source of PPG is not cleared by uDMA. However at using only , revision). Use the interrupt of PPG but not uDMA. hm90470-cm44-10115-3e-corr-x1-03.doc 5 / 5 , 12.05.04 1.01 03.08.04 1.02 HWM90470003 HWM90470003 15.11.05 1.03 Restrictions when using uDMAC PLL Clock , Interface, Note added Interrupt by uDMA, restrictions added Transition to standby mode, description ... | Original |
5 pages, |
MB90470 MB90470 abstract |
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| Abstract: flash onboard, 1x IDE 1x IDE 1x EIDE (UDMA-33) 1x EIDE (UDMA-33) 1x EIDE (UDMA-33) 1x EIDE (UDMA-33) 1x EIDE (UDMA-33) 1x EIDE (UDMA-33) 1x EIDE (UDMA-33) Graphic controller ... | Original |
1 pages, |
pcmcia for RS232 PCMCIA Adapter MOPSlcdve Ali M1531 mops 686 amd elan sc520 386SX MOPSlcdgx1 JRC 386 MOPS/520 386 jrc pc 104 386 cpu s3 twister mops PC/104 PC/104 PC/104 abstract |
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| Abstract: Modes 0 6 UDMA Modes 0 4 Transcend Information Inc. 2 Ver 1.0 Transcend 44-Piin IIDE , STOP (Stop UDMA Burst) 25 The host asserts this signal during an UDMA burst to stop the DMA burst. , Data port. -HDMARDY (UDMA ready) When UDMA mode DMA Read is ready, -HDMARDY should be asserted by the host to indicate that the host is ready to receive DMA data-in burst. I HSTROBE (UDMA Strobe) 27 HSTROBE receives the data-out strobe signal from the host for an UDMA burst. IORDY (I ... | Original |
9 pages, |
Transcend Flash Drive DD11 DD10 transcend ultra flash memory transcend flash memory 4gb datasheet abstract |
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| Abstract: MICROCONTROLLER ALL SERIES EIIOS & uDMA APPLICATION NOTE EIIOS & uDMA Revision History Revision , AN-900080-10 AN-900080-10 -2- © Fujitsu Microelectronics Europe GmbH EIIOS & uDMA Warranty and Disclaimer , © Fujitsu Microelectronics Europe GmbH -3- AN-900080-10 AN-900080-10 EIIOS & uDMA Contents Contents , Series. 15 3.2 uDMA Function . 15 3.2.1 uDMA Register ... | Original |
33 pages, |
MB90460 MB90455 MB90435 MB90390 MB90385 FMEMCU-AN-900080-10 MC16LX 16-BIT FMEMCU-AN-900080-10 abstract |
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| Abstract: MICROCONTROLLER ALL SERIES EIIOS & uDMA APPLICATION NOTE EIIOS & uDMA Revision History Revision , MCU-AN-390080-E-V10 MCU-AN-390080-E-V10 -2- © Fujitsu Microelectronics Europe GmbH EIIOS & uDMA Warranty and Disclaimer , © Fujitsu Microelectronics Europe GmbH -3- MCU-AN-390080-E-V10 MCU-AN-390080-E-V10 EIIOS & uDMA Contents Contents , Series. 15 3.2 uDMA Function . 15 3.2.1 uDMA Register ... | Original |
33 pages, |
39-008-0 MCU-AN-390080-E-V10 MC16LX 16-BIT MCU-AN-390080-E-V10 abstract |
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| Abstract: (IN) T13 1410D 1410D ATA/ATAPI-6 Compliant(3.3 V with 5V tolerance) Support DMA mode 0-2, and UDMA , USB Core uP 8032 ATA DMA/ uDMA Control Block Disk Control Registers Block SFlash ... | Original |
2 pages, |
USB to Serial ATA pata INIC1510 embedded firmware INIC-1510 INIC EMBEDDED SRAM INIC-1510 abstract |
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| Abstract: / U.DMA 6 Read 45MByte/s Write 28MByte/s Capacity 128MB 128MB 32GB 8bit, 15bit ECC Host , 0.63�07 Dimensions in mm TDK SSD GBDisk SDG8B2.5inch 1GB32GB 1GB32GB TDK U.DMA6 Solid State Drive SDG8B , Level Cell NAND SSD FAE TDKNAND GBDriver RA8 SLC* / U.DMA ... | Original |
1 pages, |
ESEC-02 2.5 pata drive CF 331 GBDriver RA8 CFG8B 128MB32GB 128MB 128MB32GB abstract |
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| Abstract: / U.DMA 6 Read 45MByte/s Write 28MByte/s Capacity 128MB 128MB 32GB 8bit, 15bit ECC Host , 0.63�07 Dimensions in mm TDK SSD GBDisk SDG8B2.5inch 1GB32GB 1GB32GB TDK U.DMA6 Solid State Drive SDG8B , Level Cell NAND SSD FAE TDKNAND GBDriver RA8 SLC* / U.DMA ... | Original |
1 pages, |
GBDriver CFG8B 28MByte 2.5 pata drive ECC 85 CF 331 1GB32GB 1GB32GB abstract |
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| Abstract | Saved from | Date Saved | File Size | Type | Download |
| Over 1.1 million files (1986-2013): html articles, reference designs, gerber files, chemical content, spice models, programs, code, pricing, images, circuits, parametric data, RoHS data, cross references, pcns, military data, and more. Please note that due to their age, these files do not always format correctly in modern browsers. Disclaimer. |
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| _status,i,data_out; /*-*/ /* setup uDMA ADC channel */ void Init_ADC_uDMA (void) { unsigned long temp = (unsigned long) &ADC_buf1[0]; DSR = 0x00; /* clear uDMA status register */ DSSR = 0x00; /* clear uDMA stop ; /* set uDMA control register */ /* Word transfer, direction: I/O to buffer register */ DER_EN5 = 1; /* enable ADC uDMA */ } /* initialise ADC */ void Init_ADC (void */ } /*-*/ void main(void) { dma_status = 0, Init_ADC_uDMA (); /* setup uDMA for ADC */ Init www.datasheetarchive.com/download/47382200-118670ZC/90340_adc_udma-v11.zip (MAIN.C) |
Fujitsu | 01/02/2012 | 74.39 Kb | ZIP | 90340_adc_udma-v11.zip |
| -file = The ADC_uDMA project is using the uDMA function to read out ADC result buffer. Channel 0 is used, only. ADC is set to continous mode. Via uDMA the results is transfered to a buffer. When transfer count is 0 an end of uDMA interrupt is generated. www.datasheetarchive.com/download/81956714-118773ZC/90470_adc_udma-v11.zip (readme.txt) |
Fujitsu | 01/02/2012 | 48.77 Kb | ZIP | 90470_adc_udma-v11.zip |
| -file = The ADC_uDMA project is using the uDMA function to read out ADC result buffer. Channel 0 is used, only. ADC is set to continuous mode. Via uDMA the results is transfered to a buffer. When transfer count is 0 an end of uDMA interrupt is generated. www.datasheetarchive.com/download/98313540-118785ZC/90480_adc_udma-v11.zip (readme.txt) |
Fujitsu | 01/02/2012 | 47.12 Kb | ZIP | 90480_adc_udma-v11.zip |
| /* THIS SAMPLE CODE IS PROVIDED AS IS AND IS SUBJECT TO ALTERATIONS. FUJITSU */ /* MICROELECTRONICS ACCEPTS NO RESPONSIBILITY OR LIABILITY FOR ANY ERRORS OR */ /* ELIGIBILITY FOR ANY PURPOSES. */ /* (C) Fujitsu Microelectronics Europe GmbH */ /* * * DESCRIPTION: * * uDMA Descriptor Definition * * AUTHOR: Fujitsu Microelectronics Europe .c * */ #include "uDMA.h" /* check Hardware Manual of series to get the correct address for the descriptor www.datasheetarchive.com/download/81956714-118773ZC/90470_adc_udma-v11.zip (uDMA.c) |
Fujitsu | 01/02/2012 | 48.77 Kb | ZIP | 90470_adc_udma-v11.zip |
| /* THIS SAMPLE CODE IS PROVIDED AS IS AND IS SUBJECT TO ALTERATIONS. FUJITSU */ /* MICROELECTRONICS ACCEPTS NO RESPONSIBILITY OR LIABILITY FOR ANY ERRORS OR */ /* ELIGIBILITY FOR ANY PURPOSES. */ /* (C) Fujitsu Microelectronics Europe GmbH */ /* * * DESCRIPTION: * * uDMA Descriptor Definition * * AUTHOR: Fujitsu Microelectronics Europe .c * */ #include "uDMA.h" /* check Hardware Manual of series to get the correct address for the descriptor www.datasheetarchive.com/download/98313540-118785ZC/90480_adc_udma-v11.zip (uDMA.c) |
Fujitsu | 01/02/2012 | 47.12 Kb | ZIP | 90480_adc_udma-v11.zip |
| . /*-*/ #include "mb90470.h" #include "uDMA.h" volatile _direct unsigned int SDRval[6]; /* buffer for EIIOS DMA (void) { unsigned long temp = (unsigned int) &SDRval[0]; /* address of buffer */ /* uDMA register */ DSSR = 0x00; /* no stop request by ressource */ DERH = 0x80; /* enable uDMA for A/DC */ DERL = 0x00; DSR = 0x0; /* clear uDMA status register */ /* uDMA Descriptor in RAM area www.datasheetarchive.com/download/81956714-118773ZC/90470_adc_udma-v11.zip (MAIN.C) |
Fujitsu | 01/02/2012 | 48.77 Kb | ZIP | 90470_adc_udma-v11.zip |
| . /*-*/ #include "mb90480.h" #include "uDMA.h" volatile _direct unsigned int SDRval[6]; /* buffer for EIIOS DMA (void) { unsigned long temp = (unsigned int) &SDRval[0]; /* address of buffer */ /* uDMA register */ DSSR = 0x00; /* no stop request by ressource */ DERH = 0x80; /* enable uDMA for A/DC */ DERL = 0x00; DSR = 0x0; /* clear uDMA status register */ /* uDMA Descriptor in RAM area www.datasheetarchive.com/download/98313540-118785ZC/90480_adc_udma-v11.zip (MAIN.C) |
Fujitsu | 01/02/2012 | 47.12 Kb | ZIP | 90480_adc_udma-v11.zip |
| -g -w 2 -linf ON -lsrc ON -lsec ON -lcros OFF -linc ON -lexp OBJ -pl 60 -pw 100 -tab 8 -cwno -cpu MB90V470 MB90V470 MB90V470 MB90V470 www.datasheetarchive.com/download/81956714-118773ZC/90470_adc_udma-v11.zip (uDMA.opa) |
Fujitsu | 01/02/2012 | 48.77 Kb | ZIP | 90470_adc_udma-v11.zip |
| (3 blocks), uDMA x 4ch, external Interrupts x 10 16-bit timer/counter x 2, 8-bit timer/counter x 2 /D converter: 10 bits x 6 ch, Watchdog timer, WAIT controller (3 blocks), 6 ext. Interrupts, uDMA : 4ch 16-bit /D converter 10bits x 8 ch, Watchdog timer, CS/WAIT controller (3 blocks), uDMA x 4ch 16-bit timer/counter x 2 8 ch, Watchdog timer, CS/WAIT controller (3 blocks), uDMA x 4ch 16-bit timer/counter x 2, 8-bit , Watchdog timer, CS/WAIT controller (3 blocks), uDMA x 4ch 16-bit timer/counter x 2, 8-bit timer x 2, 8-bit www.datasheetarchive.com/download/44408429-946881ZC/tl900_ot.xls |
Toshiba | 13/08/1997 | 23 Kb | XLS | tl900_ot.xls |
| . 90480_adc_irq-v11.zip 46 KB, 25.August 2005 90480_adc_udma This project uses the uDMA transfer function to read out the ADC result buffer. ADC is set to continuous mode 90480_adc_udma-v11.zip 48 KB, 25.August 2005 90480_io This project decrements www.datasheetarchive.com/files/fujitsu/micros dvd 4.0/products/mb904800.htm |
Fujitsu | 17/01/2006 | 11.16 Kb | HTM | mb904800.htm |