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CS8952TIQ Cirrus Logic ETHERNET TRANSCEIVER
CS8130-CSR Cirrus Logic Transmitters/Receivers/Transceivers IC Multi-Standard Infrared Transceiver
CS8130-CSZR Cirrus Logic Transmitters/Receivers/Transceivers IC Multi-Standard Infrared Transceiver
CS8952-CQZR Cirrus Logic Transmitters/Receivers/Transceivers IC 100BASE-TX and 10BASE-T Transceiver
CS8952-IQZR Cirrus Logic Transmitters/Receivers/Transceivers IC 100BASE-TX and 10BASE-T Transceiver
CS8952-CQZ Cirrus Logic Ethernet Transceiver, 1-Trnsvr, CMOS, PQFP100, LEAD FREE, TQFP-100

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transceiver Datasheet

Part Manufacturer Description PDF Type
TRANSCEIVER-MODULE-9-PIN-622-M Tyco Electronics TRANSCEIVER MODULE 9 PIN 622 Mb/s SC SINGLEMODE DUPLEX Scan
TRANSCEIVERSFF2X5GB Infineon Technologies Transceivers by Form-factor MSA - Multimode 850nm VCSEL TRX, (AC/AC coupling), 1.25 GBit/s LC, 2x5, 3.3V Original

transceiver

Catalog Datasheet MFG & Type PDF Document Tags
Abstract: . The DS21Q55 quad multichip module (MCM) features independent transceivers that can be software configured for T1, E1, or J1 operation. Each transceiver is composed of a line interface unit (LIU), framer , transceiver and is pin compatible with the DS21Qx5y product family. The DS21Q59 E1 quad transceiver contains , , Transceiver 1 Back Plane Clock, Transceiver 2 Back Plane Clock, Transceiver 3 Back Plane Clock, Transceiver , Select, Transceiver 1 Chip Select, Transceiver 2 Chip Select, Transceiver 3 Chip Select, Transceiver 4 Dallas Semiconductor
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DS21Q50 DS2155 AN396 SA16 TS16 DS21Q 4/8/16MCK
Abstract: Transceiver DIP SOIC-Wide SOP SSOP 5 DM74AS245 Bipolar-AS Octal 3-STATE Bus Transceivers , -STATE Inverting Bus Transceiver Register DIP SOIC-Wide 5 74F651 FAST Transceivers/Registers DIP , Octal Bus Transceiver and Register DIP SOIC-Wide 5 74ABT652 ABT Octal Transceivers and , Transceiver/Register DIP SOIC-Wide TSSOP 5 74F652 FAST Transceivers/Registers DIP , Logic Products by Function Transceiver Products Logic Product Family Product Description Fairchild Semiconductor
Original
74ACT1284 IEEE1284 74F243 DM74LS243 74ABT245 74AC245 74LCX16500 26series DM74ALS640A 74LCX245
Abstract: Allen-Bradley Ethernet/802.3 Transceiver {Cat. No. 5810-AXMT, -AXMH) To the Installer The box you've just opened contains one of the following transceivers: Cat. no.: Transceiver type: 5810-AXMT 5810-AXMH Thin-wire , /802.3 Transceiver Before You Begin Both the thin-wire and the thick-wire transceivers are composed of , describes how to: â'¢ set the transceiver's Signal Quality Error (SQE) Test jumper (located on the , transceiver. If a barrel connector is: Then you: present not present can install the transceiver in place of -
OCR Scan
hand drill 5810AXMT 5810AXMH 8023 6622-AZTTK
Abstract: DS21Q59 Abstract: The DS21Q55 is a quad multichip module (MCM) device featuring independent transceivers , DS2155 single transceiver and is pin compatible with the DS21Qx5y family of products. The DS21Q59 E1 quad transceiver contains all of the necessary functions for connection to four E1 lines. The DS21Q59 , BPCLK1 O Back Plane Clock, Transceiver 1 X BPCLK2 O Back Plane Clock, Transceiver 2 X BPCLK3 O Back Plane Clock, Transceiver 3 X BPCLK4 O Back Plane Clock Maxim Integrated Products
Original
APP396 abstract for fire alarm app abstract 096MH 192MH
Abstract: Fiber Optic Transceiver Product Selection Appnote 79 by Arun Agarwal Description Selection Criteria This application note provides an overview of the fiber optic transceiver products , sheets can be obtained from the Siemens FO web sites: A wide range of transceiver designs and options , determine the table with the applicable products. Tables 7-12 list the transceiver products by specific application. Table 13 provides a comprehensive list of all the transceiver designs available from Siemens Siemens
Original
V23826-K305-C313 V23826-K305-C353 V23826-K305-C363 v23806-a8-c2 transistor c373 VF-45 c373 k1306 datasheet M130 V23826-K15-C363 V23826-K15-C373 V23826-K305-C13 V23826-K305-C53 V23826-K305-C63 V23826-K305-C73
Abstract: configuration of multiple protocols and data rates for Arria® II GX devices. Each transceiver channel in an Arria II GX device can run at an independent data rate or protocol mode. Within each transceiver channel, the transmitter and receiver channel can run at different data rates. Each transceiver block , transmitter channels within the transceiver block. Each receiver channel contains a dedicated clock data recovery (CDR). This chapter includes the following sections: "Transceiver PLL Configurations" on Altera
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altgx altgx basic mode AIIGX52003-2
Abstract: 3. Configuring Multiple Protocols and Data Rates in a Transceiver Block SIV52003-4.0 Use this chapter to create transceiver instances and understand how to combine transceiver channels. The instances , transceiver blocks, and channels with a Basic (PMA Direct) configuration. This chapter also offers several , the supported data rate range for the ATX PLL, refer to the "Transceiver Performance Specifications" section in the DC and Switching Characteristics chapter. Overview Each transceiver channel in a Altera
Original
OC48 tx 2G transmitter ups basic
Abstract: . (This document also supports the Intel® LXT971 Transceiver.) The LXT971A Transceiver supports , . 12 3.0 Ball and Pin Assignments for Intel® LXT971A 13 4.0 Signal Descriptions for Intel® LXT971A , ® LXT971ATransceiver to 3.3 V Fiber Transceiver. 67 Typical Interface - Intel® LXT971A Transceiver to 5 V Fiber Transceiver. 68 Typical Interface - Intel® LXT971A Transceiver to Triple PECL-to-PECL Intel
Original
DJLXT971ALE WJLXT971ALC WJLXT971ALE ELLXT971ABE WJLXT971ALE.A4 WJLXT971ALC.A4 ELLXT971C ELLXT971ABE.A4 WJLXT971ALC-A4 100BASE-TX 10BASE-T 100BASE-FX 10BASE-T/100BASE-TX RJ-45 DJLXT971ALC
Abstract: transceiver. Washer/standoff: extended length transceivers only SMX Transceiver Configuration The TPM-78 and TPM-1250 transceivers are shipped preconfigured. The FTM-10 transceiver includes a jumper to , " 146.56mm 5.770" 0.00mm Figure 1. Motherboard for SMX Transceiver Standard-length SMX transceivers , Transceiver Installation Different SMX transceivers require varying operating current levels. In particular , example, before the transceiver can be properly installed. The TPM transceivers are supplied with a -
Original
TP-1250 78200se TP-RS485-39 smx connector footprint MTSW-11022-TD-440 motherboard PCB diagram PCLTA-20 TPM/XF-1250 TPT/XF-1250 TP/XF-1250 003-0336-01C
Abstract: Dual Transceiver, 36 pin dip, RX Standby low +15V Dual Transceiver, 36 pin flatpack, RX Standby low +15V Dual Transceiver, 36 pin dip, RX Standby high +15V Dual Transceiver, 36 pin flatpack, RX Standby high +12V D ual Transceiver, 36 pin dip, RX Standby low +12V Dual Transceiver, 36 pin flatpack, RX Standby low +15V, Single Channel Transceiver, 24 pin dip, RX Standby low +15V, Single Channel Transceiver, 24 pin flatpack, RX Standby low 12-15V Single Channel, M ac A ir Universal Transceiver, 24 pin -
OCR Scan
5962-8757905XX 5962-8952203XX 5962-9206103HZX 5962-9206103HUX 5962-9206103HMX Universal IR Remote ic NHI 1509 5962-9206104HNX A3818 5962-8757905YX 5962-8944702XX 5962-8944702YX 5962-8982603XX
Abstract: -state/Non-inverted) Octal Bus Buffer (3-state) Octal Bus Transceiver (3-state) Quad 2-Line To 1-Line Data , -state/Inverted) Octal Bus Buffer (3-state) Octal D-type Registered Transceiver (3-state) Octal D-type Registered Transceiver (Inverting, 3-state) Octal D-type Latch (3-state) Octal D-type Flip-Flop (3-state) Octal Bus Transceiver (3-state) Octal Bus Transceiver/Register (3-state) Octal Bus Transceiver , -Bit Transparent Latch (3-state) 9-Bit Bus Transceiver (Bus Hold) ON Semi MC74LCX00 MC74LCX02 MC74LCX04 -
Original
LCX04 LCX06 LCX07 LCX14 LCX112 LCX126 LCX16244 lcx162245 mc74lcx245 Schmitt Trigger SN74LVCR162245A LCX00 LCX02 LCXU04 LCX05
Abstract: using Stratix V transceivers. It provides the transceiver channel datapath, clocking, and channel , Interlaken This section describes Interlaken link implementation using Stratix V transceivers. It provides , consumption. The PIPE interface in Stratix V transceivers provides an input port, for each transceiver , 4. Transceiver Protocol Configurations in Stratix V Devices SV52005-1.0 This chapter provides the transceiver channel datapath, clocking guidelines, channel placement guidelines, and a brief Altera
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10GBASE-R interlaken gearbox rev pcie Design guide parallel scrambler PCI gearbox interlaken protocol
Abstract: Voltage Node 3.3 3.3 5 3.3 5 3.3 5 3.3 3.3 3.3 Register, Transceiver, 10-Bit LVTTL/GTLP Transceiver with Split LVTTL Port and Feedback Path Driver, Receiver Register, Transceiver, CMOS 18-Bit TTL/GTLP Universal Bus Transceiver Driver, Receiver Register, Transceiver, 17-Bit TTL/GTLP Bus Transceiver with Buffered Clock Driver, Receiver Register, Transceiver, 17-Bit TTL/GTLP Synchronous Bus Transceiver with Buffered Clock Driver, Receiver Register, Transceiver, 16-Bit LVTTL/GTLP Universal Bus Transceiver Driver Fairchild Semiconductor
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receiver driver GTLP10B320 GTLP16612 GTLP16616 GTLP16617 GTLP16T1655 GTLP17T616
Abstract: flow techniques to simplify transceiver implementation. The "Guidelines to Debug Transceiver-Based , , you might be able to use a single transceiver-FPGA clock to provide clocks to the transceiver data , Transceiver Instances" on page 2­7 "Create Reset Logic to Control the FPGA Fabric and Transceivers" on , specific transceiver configurations, you may need additional logic to interface with the transceivers. , Transceiver Architecture chapter. f If you share the same transceiver-FPGA fabric interface clocks for Altera
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verilog code for fibre channel Altera 8b10b linear handbook PRBS23 stratix iv altgx interlaken rtl SIV53002-4
Abstract: link tests for the transceivers in your devices. The Transceiver Toolkit allows you to easily test , receiver of the transceiver. The data obtained is then checked by a data checker to verify any bit errors , transceivers and receivers rather than one. Figure 15­1. Transceiver Link Debugger Test Setup Stratix IV GX , eye opening at the receiver of the transceiver. With this feature, you can tune the PMA settings of , 15. Transceiver Link Debugging Using the Quartus II Software QII53029-10.0.1 This chapter Altera
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transmitter and receiver project AR22 eye-q sweep generator
Abstract: Transceiver. Table 1. Absolute Maximum Ratings Parameter Symbol Min Typ Max Units , termination inside TXN31015D2 Optical Transceiver. The AC coupling is performed inside the TXN31015D2 , definition pins for the TXN31015D2 Optical Transceiver. They are pulled up with a 4.7 K - 10 K W resistor , capacitors are also built into the TXN31015D2 Optical Transceiver. Figure 3. Circuit Diagram for CML , Vcc LSB Internally measured supply voltage in transceiver. Voltage reading is full 16-bit value × Intel
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TXN31015D200XXX 31636 1000BASE-SX 316366 B5000 001US
Abstract: Logic Products by Function Registered Transceiver Products Logic Product Family Product Description Package Voltage Node 29F52 FAST 8-Bit Registered Transceiver DIP SOIC-Wide 5 29F53 FAST 8-Bit Registered Transceiver DIP 5 74ABT543 ABT Octal Registered Transceiver with 3-STATE Outputs SOIC-Wide SSOP TSSOP 5 74ACQ543 FACT Quiet Series Quiet Series Octal Registered Transceiver with 3-STATE Outputs DIP SOIC-Wide 3.3 5 74ACTQ543 Fairchild Semiconductor
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74F543 74LCX543 74LVTH543 74ACQ544 74ACTQ544 74F544
Abstract: board as compared to a 1x9 transceiver. The TXN22020 Optical Transceiver is Class 1 laser safety , Transceiver. Absolute Maximum Ratings Parameter Storage Temperature Relative Humidity Soldering Temperature , between two inputs. AC-coupling capacitors are also built into the TXN22020 Optical Transceiver. Figure 3 , Transceiver. · Chassis ground. The LC "nose" and the TXN22020 Optical Transceiver housing chassis comprise the , prevent ESD from the main chassis ground moving directly to the TXN22020 Optical Transceiver. For good EMI Intel
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3098* intel optical module 1X9 Optical Transceiver 002US TXN220200000
Abstract: . 12 Pin Assignments for Intel® LXT972A 13 Signal Descriptions for Intel® LXT972A , for Intel® LXT972A 32 Intel® LXT972A Transceiver , Pb-Free (RoHS-Compliant) LQFP Package - Intel® LX972A Transceiver. 95 Order Matrix for Intel® LXT972A , "Order Matrix for Intel® LXT972A Transceiver" under Section 11.0, "Product Ordering Information Intel
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WJLXT972ALC WJLXT972ALC.A4 LXT972ALC WJLXT972 DJLXT972ALC.A4 WJLXT97 B5293-01 DJLXT972ALC B3498-03
Abstract: transceiver4 58 F1 LD4 Three-state I/O Local data transceiver 4 59 G2 LA5 , Power Ground 2 L2 LD7 Three-state I/O Local data transceiver 7 3 K3 LDS , enable data out control signal 15 K9 A7 Three-state I/O High drive address transceiver 7 , Three-state I/O High drive data transceiver 7 19 J10 A6 Three-state I/O High drive address transceiver 6 20 J11 D6 Three-state I/O High drive data transceiver 6 21 H10 A5 Cypress Semiconductor
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21H10 48F10 H11D5
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