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Part Manufacturer Description Datasheet BUY
SNJ54S182FK Texas Instruments Look-Ahead Carry Generators 20-LCCC -55 to 125 visit Texas Instruments
SN74S182N Texas Instruments Look-ahead carry generator 16-PDIP 0 to 70 visit Texas Instruments
SN74AS882ADW Texas Instruments 32-Bit Look-Ahead Carry Generator 24-SOIC 0 to 70 visit Texas Instruments
SN74AS882ADWR Texas Instruments 32-Bit Look-Ahead Carry Generator 24-SOIC 0 to 70 visit Texas Instruments
SNJ54S182J Texas Instruments Look-Ahead Carry Generators 16-CDIP -55 to 125 visit Texas Instruments
SN74S182N3 Texas Instruments Look-ahead carry generator 16-PDIP 0 to 70 visit Texas Instruments

snoop ahead

Catalog Datasheet MFG & Type PDF Document Tags

82437VX

Abstract: 430VX : Disable the Snoop Ahead function for SMBA systems, or non-SMBA systems that do not satisfy the conditions listed above. Disabling the Snoop Ahead function will prevent this erratum from occurring. Disabling Snoop Ahead affects PCI-to-memory bandwidth, there is no performance impact to commonly run benchmarks or desk top applications. Note: in a non-SMBA system with Snoop Ahead enabled this erratum has not , arbiter policy changes when the Snoop Ahead function is disabled, the following bits need to be set as
Intel
Original

430VX

Abstract: 82430VX . WORKAROUND: Disable the Snoop Ahead function for SMBA systems, or non-SMBA systems that do not satisfy the conditions listed above. Disabling the Snoop Ahead function will prevent this erratum from occurring. Disabling Snoop Ahead affects PCI-to-memory bandwidth, there is no performance impact to commonly run , /TDX PCISET SPECIFICATION UPDATE Note: in a non-SMBA system with Snoop Ahead enabled this erratum , to arbiter policy changes when the Snoop Ahead function is disabled, the following bits need to be
Intel
Original

82371

Abstract: for PCI to DRAM Writes - Write-Back Forwarding for PCI to DRAM Reads - Pipelined Snoop Ahead - , sustain the highest possible bandwidth to the graphics frame buffer at all frequencies. Using the snoop ahead feature, The TXC allows PCI masters to achieve full PCI bandwidth. For increased system
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82437fx

Abstract: 82437 Dwords - PCI-to-DRAM up to 120 Mbytes/Sec Bandwidth Utilizing Snoop Ahead Feature NAND Tree for , frequencies. Using the snoop ahead feature, the T S C allows PCI m asters to achieve full PCI bandwidth. T h e
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82437MX

Abstract: 430MX Writes - PCI-to-DRAM Posting of 12 Dwords - PCI-to-DRAM up to 120 MB/s Bandwidth Utilizing Snoop Ahead , graphics frame buffer at all frequencies. Using the snoop ahead feature, the M TSC allows PCI masters to
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82437FX

Abstract: 82430FX to 120 Mbytes/Sec Bandwidth Utilizing Snoop Ahead Feature NAND Tree for Board-Level ATE Testing 208 , graphics frame buffer at all frequencies. Using the snoop ahead feature, the TSC allows PCI masters to
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intel DOC

Abstract: 430HX 3 X X Fixed Snoop ahead during PCI read cycle (DP systems) peer 6 29765201 , will be fixed on the A-2 stepping of the 82439HX. 3. Snoop Ahead During PCI Read Cycle (Dual , ) The subsequent snoop ahead hits a modified line. f) The writeback for the modified line is , forwarded to the PCI master that issued the burst read cycle. WORKAROUND: The snoop ahead feature in the , 4 X X X Doc Missing snoop cycle with 32 clock retry and ECC 5 X X X
Intel
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430HX intel DOC snoop ahead U115

cpu Intel pentium pro

Abstract: intel pentium II register commands should be used for transfers that are not CL-aligned and cross the CL boundary. A single snoop is performed on the host bus for MR. Snoop ahead is performed for MRM and MRL and a complete CL is read from , recommended to use MRM or MRL since snoop ahead would provide better overall bandwidth and data streaming , bandwidth is wasted due to the overhead of snoop aheads, and memory efficiency is lowered since a portion , snoop bandwidth. 2. PCI Addressing Non-CL aligned data transfers result in lower bandwidth since
Intel
Original
cpu Intel pentium pro intel pentium II register Intel AP-666 intel pentium pro

VT82C693

Abstract: VT82C596A burst transfer rate - PCI to system memory data streaming up to 132Mbyte/sec - PCI master snoop ahead and snoop filtering - Two lines of CPU to PCI posted write buffers - Byte merging in the write , Memory-Write-Invalid commands to minimize snoop overhead. In addition, advanced features are supported such as snoop ahead, snoop filtering, L1 write-back forward to PCI master, and L1 write-back merged with PCI post , capability for non-stalled CPU read Speculative DRAM read before snoop result Burst read and write
VIA Technologies
Original
VT82C596A VT82C693 apollo proplus timing diagram cpu and bios slot1 VIA Apollo Master DS12885 DMA-33 ATA33 33MB/

VT82C694X

Abstract: Dual Socket 370 VIA VT82C694X burst transfer rate - PCI to system memory data streaming up to 132Mbyte/sec - PCI master snoop ahead and snoop filtering - Two lines of CPU to PCI posted write buffers - Byte merging in the write , such as Memory-Read-Line, Memory-Read-Multiple and Memory-Write-Invalid commands to minimize snoop overhead. In addition, advanced features are supported such as snoop ahead, snoop filtering, L1 write-back , non-stalled CPU read Speculative DRAM read before snoop result Burst read and write operation x
VIA Technologies
Original
VT82C596B VT82C694X Dual Socket 370 VIA VT82C694X PRO133A Dual Socket 370 VIA VT82C694X clock generator gart AGP Host to PCI Bridge DMA-33/66

430TX

Abstract: 82439TX including the Data Path into the same BGA chip. Using the snoop ahead feature, the MTXC allows PCI masters
Intel
Original
82439TX 430TX 82371AB INTEL MTXC

750FX

Abstract: MPC74XX bus 0, and AGP/PCI bus 1 interfaces · Hidden Snoop/Snoop Ahead features with no interference to CPU , page reordering, page merge write and cache line merge write · Prefetch/Read Ahead and Merge Write
Mai Logic
Original
750FX MPC74XX A660BNGE agp in pci mode Articia S 750CX/CX 133MH 66/33MH

APOLLO vt82c580 vpx

Abstract: VT82C585VPX PCI master snoop ahead and snoop filtering Five levels (double-words) of CPU to PCI posted write , PCI master snoop ahead and snoop filtering Five levels (double-words) of CPU to PCI posted write , active · PCI master snoop ahead and snoop filtering · Five levels (double-words) of CPU to PCI posted , PCI interface Synchronous divide-by-two PCI bus interface PCI master snoop ahead and snoop filtering , utilization Supports Flush/Fence commands Supports AGP read snoop host post-write buffer Enhanced Master
VIA Technologies
Original
APOLLO vt82c580 vpx VT82C585VPX SFF-8038 MVP3 VT82C587VP APOLLO 2 DMA/33 100MH 512MB 512KB 256MB

Triple Data Encryption Standard Triple DES

Abstract: Articia Sa · Prefetch/Read Ahead and Merge Write features for CPU, PCI bus 0, and AGP/PCI bus 1 · Four-port concurrency control among CPU, Memory, PCI 0 and AGP/PCI bus 1 interfaces · Hidden Snoop/Snoop Ahead
Mai Logic
Original
Triple Data Encryption Standard Triple DES Articia Sa Cpu bus allocation control articia westinghouse transistors 166MH 166/133/100MH 133/66/33MH

Intel 430vX

Abstract: 430VX high level of performance when used in a SMBA environment. Using the snoop ahead feature, the TVX
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430VX Intel 430vX 82437 82437VX 82438VX 256-KB 512-KB 208-P

rx69

Abstract: VT82C693A data streaming up to 132Mbyte/sec - PCI master snoop ahead and snoop filtering - Two lines of CPU to , such as Memory-Read-Line, Memory-Read-Multiple and Memory-Write-Invalid commands to minimize snoop overhead. In addition, advanced features are supported such as snoop ahead, snoop filtering, L1 write-back , write capability for non-stalled CPU read Speculative DRAM read before snoop result Burst read and
VIA Technologies
Original
rx69 VT82C693A slot AGP pinout VT82C694 via vt82c693a Rx68

fw82840

Abstract: 82840 Snoop Ahead by writing a "1" to register F4h, bit 0. Note: Workaround #2 could have a performance , /W Read Snoop Ahead Disable (RSAD) ­ When this bit is a "1", the MCH will snoop 1 cache line
Intel
Original
fw82840 82840 Intel 8237 82840 mch 1A21 P64H

VT82C416

Abstract: SFF-8038 . 14 6.2.1. Snoop Ahead , Intelligent PCI Bus Controller - 32 bit PCI interface - PCI Master snoop ahead and snoop filtering - , concurrent PCI bus and DRAM/cache accesses. Snoop Ahead and Snoop Filtering mechanisms are implemented to , back to the system before the intended memory access is performed. Snoop filtering and snoop ahead , . Snoop Ahead CPUs with internal writeback cache systems need snoop operations to detect and compare
VIA Technologies
Original
VT82C570M VT82C575M VT82C576M VT82C416 VT82C41 CD4047 pin diagram vt82c570 VT82C577M

PPC750CX

Abstract: cpc710-100 anticipation logic to snoop ahead to the next address. Set PCI local register PCILx_PSWCR [17] to "1" to enable the snoop ahead logic. Ø There have been several changes to the deadlock avoidance logic. The
IBM
Original
CPC710 CPC710-133 PPC750CX cpc710-100 ppc750L IBM host bridge CPC710 IBM25CPC710 CPC710-100

intel 430hx

Abstract: PCI-to-ISA buffer at all frequencies. Using the snoop ahead feature, the TXC allows PCI masters to achieve full PCI
Intel
Original
AP-752 82371SB 82371FB intel 430hx PCI-to-ISA PIIX3 TXC 430HX 8254 TIMER Intel AP-752
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