NEW DATABASE - 350 MILLION DATASHEETS FROM 8500 MANUFACTURERS
NEW DATABASE - 350 MILLION DATASHEETS FROM 8500 MANUFACTURERS
| Catalog Datasheet Results | Type | Document Tags |
| Abstract: LatticeSC/M Family Data Sheet DS1004 DS1004 Version 02.3, January 2010 LatticeSC/M Family Data Sheet Introduction January 2010 Data Sheet DS1004 DS1004 Features 1 to 7.8 Mbits memory True Dual Port/Pseudo Dual Port/Single Port Dedicated FIFO logic for all block RAM 500MHz performance · Additional 240K to 1.8Mbits distributed RAM High Performance FPGA Fabric · 15K to 115K four input Look-up Tables (LUT4s) · 139 to 942 I/Os · 700MHz global clock; 1GHz edge clocks 4 to 32 Hi ... | Original |
243 pages, |
DS1004 PR80C 426 b34 umi u26 SCM15 SC80 SC40 SC25 SC15 SC115 transistor pt42c transistor pt36c PB110C pt36C DS1004 abstract |
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| Abstract: LatticeECP2/M Family Data Sheet DS1006 DS1006 Version 03.6, March 2010 LatticeECP2/M Family Data Sheet Introduction June 2008 Data Sheet DS1006 DS1006 Pre-Engineered Source Synchronous I/O Features · DDR registers in I/O cells · Dedicated gearing logic · Source synchronous standards support SPI4.2, SFI4 (DDR Mode), XGMII High Speed ADC/DAC devices · Dedicated DDR and DDR2 memory support DDR1: 400 (200MHz) / DDR2: 533 (266MHz) · Dedicated DQS support High Logic Density for ... | Original |
393 pages, |
c 4161 DS1006 DS1006 abstract |
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| Abstract: LatticeECP2/M Family Data Sheet DS1006 DS1006 Version 03.3, August 2008 LatticeECP2/M Family Data Sheet Introduction June 2008 Data Sheet DS1006 DS1006 Pre-Engineered Source Synchronous I/O Features · DDR registers in I/O cells · Dedicated gearing logic · Source synchronous standards support SPI4.2, SFI4 (DDR Mode), XGMII High Speed ADC/DAC devices · Dedicated DDR and DDR2 memory support DDR1: 400 (200MHz) / DDR2: 533 (266MHz) · Dedicated DQS support High Logic Density for ... | Original |
386 pages, |
socket 1156 pinout pr77a PR68A CEI 23-50 socket am3 socket pinout CEI 23-50 226 35K capacitor datasheet L33 thermal fuse LFE2M50 marking l33 LFE2M20SE-5FN484C M33 thermal fuse PB58 DS1006 DS1006 DS1006 abstract |
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| Abstract: LatticeECP/EC Family Data Sheet DS1000 DS1000 Version 02.7, February 2008 LatticeECP/EC Family Data Sheet Introduction May 2005 Data Sheet Features - - - - - - Extensive Density and Package Options · 1.5K to 32.8K LUT4s · 65 to 496 I/Os · Density migration supported sysDSPTM Block (LatticeECPTM Versions) · High performance multiply and accumulate · 4 to 8 blocks - 4 to 8 36x36 multipliers or 16 to 32 18x18 multipliers or - 32 to 64 9x9 multipliers Embedded and ... | Original |
163 pages, |
LFEC6E-4FN256C LFEC10 LFEC15 LFEC1E-3T100C LFEC33 DDR400 convolution encoders LFECP10 LFECP15 LFECP20 PB11B PL18B DS1000 BDQS14 DS1000 abstract |
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| Abstract: LatticeECP/EC Family Handbook HB1000 HB1000 Version 03.1, February 2008 LatticeECP/EC Family Handbook Table of Contents February 2008 Section I. LatticeECP/EC Family Data Sheet Introduction Features . 1-1 Introduction . ... | Original |
461 pages, |
8001 SI marking code smd fujitsu MULT18X18 toshiba a315 toshiba 7 pin a215 TN1010 st smd diode marking code aa8 st microelectronics datecode SMD MARKING CODE a09 SMD Light replacement guide PR64A a012 SMD LFEC6E-5T144C HB1000 HB1000 abstract |
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| Abstract: LatticeSC/M Family Data Sheet DS1004 DS1004 Version 01.8, November 2007 LatticeSC/M Family Data Sheet Introduction March 2007 Preliminary Data Sheet DS1004 DS1004 Features High Performance FPGA Fabric · 15K to 115K four input Look-up Tables (LUT4s) · 132 to 942 I/Os · 700MHz global clock; 1GHz edge clocks 8 to 32 High Speed SERDES and flexiPCSTM (per Device) · Performance ranging from 600Mbps to 3.8Gbps · Excellent Rx jitter tolerance (0.8UI at 3.125Gbps) · Low Tx jitter (0.25UI typ ... | Original |
238 pages, |
PR83a PR91A SC40 SC80 SC25 SC15 SC115 SCM15 transistor pt42c PB138 LFSCM3GA80EP1-6FC1152C pb127d PB110C transistor pt36c pr94a diode DS1004 DS1004 DS1004 abstract |
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| Abstract: LatticeSC/M Family Data Sheet DS1004 DS1004 Version 02.1, June 2008 LatticeSC/M Family Data Sheet Introduction January 2008 Data Sheet DS1004 DS1004 Features High Performance FPGA Fabric · 15K to 115K four input Look-up Tables (LUT4s) · 139 to 942 I/Os · 700MHz global clock; 1GHz edge clocks 4 to 32 High Speed SERDES and flexiPCSTM (per Device) · Performance ranging from 600Mbps to 3.8Gbps · Excellent Rx jitter tolerance (0.8UI at 3.125Gbps) · Low Tx jitter (0.25UI typical at 3.125G ... | Original |
237 pages, |
W32 MARKING DS1004 PB124A PL84C PR55D pr94a diode SC115 SC15 SC25 transistor pt42c BA5 904 AF P SCM15 SC80 SC40 pr82a DS1004 abstract |
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| Abstract: ORCA® ORSPI4 Dual SPI4 Interface and High-Speed SERDES FPSC October 2007 Data Sheet Lattice Semiconductor has developed a next-generation FPSC targeted at high-speed data transmission. Built on the Series 4 reconfigurable embedded System-on-a-Chip (SoC) architecture, the ORSPI4 FPSC contains two SPI4.2 interface blocks, a high-speed Memory Controller, four channels of 0.6-3.7 Gbits/s SERDES with 8b/10b encoding and decoding and over 600K programmable system gates all on a single chip ... | Original |
263 pages, |
transistor pt36c L75C L137c l45c l146c L62C l44c datasheet abstract |
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| Abstract: LatticeXP Family Data Sheet DS1001 DS1001 Version 05.1, November 2007 LatticeXP Family Data Sheet Introduction July 2007 Data Sheet DS1001 DS1001 Flexible I/O Buffer Features · Programmable sysIOTM buffer supports wide range of interfaces: - LVCMOS 3.3/2.5/1.8/1.5/1.2 - LVTTL SSTL 18 Class I - SSTL 3/2 Class I, II HSTL15 HSTL15 Class I, III - HSTL 18 Class I, II, III - PCI - LVDS, Bus-LVDS, LVPECL, RSDS Non-volatile, Infinitely Reconfigurable · Instant-on powers up in microsec ... | Original |
130 pages, |
LFXP3C-3QN208 LFXP3C-3TN100I LFXP3C-4TN144C LFXP10 LFXP6C-3TN144I LVCMOS33 DDR333 LVCMOS25 LFXP6 LFXP10C-3F256I LFXP3C-4TN100C LFXP6C-3FN256I LFXP3C-3TN144C DS1001 DS1001 DS1001 DS1001 abstract |
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| Abstract: LatticeECP2MTM SMPTE SDI Evaluation Board User's Guide December 2007 Revision: EB27_01.4 LatticeECP2M SMPTE SDI Evaluation Board User's Guide Lattice Semiconductor Introduction The key circuits inside the LatticeECP2M devices and the features of the SMPTE SDI Evaluation Board help audio and video engineers with prototyping and testing their specific designs. For example, the integration of multi-gigabit serial transceivers and advanced I/O features has enabled the support of m ... | Original |
32 pages, |
Trompeter K23 SOT23 diode U12 c530 smd C475 C537 C458 smd diode u1j pDS4102-DL2 GS4911 C538 diode db3 c248 DB3 c130 J119 CS10-27.000MABJ-UT datasheet abstract |
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