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lpddr2 spec

Catalog Datasheet Results Type PDF Document Tags
Abstract: Semiconductor, Inc. 1/? Agenda Industry Trends: IT & Mobile LPDDR2 Effect on Battery Life DDR3 , Industry Trends: IT & Mobile LPDDR2 Effect on Battery Life DDR3 Effect on Energy Saving SSD Effect on , LPDDR2 Effect on Battery Life DDR3 Effect on Energy Saving SSD Effect on Efficiency Virtualization , Memory Bandwidth Wide I/O 12.8GB/s 9.6GB/s LPDDR2 2ch. Serial IO 6.4GB/s LPDDR2 3.2GB/s , Multi Screen `13 `14 Green LPDDR2 Introduction · From Low-density MDDR to higher density LPDDR2 ... Original
datasheet

53 pages,
5818.19 Kb

Samsung 8Gb MLC intel lpddr2 lp-ddr2 lpddr2 ddr3 power lpddr mobile lpddr2 samsung lpddr2 Mobile RAM samsung SSD samsung toggle ddr2 NAND samsung ddr3 DDR3L lpddr2 lpddr2 samsung LPDDR2 1Gb Memory datasheet abstract
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Abstract: BGA (LPDDR, x16) K = 90-Ball BGA (LPSDR, x32) C = 90-Ball BGA (LPDDR, x32) A = 79-Ball BGA (LPDDR2, x16) I = 134-Ball BGA (LPDDR2, x32) Q = 168-Ball PoP-VFBGA (LPDDR2) R = 216-Ball PoP-VFBGA (LPDDR2) 3 = 240-Ball PoP-VFBGA (LPDDR2) 5= 220-Ball PoP-VFBGA (LPDDR2) 0 = Wafer (KGD) 5 REV 1.0 03 , VDD2 VSS LPDDR2 DQ 3 N/C VDD1 4 N/C N/C 5 N/C N/C 6 N/C N/C 7 N/C N/C 8 N/C N/C 9 , VSSQ DQ30 DQ29 VSSQ DQ26 DQS3_c VDD1 VDDQ DM3 VDD2 DQ31 VDDQ DQ28 DQ27 VDDQ DQ24 DQS3_t LPDDR2 ... Original
datasheet

140 pages,
3075.23 Kb

216-ball 216-ball LPDDR2 HSUL-12 intel lpddr2 lpddr2 lpddr2 DQ calibration LPDDR2 PoP lpddr2 samsung lpddr2 spec HYNIX lpddr2 256mb samsung lpddr2 se 094 LPDDR2 1Gb Memory lpddr2 spec NT6TL16M32AQ/ NT6TL32M16AQ NT6TL16M32AQ/ abstract
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Abstract: are supported. I Part No. Category Density I/O Vddl / Vdd2 / Vddq Spec Status» RoHS I W978F6A W978F6A LPDDR2 256Mb X16 1.8V/-/1.2V 200MHz UD (Q3/-I0) Y W978H6A W978H6A LPDDR2 256Mb X16 1.8V/1.2V/1.2V 200MHz UD Y * Status , speed, smaller die size, and DRAM compatible process. Part No. Category Density I/O Vdd/Vddq Spec {Async , /Vddq Spec Status* RoHS I W948D6F W948D6F LPDDR 256Mb X16 1.8V/ 1.8V 200MHz S P(Q1/'10) Y W948D2F W948D2F LPDDR 256Mb , Accountability, Innovation, Teamwork winband We Deliver Low Power DDR2 SDRAM » Mobile LPDDR2 (Low Power Double ... OCR Scan
datasheet

24 pages,
12285.06 Kb

w25q128bv W25Q32BV application note W25Q64CV W25X64V W948D2F W25X16AV 8x6mm winbond* W25Q LPDDR2 1Gb Memory winbond w25q lpddr2 spec W25X20BL W641GG2IB w25x40v datasheet abstract
datasheet frame
Abstract: ) C = 90-Ball BGA (LPDDR, x32) A = 79-Ball BGA (LPDDR2, x16) I = 134-Ball BGA (LPDDR2, x32) Q = 168-Ball PoP-VFBGA (LPDDR2) R = 216-Ball PoP-VFBGA (LPDDR2) 3 = 240-Ball PoP-VFBGA (LPDDR2) 5= 220-Ball PoP-VFBGA (LPDDR2) 0 = Wafer (KGD) 5 REV 1.1 04/2013 4Gb/8Gb LPDDR2-S4 SDRAM NT6TL128M32AI NT6TL128M32AI(Q , DQ17 DQ19 VSSQ DQ21 DQ23 VSSQ VDDQ DM2 VDD2 VSS LPDDR2 DQ 3 N/C VDD1 4 N/C N/C 5 N/C N/C 6 , DQ28 DQ27 VDDQ DQ24 DQS3_t LPDDR2 CA Power Ground Do Not Use ZQ DQS1_c K DM1 VSS DM0 ... Original
datasheet

154 pages,
3481.71 Kb

NT6TL256T32AQ ELPIDA LPDDR2-S4 ELPIDA mobile dram LPDDR2 Hynix 4Gb LPDDR2 hynix lpddr2 sdram LPDDR 8Gb lpddr2 LPDDR2 1Gb Memory ca9a LPDDR2 SDRAM hynix lpddr2 spec NT6TL128M32 NT6TL128T64AR-G1I NT6TL128M32AI /NT6TL256T32AQ NT6TL128M32AI abstract
datasheet frame
Abstract: ) C = 90-Ball BGA (LPDDR, x32) A = 79-Ball BGA (LPDDR2, x16) I = 134-Ball BGA (LPDDR2, x32) Q = 168-Ball PoP-VFBGA (LPDDR2) R = 216-Ball PoP-VFBGA (LPDDR2) 3 = 240-Ball PoP-VFBGA (LPDDR2) 5= 220-Ball PoP-VFBGA (LPDDR2) 0 = Wafer (KGD) 5 REV 1.0 02/2013 4Gb/8Gb LPDDR2-S4 SDRAM NT6TL128M32AI NT6TL128M32AI(Q , DQ17 DQ19 VSSQ DQ21 DQ23 VSSQ VDDQ DM2 VDD2 VSS LPDDR2 DQ 3 N/C VDD1 4 N/C N/C 5 N/C N/C 6 , DQ28 DQ27 VDDQ DQ24 DQS3_t LPDDR2 CA Power Ground Do Not Use ZQ DQS1_c K DM1 VSS DM0 ... Original
datasheet

153 pages,
3474.31 Kb

Elpida LPDDR2 Memory ELPIDA LPDDR2-S4 HSUL-12 LPDDR2 1Gb Memory LPDDR2 216 lpddr2 DQ calibration Mobile LPDDR2 NT6TL128T64A5-G2 NT6TL128M32 NT6TL256T32AQ-G2 NT6TL256T32AQ-G1 elpida lpddr2 NT6TL128T64AR-G0 NT6TL128M32AI /NT6TL256T32AQ NT6TL128M32AI abstract
datasheet frame
Abstract: , x16) K = 90-Ball BGA (LPSDR, x32) C = 90-Ball BGA (LPDDR, x32) A = 79-Ball BGA (LPDDR2, x16) I = 134-Ball BGA (LPDDR2, x32) Q = 168-Ball PoP-VFBGA (LPDDR2) R = 216-Ball PoP-VFBGA (LPDDR2) 3 = 240-Ball PoP-VFBGA (LPDDR2) 0 = Wafer (KGD) Note1: T =Dual Die Package (DDP) Note2: F = Quartic Die Package (QDP , balls through the package LPDDR2 12x12 PoP 1-channel 2x32 package ballout 1 2 3 4 5 6 A B C D E F G H J , Mask: For LPDDR2 devices that do not support the DNV feature, DM is the input mask signal for write ... Original
datasheet

135 pages,
3155.24 Kb

216-ball ELPIDA LPDDR2 ELPIDA LPDDR2-S4 Hynix 4Gb LPDDR2 LPDDR2 1Gb Memory LPDDR2 2Gb Memory lpddr2 spec HYNIX LPDDR2 SDRAM elpida NT6TL64M32AQ lpddr2-s2 NT6TL64M32AQ -G1 Elpida LPDDR2 Memory hynix lpddr2 sdram NT6TL64M32AQ abstract
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Abstract: of the electrophoretic display function. The i.MX50 supports DDR2, LPDDR2, and LPDDR1 DRAM at clock , and external memory. The i.MX50 supports many types of external memory devices, including DDR2, LPDDR2 , Kbyte) · External memory interfaces: - 16/32-bit DDR2-533 DDR2-533, LPDDR2-533, or LPDDR1-400 LPDDR1-400 up to a total of 2 , 168-FBGA 168-FBGA LPDDR2 DRAM memory only. It is not possible to support LPDDR1 or DDR2 on the i.MX50 PoPBGA. · i.MX50 PoPBGA was designed to accommodate a combined LPDDR2 / eMMC PoP memory. The PoP eMMC device uses ... Original
datasheet

137 pages,
1516.2 Kb

eMMC 4.5 emmc 4.5 samsung emmc 4.5 spec eMMC memory eMMC PoP LPDDR1-400 lpddr2 spec samsung eMMC lpddr2 pcb design samsung* lpddr2* pop package eMMC 4.4 emmc spec lpddr2 emmc IMX50CEC MCIMX50 IMX50CEC abstract
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Abstract: electrophoretic display function. The i.MX50 supports DDR2, LPDDR2, and LPDDR1 DRAM at clock rate up to 266 MHz to , i.MX50 supports many types of external memory devices, including DDR2, LPDDR2, LPDDR1, NOR Flash, PSRAM , memory interfaces: - 16/32-bit DDR2-533 DDR2-533, LPDDR2-533, or LPDDR1-400 LPDDR1-400 up to a total of 2 GByte - 8-bit , 168-FBGA 168-FBGA LPDDR2 DRAM memory only. It is not possible to support LPDDR1 or DDR2 on the i.MX50 PoPBGA. · i.MX50 PoPBGA was designed to accommodate a combined LPDDR2 / eMMC PoP memory. The PoP eMMC device uses ... Original
datasheet

134 pages,
1536.55 Kb

"eMMC" Thermal Impedance lpddr2 samsung eMMC 4.41 eMMC powerdown emmc 4.5 spec samsung emmc 4.4 standard jedec lpddr2 emmc samsung* lpddr2* pop package emmc 4.5 spec 153 ball eMMC memory eMMC PoP 153 ball eMMC memory 0.8 IMX50CEC MCIMX50 IMX50CEC abstract
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Abstract: The i.MX50 supports DDR2, LPDDR2, and LPDDR1 DRAM at clock rate up to 266 MHz to enable a range of , i.MX50 supports many types of external memory devices, including DDR2, LPDDR2, LPDDR1, NOR Flash, PSRAM , memory interfaces: - 16/32-bit DDR2-533 DDR2-533, LPDDR2-533, or LPDDR1-400 LPDDR1-400 up to a total of 2 GByte - 8-bit , UART2_CTS UART2_RTS Notes on Package Differences · The i.MX50 PoPBGA package supports 168-FBGA 168-FBGA LPDDR2 DRAM , designed to accommodate a combined LPDDR2 / eMMC PoP memory. The PoP eMMC device uses the SD3_DATA[7:0 ... Original
datasheet

135 pages,
1527.9 Kb

emmc 4.5 spec emmc 4.5 samsung eMMC 4.5 emmc 4.41 spec eMMC 4.4 eMMC "thermal impedance" eMMC impedance eMMC powerdown samsung emmc boot Samsung eMMC 4.51 153 ball eMMC memory Samsung EMMC "boot mode" lpddr2 spec IMX50CEC MCIMX50 IMX50CEC abstract
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Abstract: , including DDR3, low voltage DDR3, LPDDR2, NOR Flash, PSRAM, cellular RAM, and managed NAND, including eMMC , LPDDR2-800 channels - 16/32-bit NOR Flash. - 16/32-bit PSRAM, Cellular RAM (32 bits or less) Each i.MX , /32-bit DDR3-800 DDR3-800 or LPDDR2-800 · Supports up to 2 GByte DDR memory space The On-Chip OTP controller , LPDDR2 DDR3 - Worst case, assuming all SOC I/O operating at 1.8V. NVCC33 NVCC33_IO must always be greater than ... Original
datasheet

105 pages,
881.53 Kb

EB792 emmc 4.3 standard jedec eMMC 4.41 application note imx 179 IMX6 imx6 uart interrupt imx6sl Sony "IMX 175" CMOS sony IMX cmos sony IMX 179 USB HSIC sony imx 175 sony CMOS sensor imx 136 datasheet abstract
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