NEW DATABASE - 350 MILLION DATASHEETS FROM 8500 MANUFACTURERS
| Part | Manufacturer | Description | Samples | Ordering |
| Part | Manufacturer | Description | Type | Ordering |
| L146CB | N/A | Shortform IC and Component Datasheets (Plus Cross Reference Data) |
1 pages, |
Scan | |
| L146CT | N/A | Shortform IC and Component Datasheets (Plus Cross Reference Data) |
1 pages, |
Scan | |
| L146CTB | N/A | Shortform IC and Component Datasheets (Plus Cross Reference Data) |
1 pages, |
Scan | |
| Catalog Datasheet Results | Type | Document Tags |
| Abstract: ORCA® ORSPI4 Dual SPI4 Interface and High-Speed SERDES FPSC October 2007 Data Sheet Lattice Semiconductor has developed a next-generation FPSC targeted at high-speed data transmission. Built on the Series 4 reconfigurable embedded System-on-a-Chip (SoC) architecture, the ORSPI4 FPSC contains two SPI4.2 interface blocks, a high-speed Memory Controller, four channels of 0.6-3.7 Gbits/s SERDES with 8b/10b encoding and decoding and over 600K programmable system gates all on a single chip ... | Original |
263 pages, |
L74c transistor pt36c L137c l146c l45c L62C l44c datasheet abstract |
| Abstract: ORCA® ORSPI4 Dual SPI4 Interface and High-Speed SERDES FPSC November 2003 Preliminary Data Sheet Lattice Semiconductor has developed a next-generation FPSC targeted at high-speed data transmission. Built on the Series 4 reconfigurable embedded System-on-a-Chip (SoC) architecture, the ORSPI4 FPSC contains two SPI4.2 interface blocks, a high-speed Memory Controller, four channels of 0.6-3.7 Gbits/s SERDES with 8b/10b encoding and decoding and over 600K programmable system gates all on ... | Original |
242 pages, |
l165c NEC AC38 L144C R13C transistor 30945 P802 ORT82G5 ORLI10G OR4E06 IC L44C DATASHEET l200c L235C L41C 3002x pt36C datasheet abstract |
| Abstract: ORCA® ORSPI4 Dual SPI4 Interface and High-Speed SERDES FPSC February 2005 Data Sheet Lattice Semiconductor has developed a next-generation FPSC targeted at high-speed data transmission. Built on the Series 4 reconfigurable embedded System-on-a-Chip (SoC) architecture, the ORSPI4 FPSC contains two SPI4.2 interface blocks, a high-speed Memory Controller, four channels of 0.6-3.7 Gbits/s SERDES with 8b/10b encoding and decoding and over 600K programmable system gates all on a single chi ... | Original |
261 pages, |
L239C au43 P802 ORT82G5 ORLI10G OR4E06 l100c L235C pt36C pt31c l54c L74c L62C verilog code of prbs pattern generator L135 datasheet abstract |
| Abstract: ORCA® ORSPI4 Dual SPI4 Interface and High-Speed SERDES FPSC May 2009 Data Sheet Lattice Semiconductor has developed a next-generation FPSC targeted at high-speed data transmission. Built on the Series 4 reconfigurable embedded System-on-a-Chip (SoC) architecture, the ORSPI4 FPSC contains two SPI4.2 interface blocks, a high-speed Memory Controller, four channels of 0.6-3.7 Gbits/s SERDES with 8b/10b encoding and decoding and over 600K programmable system gates all on a single chip. ... | Original |
263 pages, |
transistor l144c transistor 30945 R13C pt35c P802 ORT82G5 ORLI10G OR4E06 L41C L89C l146c L202C L235C pt36C datasheet abstract |
| Abstract: Transistor - Diode Cross Reference - H.P. Part Numbers to JEDEC Numbers Part Num. 1820-0225 1820-0240 1820-0352 1820-1804 1821-0001 1821-0002 1821-0006 1850-0062 1850-0064 1850-0075 1850-0076 1850-0093 1850-0099 1850-0126 1850-0137 1850-0150 1850-0151 1850-0154 1850-0156 1850-0170 1850-0172 1850-0173 1850-0181 1850-0194 1850-0406 1850-0441 1851-0024 1851-0025 1851-0037 1851-0041 1853-0007 1853-0008 1853-0012 1853-0013 1853-0014 1853-0019 1853-0023 1853-00 ... | Original |
143 pages, |
2N3055 TOSHIBA 2N3773 TOSHIBA diode cross reference C3207 transistor toshiba f630 transistor C3207 c5088 transistor datasheet abstract |
| Part | Manufacturer | Description | Shortform Datasheet | Ordering |
| L146C | SGS-Ates | Adjustable Positive Voltage Regulator | ||
| L146CB | N/A | Adjustable Positive Voltage Regulator - 2.0V to 77V, Line/Load Reg .15/.2 % max | ||
| L146CT | N/A | Adjustable Positive Voltage Regulator - 2.0V to 77V, Line/Load Reg .15/.2 % max |