NEW DATABASE - 350 MILLION DATASHEETS FROM 8500 MANUFACTURERS
NEW DATABASE - 350 MILLION DATASHEETS FROM 8500 MANUFACTURERS
| Catalog Datasheet Results | Type | Document Tags |
| Abstract: identical to the HC/HCT 107 but differs in terminal assignment and in some parametric limits. The 54HCT 54HCT , 100%) - FUNCTIONAL DIAGRAM TEST CONDITIONS HC/HCT V,N HC HCT LIMITS , UNITS CHARACTERISTIC SYMBOL Vcc HC HCT 54HC 54HCT 54HCT V Min. Max. Min. Max. Min. Max. Min. Max. , 100%) 92CS- 92CS-Ï696 5R2 FUNCTIONAL DIAGRAM TEST CONDITIONS HC/HCT V,N HC HCT , tests in the beginning of this section. HCT INPUT LOADING TABLE INPUT UNIT LOAD* All 0.3 *Unit load ... | OCR Scan |
2 pages, |
54LS 54HC HCT CMOS logic family specifications CMOS Logic Family Specifications HCT CMOS family characteristics HC CMOS family characteristics CD54HC73/3A D54HCT73/3A RCA-CD54HC73 CD54HCT73 54HCT CD54HC73/3A abstract |
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| Abstract: with black dots are tested 100%) TEST CONDITIONS HC/HCT VlN HC HCT LIM , CHARACTERISTIC SYMBOL Ver HC HCT 54HC 54HCT 54HCT UNITS V Min. Max. Min. Max. Min. Max. Min. Max. Propagation , Current Icc 25° C 6 - - 6, 0 - - 2. -55° C 6 - - 6,0 - - 40. +125°C HCT INPUT LOADING ... | OCR Scan |
1 pages, |
CD54HCT32 54HC RCA-CD54HC32 CD54HC32/3A CD54HCT32/3A 92CS-36753 RCA-CD54HC32 abstract |
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| Abstract: HC/HCT V,N HC HCT LIMITS UNITS CHARACTERISTICS Vdd Vo lo Vcc or GND VIL or Vih V,L , CONDITIONS 25° C -55° C lo +125° C UNITS Vcc HC HCT 54HC 54HCT 54HCT V Min. Max. Min. Max. Min. , (Limits with black dots (•) are tested 100%) TEST CONDITIONS HC/HCT V,„ HC HCT , by-type static tests combined with the standard static tests in the beginning of this section. HCT INPUT , the ZE output to any input of an additional HC/HCT280 parity checker. 2 EVEN E 000 92CS J&4II ... | OCR Scan |
2 pages, |
hct273 CD54HCT273 54HC CD54HC273/3A CD54HCT273/3A RCA-CD54HC273 9SCS-36 CD54HC273/3A abstract |
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| Abstract: 100%) TEST CONDITIONS HC/HCT V„ HC HCT LIMITS UNITS CHARACTERISTICS VOD , CONDITIONS 25' C -55° C to +125° C UNITS Vcc HC HCT 54HC 54HCT 54HCT V Min. Max. Min. Max. Min. , DIAGRAM TEST CONDITIONS HC/HCT V,M HC HCT LIMITS UNITS CHARACTERIST CS VDD , section. HCT INPUT LOADING TABLE INPUT UNIT LOAD* All 1.5 "Unit load is Alec limit specified in Static , beginning of this section. HCT INPUT LOADING TABLE INPUT UNIT LOAD* Ds 0.2 D„ 0.3 PL, MR 1.5 STcp ... | OCR Scan |
2 pages, |
CD54HC597 8 bit shift register with 9 V vcc 54HC CD54HC583/3A CD54HCT583/3A CD54HC583 CD54HCT583 CD54HC583/3A abstract |
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| Abstract: (Limits with black dots , ) 25 >C _ 55 C to +125 C CHARACTERISTIC SYMBOL Vcc HC HCT 54HC 54HCT 54HCT UNITS V Min. Max. Min. , (Limits with black dots (•) are tested 100%) TEST CONDITIONS HC/HCT V,N HC HCT , tests in the beginning of this section. HCT INPUT LOADING TABLE INPUT UNIT LOAD* MR 0 0.65 0.5 'Unit , standard static tests in the beginning of this section. hct input loading table input unit LOAD* ... | OCR Scan |
2 pages, |
CD54HCT4020 CD54HC4020 54hc binary counters 54HC CD54HC4020/3A CD54HCT4020/3A 92CS-25053R4 CD54HC4020/3A abstract |
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| Abstract: Electrical Characteristics (Limits with black dots w are tested 100%) TEST CONDITIONS HC/HCT V,N HC HCT LIMITS UNITS CHARACTERISTICS VOD V0 lo Vccor GND V,L or Vih V,L or Vih MIN. , HC/HCT v,„ HC HCT LIMITS UNITS CHARACTERISTICS VDD Vo lo Vcc or GND v,u or V,h V,L , HCT INPUT LOADING TABLE The complete static electrical test specification consists of the above , CHARACTERISTICS (Cu = 50 pF, Input t, t, = 6 ns) 25 >C -55° C to +125°C CHARACTERISTIC SYMBOL Vcc HC ... | OCR Scan |
2 pages, |
CD54HCT688 CD54HC688 CD54HC688/3A CD54HCT688/3A CD54HC688 abstract |
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| Abstract: ioo%> FUNCTIONAL DIAGRAM TEST CONDITIONS HC/HCT V,„ HC HCT LIM ITS UNITS , UNITS CHARACTERISTIC SYMBOL Vcc HC HCT 54HC 54HCT 54HCT V Min. Max. Min. Max. Min. Max. Min. Max. , FUNCTIONAL DIAGRAM (Limits with black dots (.) are tested 100%) TEST CONDITIONS HC/HCT V,„ HC HCT LIMITS UNITS CHARACTERISTICS VDD Vo lo Vcc or GND V,L or Vih V1L or V,h MIN. MAX. , beginning of this section. HCT INPUT LOADING TABLE INPUT UNIT LOAD* A0-A3, B0-B3 and (A=B) in 1.5 (A>B ... | OCR Scan |
2 pages, |
CD54HCT85 54HC D54HC85/3 CD54HCT85/3A RCA-CD54HC85 D54HC85/3 abstract |
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| Abstract: HC/HCT V,N HC HCT LIMITS UNITS CHARACTERISTICS VOD Vo lo Vcc or GND V,L or V,H V«. , CONDITIONS 25° C -55° C to+125° C UNITS CHARACTERISTIC SYMBOL Vcc HC HCT 54HC 54HCT 54HCT V Min. , FUNCTIONAL DIAGRAM (Limits with black dots (•) are tested 100%) TEST CONDITIONS HC/HCT V,N HC HCT LIMITS UNITS CHARACTERISTICS VDD Vo lo Vcc or GND V,L or V,h Vh. or Vih MIN. MAX. , 160. +125°C HCT INPUT LOADING TABLE The complete static electrical test specification ... | OCR Scan |
2 pages, |
CD54HCT123 54HC 3852r CD54HC123/3A CD54HCT123/3A RCA-CD54HC123 92CS- CD54HC123/3A abstract |
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| Abstract: CONDITIONS HC/HCT VIN HC HCT LIMITS UNITS CHARACTERISTICS VDD Vo lo Vcc or GND , -55°C to +125°C CHARACTERISTIC SYMBOL Vcc HC HCT 54HC 54HCT 54HCT UNITS V Min. Max. Min. Max. Min. , hc/hct V,N hc hct limits units characteristics Vpt> V0 lo Vcc or gnd V,L or Vih V,L , HCT INPUT LOADING TABLE INPUT UNIT LOAD* MR 1.2 CP 0.25 ENABLE 0.5 "Unit load is Alec limit , tests combined with the standard static tests in the beginning of this section. hct input loading table ... | OCR Scan |
2 pages, |
54HC 93C39-5 ICE 3b502 CD54HC4518/3A CD54HCT4518/3A CD54HC4518 CD54HCT4518 CD54HC4518/3A abstract |
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| Abstract: ) FUNCTIONAL DIAGRAM TEST CONDITIONS HC/HCT V,„ HC HCT LIMITS UNITS , C -55° C to +125°C UNITS CHARACTERISTIC SYMBOL Vcc HC HCT 54HC 54HCT 54HCT V Min. Max Min. , hc/hct VIN hc hct limits units characteristics VDO Vo lo Vcc or gnd V,L orViH V,L or , , 0 - - 8« fiA -55° C 6 - - 6, 0 160. +125°C HCT INPUT LOADING TABLE The complete , tests combined with the standard static tests in the beginning of this section. hct input loading table ... | OCR Scan |
2 pages, |
CD54HCT153 54HC CD54HC153/3A CD54HCT153/3A RCA-CD54HC153 92CS-39432 CD54HC153/3A abstract |
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| Harris AnswerFAX - CD54/74HC/HCT160, CD54/74HC/HCT161, CD54/74HC/HCT162, CD54/74HC/HCT163 AnswerFAX (407) 724-7800 Use document number 1550 CD54/74HC/HCT160, CD54/74HC/HCT161, CD54/74HC/HCT162, CD54/74HC/HCT163 High-Speed CMOS Logic, Presettable Counters (10 pages) (AnswerFAX Only) Document # 1550 AnswerFAX is Harris' fax response system. It gives you access to a library of the latest data sheets, application notes and other information on Harris products which are www.datasheetarchive.com/files/harris/data/fn/fn1/fn1550/index.htm |
Harris | 15/08/1997 | 2.57 Kb | HTM | index.htm |
| 74HC_HCT4518_CNV_2 74HC/HCT4518 Dual synchronous BCD counter The 74HC/HCT4518 are high-speed Si-gate CMOS devices and are pin compatible with the '4518' of the '4000B 4000B 4000B 4000B' series. They are specified in compliance with JEDEC standard no. 7A. The 74HC/HCT4518 are Marking * Chips on Wafer, Pre-Sawn, On FFC - RFS HC/T www.datasheetarchive.com/files/philips/pip/74hc_hct4518_cnv_2.html |
Philips | 14/02/2002 | 8.08 Kb | HTML | 74hc_hct4518_cnv_2.html |
| SGS-THOMSON | HC/HCT: HIGH SPEED CMOS HC/HCT: HIGH SPEED CMOS Document Number: 341 Date Update: 19/02/98 Pages: 6 The document is available in the following formats: Portable Document Format and Raw Text Format www.datasheetarchive.com/files/stmicroelectronics/stonline/books/all/341.htm |
STMicroelectronics | 23/02/1998 | 0.83 Kb | HTM | 341.htm |
| 74HC_HCT00_CNV_2 74HC/HCT00 Quad 2-input NAND gate The 74HC/HCT00 are high-speed Si-gate CMOS devices and are pin compatible with low power Schottky TTL (LSTTL). They are specified in compliance with JEDEC standard no. 7A. The 74HC/HCT00 provide the NAND NAND None TTL HC/T HC/T None 15 to 50 TTL None www.datasheetarchive.com/files/philips/pip/74hc_hct00_cnv_2-v1.html |
Philips | 14/02/2002 | 30.07 Kb | HTML | 74hc_hct00_cnv_2-v1.html |
| Logic Switching Levels 74HCU04D 74HCU04D 74HCU04D 74HCU04D Plastic Other Other HC/T HC/T HC/T Inverters Plastic Plastic 15 to 50 15 to 50 HC/T None 14 None Inverters Plastic Plastic Low Low 15 to 50 15 to 50 HC/T HC/T Other Other CMOS CMOS 74HCU04DB 74HCU04DB 74HCU04DB 74HCU04DB Inverters 15 to 50 CMOS CMOS Inverters Inverters Low Low Plastic Plastic HC/T 14 www.datasheetarchive.com/files/philips/pip/74hcu04_cnv_2-v1.html |
Philips | 14/02/2002 | 19.37 Kb | HTML | 74hcu04_cnv_2-v1.html |
| HC/HCT - High-Speed CMOS HC/HCT - High-Speed CMOS For very low-power logic requirements, TI offers a full family of HC/HCT logic. This family contains over 110 functions including gates, flip-flops, drivers, counters, multiplexers, transceivers, and registered transceivers. The HC family offers CMOS compatible inputs, and the HCT family offers TTL compatible inputs www.datasheetarchive.com/files/texas-instruments/sc/docs/asl/families/hct.htm |
Texas Instruments | 11/02/1997 | 4.29 Kb | HTM | hct.htm |
| 74HC_T00 74HC/HCT00 Quad 2-input NAND gate The 74HC/HCT00 are high-speed Si-gate CMOS devices and are pin compatible with low power Schottky TTL (LSTTL). They are specified in compliance with JEDEC standard no. 7A. The 74HC/HCT00 provide the 2 Gates TTL 5 Volt+ None None 15 to 50 TTL 15 to 50 HC/T HC/T www.datasheetarchive.com/files/philips/pip/74hc_t00.html |
Philips | 14/02/2002 | 29.36 Kb | HTML | 74hc_t00.html |
| 74HC_HCT02_CNV_2 74HC/HCT02 Quad 2-input NOR gate The 74HC/HCT02 are high-speed Si-gate CMOS devices and are pin compatible with low power Schottky TTL (LSTTL). They are specified in compliance with JEDEC standard no. 7A. The 74HC/HCT02 provide the Volt+ None HC/T HC/T None 15 to 50 15 to 50 NOR Other None www.datasheetarchive.com/files/philips/pip/74hc_hct02_cnv_2-v1.html |
Philips | 14/02/2002 | 29 Kb | HTML | 74hc_hct02_cnv_2-v1.html |
| 74HC_HCT11_CNV_2 74HC/HCT11 Triple 3-input AND gate The 74HC/HCT11 are high-speed Si-gate CMOS devices and are pin compatible with low power Schottky TTL (LSTTL). They are specified in compliance with JEDEC standard no. 7A. The 74HC/HCT11 provide the 3 Series Series Speed 74HC11D Plastic Low HC/T HC/T 15 to www.datasheetarchive.com/files/philips/pip/74hc_hct11_cnv_2-v1.html |
Philips | 14/02/2002 | 28.57 Kb | HTML | 74hc_hct11_cnv_2-v1.html |
| 74HC_HCT688_CNV_2 74HC/HCT688 8-bit magnitude comparator The 74HC/HCT688 are high-speed Si-gate CMOS devices and are pin compatible with low power Schottky TTL (LSTTL). They are specified in compliance with JEDEC standard no. 7A. The 74HC/HCT688 are 8 74HC688D 20 Other HC/T HC/T 15 to 50 15 to 50 TTL Low Power www.datasheetarchive.com/files/philips/pip/74hc_hct688_cnv_2-v1.html |
Philips | 14/02/2002 | 29.54 Kb | HTML | 74hc_hct688_cnv_2-v1.html |