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detailed circuit dc cdi timing

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Abstract: CLIPPING IOUTAP DAC A IOUTAN ALIGNP 16 x2 x2 x2 LVDS DDR/ DIF 16 CDI MDS COARSE , bias current DC current maximum VIL Analog outputs (pins IOUTAP, IOUTAN, IOUTBP, IOUTBN) Ibias IO(fs , output voltage data rate compliance range LVDS input timing fdata fs(max) specification must be , 0001 0010 0011 0100 0101 0110 0111 1000 1001 1010 1011 1100 1101 1110 1111 DAC output timing fs(max) ts , ps ps ps ps ps Test [1] Min Typ Max Unit Internal PLL timing 40-bit NCO frequency ... Integrated Device Technology
Original
datasheet

78 pages,
452.57 Kb

DAC1617D1G0 HVQFN72 TEXT
datasheet frame
Abstract: timing of Table 5). The main function of the Clock Domain Interface (CDI) is to resynchronize the input , 16-bit phase adjustment SPI DCMSU cos IO0 LDCLKP CDI FIR 2 x2 FIR 3 x2 , outputs (pins IOUTAP, IOUTAN, IOUTBP, IOUTBN) Ibias bias current DC current IO(fs) full-scale , V auxiliary output voltage LVDS input timing fdata data rate fs(max) specification , Parameter Test[1] Conditions Min Typ Max Unit DAC output timing fs(max) maximum ... Original
datasheet

81 pages,
484.79 Kb

DAC1627D1G25 TEXT
datasheet frame
Abstract: / DIF 16 CDI MDS COARSE OFFSET CONTROL REF. BANDGAP AND BIASING GAPOUT VIRES Dual 16 , level = 1 V (p-p). Symbol Ibias IO(fs) Parameter bias current Conditions DC current Test[1] D D Min 8.1 , rate compliance range LVDS input timing fdata fs(max) specification must be C respected (fs = , Msps DAC output timing maximum sampling rate settling time sampling rate NCO frequency to ± 0.5 LSB Internal PLL timing 40-bit NCO frequency range; fs = 1000 Msps +499.99909 0.9095 - Low-power NCO ... Integrated Device Technology
Original
datasheet

81 pages,
483.66 Kb

DAC1627D1G25 TEXT
datasheet frame
Abstract: bias current DC current maximum VIL Analog outputs (pins IOUTAP, IOUTAN, IOUTBP, IOUTBN) Ibias IO(fs , timing fdata fs(max) specification must be respected (fs = fdata interpolation factor) fDATA = 184.32 , Typ Max Unit DAC output timing fs(max) ts fs fNCO sampling rate settling time sampling rate , 1000 Msps ns Msps Internal PLL timing 40-bit NCO frequency range; fs = 1000 Msps +499.99909 , finite resistance and the inductance between the receiver and the driver circuit ground voltages ... Integrated Device Technology
Original
datasheet

78 pages,
1090.98 Kb

DAC1617D1G0 HVQFN72 TEXT
datasheet frame
Abstract: tsu(SDI-SCLKF) Figure 5. Detailed SPI Transfer Timing MANUAL TRIGGER / READ While Sampling (use , (500 kHz, +VA = 2.7 V, +VBD = 1.8 V) 500-kHz Sampling Rate Excellent DC Performance ­ ±1.5 LSB Typ , EOC/INT/CDI 1 Please be aware that an important notice concerning availability, standard , . www.ti.com This integrated circuit can be damaged by ESD. Texas Instruments recommends that all integrated , Input capacitance 40 No ongoing conversion, DC Input Input leakage current pF nA 108 ... Texas Instruments
Original
datasheet

43 pages,
1698.91 Kb

TSSOP-16 QFN-16 ADS8330 ADS8329 ADS8328 ADS8327IPW ADS8327I ADS8327 detailed circuit dc cdi timing SLAS415C 16-BIT TEXT
datasheet frame
Abstract: -2 MSB-3 MSB-4 MSB-5 MSB-6 LSB+2 LSB+1 LSB tsu(SDI-SCLKF) Figure 5. Detailed SPI Transfer Timing , +VA 5.5 V, 900-kHz Sampling Rate 2.7 V +VA 3 V Excellent DC Performance ­ ±1.0 LSB Typ, ±1.75 LSB , /INT/CDI 1 Please be aware that an important notice concerning availability, standard warranty , rejection ratio Noise PSRR Power-supply rejection ratio At FFFFh output code (3) At dc VI = 0.4 VPP at 1 MHz , +0.75 70 50 33 78 0.25 1.75 2.5 1 2 1 1.25 16 Bits Bits LSB (2) LSB (2) No ongoing conversion, dc input ... Texas Instruments
Original
datasheet

46 pages,
2058.06 Kb

ADS8329 ADS8330 SLAS516B 16-BIT TEXT
datasheet frame
Abstract: x2 - LVDS DDR/ DIF 16 CDI MDS COARSE OFFSET CONTROL REF. BANDGAP AND BIASING , input current input capacitance bias current DC current pins IO0, IO1, SDO, and SDIO pins IO0, IO1, SDO , (aux) auxiliary output voltage data rate compliance range LVDS input timing fdata fs(max , 0101 0110 0111 1000 1001 1010 1011 1100 1101 1110 1111 DAC output timing fs(max) ts fs fNCO maximum , ] Min Typ Max Unit Internal PLL timing 40-bit NCO frequency range; fs = 1000 Msps +499.99909 ... Integrated Device Technology
Original
datasheet

81 pages,
1537.39 Kb

DAC1627D1G25 TEXT
datasheet frame
Abstract: -2 MSB-3 MSB-4 MSB-5 MSB-6 LSB+2 LSB+1 LSB tsu(SDI-SCLKF) Figure 5. Detailed SPI Transfer Timing , +VA 5.5 V, 900-kHz Sampling Rate 2.7 V +VA 3 V Excellent DC Performance ­ ±1.0 LSB Typ, ±1.75 LSB , /INT/CDI 1 Please be aware that an important notice concerning availability, standard warranty , rejection ratio Noise PSRR Power-supply rejection ratio At FFFFh output code (3) At dc VI = 0.4 VPP at 1 MHz , +0.75 70 50 33 78 0.25 1.75 2.5 1 2 1 1.25 16 Bits Bits LSB (2) LSB (2) No ongoing conversion, dc input ... Texas Instruments
Original
datasheet

46 pages,
2056.81 Kb

ADS8329 ADS8330 SLAS516B 16-BIT TEXT
datasheet frame
Abstract: +2 LSB+1 LSB tsu(SDI-SCLKF) Figure 5. Detailed SPI Transfer Timing MANUAL TRIGGER / READ While , , Low Power: ­ 10.6 mW (500 kHz, +VA = 2.7 V, +VBD = 1.8 V) 500-kHz Sampling Rate Excellent DC , CONVST EOC/INT/CDI 1 Please be aware that an important notice concerning availability, standard , . www.ti.com This integrated circuit can be damaged by ESD. Texas Instruments recommends that all integrated , ratio At FFFFh output code (3) At dc VI = 0.4 Vpp at 1 MHz ­0.25 16 ­2 ­3 ­1 ­1 ­0.5 ­0.8 ±1.2 ±2 ±0.6 ... Texas Instruments
Original
datasheet

45 pages,
1922.78 Kb

active bandpass filter 300 khz ADS8327 ADS8328 SLAS415C 16-BIT TEXT
datasheet frame
Abstract: tsu(SDI-SCLKF) Figure 5. Detailed SPI Transfer Timing MANUAL TRIGGER / READ While Sampling (use , (500 kHz, +VA = 2.7 V, +VBD = 1.8 V) 500-kHz Sampling Rate Excellent DC Performance ­ ±1.5 LSB Typ , EOC/INT/CDI 1 Please be aware that an important notice concerning availability, standard , . www.ti.com This integrated circuit can be damaged by ESD. Texas Instruments recommends that all integrated , Input capacitance 40 No ongoing conversion, DC Input Input leakage current pF nA 108 ... Texas Instruments
Original
datasheet

45 pages,
1629.67 Kb

TSSOP-16 QFN-16 detailed circuit dc cdi timing ADS8330 ADS8329 ADS8328 ADS8327IPW ADS8327I ADS8327 SLAS415C 16-BIT TEXT
datasheet frame

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Intel 06/08/1998 1173.74 Kb ZIP pc_99_1.zip
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Intel 06/08/1998 1173.74 Kb ZIP pc_99_1-v1.zip
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Intel 15/08/1997 693.11 Kb ZIP allparts.zip
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/download/96103370-223478ZC/pc99.zip ()
Intel 27/04/1998 1215.51 Kb ZIP pc99.zip
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/download/95370793-223476ZC/pc_99_1.zip ()
Intel 22/07/1998 1314.61 Kb ZIP pc_99_1.zip
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/download/49318403-996020ZC/xapp663.zip ()
Xilinx 23/08/2004 21918.22 Kb ZIP xapp663.zip
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Microchip 09/11/2006 27045.95 Kb TGZ mplabc30v2_05.tgz
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/download/46713865-484035ZC/gnu_tsc.bz2
Motorola 16/02/2000 22032.79 Kb BZ2 gnu_tsc.bz2