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    HSTL16918DGG,512 datasheet

    • NXP Semiconductors
    • 9-bit to 18-bit HSTL-to-LVTTL memory address latch - Application: memory address latch ; Hold time (CLK-DATA): 1 ns; Inputs: 9 x HSTL ; Operating temperature: 0~+70 Cel; Outputs: 18 x LVTTL ; Propagation delay: 2.4 ns; Set-up time (DATA-CLK): 2 ns; Supply voltage: 3.3 V; Package: SOT362-1 (TSSOP48); Container: Tube Dry Pack
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    HSTL16918DGG,512 datasheet preview Download Datasheet

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