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CD4047BMG4 Texas Instruments CMOS Low-Power Monostable/Astable Multivibrator 14-SOIC -55 to 125 visit Texas Instruments
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CD4047BM96 Texas Instruments CMOS Low-Power Monostable/Astable Multivibrator 14-SOIC -55 to 125 visit Texas Instruments Buy

cmos 4047 equivalent

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cmos 4047 equivalent

Abstract: X61C , CL = 200 pF to GND, fSCLK = 30 MHz, input code range 48 to 4047. Boldface limits apply for TMIN TA , 4047 VA = 2.7V to 5.5V VA = 4.5V to 5.5V (Note 10) Bits (min) ± 2.6 ±8 LSB (max) +0.25 , range 48 to 4047. Boldface limits apply for TMIN TA TMAX: all other limits TA = 25°C, unless , , input code range 48 to 4047. Boldface limits apply for TMIN TA TMAX: all other limits TA = 25 , Characteristics fSCLK = 30 MHz, TA = 25C, Input Code Range 48 to 4047, unless otherwise stated DNL at VA =
National Semiconductor
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5962R0722602VZA

Abstract: DAC121S101WGRLV Ordering Information NS Part Number DAC121S101WGRQV Flight Part CMOS ELDRS-Free DAC121S101WGRLV Flight Part CMOS ELDRS-Free DAC121S101WGMPR Pre-flight Prototype (Note 13) DAC121S101CVAL Ceramic Evaluation , GND, fSCLK = 20 MHz, input code range 48 to 4047. Boldface limits apply for TMIN TA TMAX: all other , Error Tempco VA = 3 V VA = 5 V Over Decimal codes 48 to 4047 VA = 2.7 V to 5.5 V IOUT = 0 IOUT = 0 All , , CL = 200 pF to GND, fSCLK = 20 MHz, input code range 48 to 4047. Boldface limits apply for TMIN TA
Texas Instruments
Original
5962R0722602VZA 5962R0722601VZA 5962R07226 smd code va 5962R0722601 DAC121S101QML DAC121S101

X66C

Abstract: 48 to 4047. Boldface limits apply for TMIN TA TMAX: all other limits TA = 25°C, unless otherwise specified. Symbol Parameter Conditions Typical (Note 9) Limits (Note 9) 12 12 Over Decimal codes 48 to 4047 , GND, fSCLK = 30 MHz, input code range 48 to 4047. Boldface limits apply for TMIN TA TMAX: all other , to GND, fSCLK = 30 MHz, input code range 48 to 4047. Boldface limits apply for TMIN TA TMAX: all , 3.0V fSCLK = 30 MHz, TA = 25C, Input Code Range 48 to 4047, INL at VA = 5.0V 20173252 20173253
National Semiconductor
Original
X66C DAC124S085 CSP-9-111C2 CSP-9-111S2

X72C

Abstract: cmos 4047 equivalent , input code range 48 to 4047. Boldface limits apply for TMIN TA TMAX: all other limits TA = 25 , Decimal codes 48 to 4047 VA = 2.7V to 5.5V VA = 4.5V to 5.5V (Note 10) ZE FSE GE ZCED TC GE Zero Code , , CL = 200 pF to GND, fSCLK = 30 MHz, input code range 48 to 4047. Boldface limits apply for TMIN TA , to GND, fSCLK = 30 MHz, input code range 48 to 4047. Boldface limits apply for TMIN TA TMAX: all , 3.0V fSCLK = 30 MHz, TA = 25C, Input Code Range 48 to 4047, INL at VA = 5.0V 20195252 20195253
National Semiconductor
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X72C cmos 4047 equivalent mark x73c DAC122S085

X72C

Abstract: DAC082S085 , CL = 200 pF to GND, fSCLK = 30 MHz, input code range 48 to 4047. Boldface limits apply for TMIN TA , +5.5V, VREFIN = VA, CL = 200 pF to GND, fSCLK = 30 MHz, input code range 48 to 4047. Boldface limits , , RL = 2k to GND, CL = 200 pF to GND, fSCLK = 30 MHz, input code range 48 to 4047. Boldface limits , www.national.com DAC122S085 Typical Performance Characteristics to 4047, unless otherwise stated , 4047, unless otherwise stated (Continued) INL/DNL vs fSCLK at VA = 2.7V INL/DNL vs VA 20195250
National Semiconductor
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DAC082S085 DAC102S085 DAC122S085CIMM DAC122S085CIMMX DAC122S085EVAL LM4050

x66c

Abstract: DAC084S085 , input code range 48 to 4047. Boldface limits apply for TMIN TA TMAX and all other limits are at TA = , pF to GND, fSCLK = 30 MHz, input code range 48 to 4047. Boldface limits apply for TMIN TA TMAX and , , RL = 2k to GND, CL = 200 pF to GND, fSCLK = 30 MHz, input code range 48 to 4047. Boldface limits , www.national.com DAC124S085 Typical Performance Characteristics to 4047, unless otherwise stated , 4047, unless otherwise stated (Continued) INL/DNL vs fSCLK at VA = 2.7V INL/DNL vs VA 20173250
National Semiconductor
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DAC084S085 DAC104S085 DAC124S085CIMM DAC124S085CIMMX DAC124S085EVAL LM4130

X61C

Abstract: range 48 to 4047. Boldface limits apply for TMIN TA TMAX: all other limits TA = 25°C, unless otherwise , Error Tempco VA = 3V VA = 5V Over Decimal codes 48 to 4047 VA = 2.7V to 5.5V VA = 4.5V to 5.5V IOUT = 0 , to 4047. Boldface limits apply for TMIN TA TMAX: all other limits TA = 25°C, unless otherwise , range 48 to 4047. Boldface limits apply for TMIN TA TMAX: all other limits TA = 25°C, unless otherwise , fSCLK = 30 MHz, TA = 25C, Input Code Range 48 to 4047, unless otherwise stated DNL at VA = 3.0V DNL at
Texas Instruments
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X61C SNAS265I DAC121S101/DAC121S101Q DAC121S101Q AEC-Q100 ISO/TS16949
Abstract: range 48 to 4047. Boldface limits apply for TMIN ≤ TA ≤ TMAX: all other limits TA = 25° unless , codes 48 to 4047 VA = 2.7V to 5.5V VA = 4.5V to 5.5V (2) ZE Zero Code Error IOUT = 0 +4 , "¦ to GND, CL = 200 pF to GND, fSCLK = 30 MHz, input code range 48 to 4047. Boldface limits apply for , , fSCLK = 30 MHz, input code range 48 to 4047. Boldface limits apply for TMIN ≤ TA ≤ TMAX: all other , 25C, Input Code Range 48 to 4047, unless otherwise stated DNL at VA = 3.0V DNL at VA = 5.0V Texas Instruments
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5962R0722601VZA

Abstract: TID RADIATION TEST OF OP. AMP 4047. Boldface limits apply for TMIN TA TMAX: all other limits TA = 25°C, unless otherwise specified , Integral Non-Linearity Over Decimal codes 48 to 4047 ±2.75 8.0 LSB 1, 2, 3 +1.0 -8.0 , , fSCLK = 20 MHz, input code range 48 to 4047. Boldface limits apply for TMIN TA TMAX: all other limits , for VA = +2.7 V to +5.5 V, RL = , CL = 200 pF to GND, fSCLK = 20 MHz, input code range 48 to 4047 , to +5.5 V, RL = , CL = 200 pF to GND, fSCLK = 20 MHz, input code range 48 to 4047. Symbol
National Semiconductor
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TID RADIATION TEST OF OP. AMP

DAC121S101QML

Abstract: DAC121S101W , CL = 200 pF to GND, fSCLK = 20 MHz, input code range 48 to 4047. Boldface limits apply for TMIN TA , 48 to 4047 DNL Differential Non-Linearity VA = 2.7 V to 5.5 V ZE Zero Code Error , code range 48 to 4047. Boldface limits apply for TMIN TA TMAX: all other limits TA = 25°C, unless , = , CL = 200 pF to GND, fSCLK = 20 MHz, input code range 48 to 4047. Boldface limits apply for TMIN , 200 pF to GND, fSCLK = 20 MHz, input code range 48 to 4047. Symbol Parameter Conditions Min
National Semiconductor
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DAC121S101W

X61C

Abstract: sb 4047 , input code range 48 to 4047. Boldface limits apply for TMIN TA TMAX: all other limits TA = 25 , Code Error Drift Gain Error Tempco VA = 3V VA = 5V Over Decimal codes 48 to 4047 VA = 2.7V to 5.5V VA = , = 30 MHz, input code range 48 to 4047. Boldface limits apply for TMIN TA TMAX: all other limits TA , , fSCLK = 30 MHz, input code range 48 to 4047. Boldface limits apply for TMIN TA TMAX: all other limits , fSCLK = 30 MHz, TA = 25C, Input Code Range 48 to 4047, unless otherwise stated DNL at VA = 3.0V DNL at
Texas Instruments
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sb 4047 SNAS265H

NAC0010A

Abstract: 5962R0722602VZA 4047. Boldface limits apply for TMIN TA TMAX: all other limits TA = 25°C, unless otherwise specified , VA = 3 V VA = 5 V Over Decimal codes 48 to 4047 VA = 2.7 V to 5.5 V IOUT = 0 IOUT = 0 All ones Loaded , +5.5 V, RL = , CL = 200 pF to GND, fSCLK = 20 MHz, input code range 48 to 4047. Boldface limits apply , to +5.5 V, RL = , CL = 200 pF to GND, fSCLK = 20 MHz, input code range 48 to 4047. Boldface limits , , fSCLK = 20 MHz, input code range 48 to 4047. Parameter POWER REQUIREMENTS Normal Mode fSCLK = 20 MHz
Texas Instruments
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NAC0010A SNAS410E
Abstract: range 48 to 4047. Boldface limits apply for TMIN ≤ TA ≤ TMAX: all other limits TA = 25°C, unless , 4047 VA = 2.7V to 5.5V VA = 4.5V to 5.5V (2) ZE Zero Code Error IOUT = 0 +4 +15 , range 48 to 4047. Boldface limits apply for TMIN ≤ TA ≤ TMAX: all other limits TA = 25°C, unless , to 4047. Boldface limits apply for TMIN ≤ TA ≤ TMAX: all other limits TA = 25°C, unless , Code Range 48 to 4047, unless otherwise stated DNL at VA = 3.0V DNL at VA = 5.0V Figure 3 Texas Instruments
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Abstract: 48 to 4047. Boldface limits apply for TMIN ≤ TA ≤ TMAX: all other limits TA = 25° unless , Bits INL Integral Non-Linearity Over Decimal codes 48 to 4047 DNL Differential , 48 to 4047. Boldface limits apply for TMIN ≤ TA ≤ TMAX: all other limits TA = 25° unless , MHz, input code range 48 to 4047. Boldface limits apply for TMIN ≤ TA ≤ TMAX: all other limits TA , , fSCLK = 20 MHz, input code range 48 to 4047. Parameter Test Conditions Min Max Units Texas Instruments
Original
Abstract: range 48 to 4047. Boldface limits apply for TMIN TA TMAX: all other limits TA = 25°C, unless otherwise , Error Tempco VA = 3V VA = 5V Over Decimal codes 48 to 4047 VA = 2.7V to 5.5V VA = 4.5V to 5.5V IOUT = 0 , to 4047. Boldface limits apply for TMIN TA TMAX: all other limits TA = 25°C, unless otherwise , range 48 to 4047. Boldface limits apply for TMIN TA TMAX: all other limits TA = 25°C, unless otherwise , fSCLK = 30 MHz, TA = 25C, Input Code Range 48 to 4047, unless otherwise stated DNL at VA = 3.0V DNL at Texas Instruments
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Abstract: = +2.7 V to +5.5 V, RL = , CL = 200 pF to GND, fSCLK = 20 MHz, input code range 48 to 4047. Boldface , Error Gain Error Zero Code Error Drift Gain Error Tempco VA = 3 V VA = 5 V Over Decimal codes 48 to 4047 , 4047. Boldface limits apply for TMIN TA TMAX: all other limits TA = 25°C, unless otherwise specified , MHz, input code range 48 to 4047. Boldface limits apply for TMIN TA TMAX: all other limits TA = 25 , = +2.7 V to +5.5 V, RL = , CL = 200 pF to GND, fSCLK = 20 MHz, input code range 48 to 4047. Symbol National Semiconductor
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Abstract: 2kâ"¦ to GND, CL = 200 pF to GND, fSCLK = 30 MHz, input code range 48 to 4047. Boldface limits apply , Non-Linearity DNL Differential Non-Linearity Over Decimal codes 48 to 4047 VA = 2.7V to 5.5V VA = , range 48 to 4047. Boldface limits apply for TMIN ≤ TA ≤ TMAX: all other limits TA = 25°C, unless , to 4047. Boldface limits apply for TMIN ≤ TA ≤ TMAX: all other limits TA = 25°C, unless , Code Range 48 to 4047, unless otherwise stated DNL at VA = 3.0V DNL at VA = 5.0V INL at VA = Texas Instruments
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Abstract: , input code range 48 to 4047. Boldface limits apply for TMIN TA TMAX and all other limits are at TA = , 30 MHz, input code range 48 to 4047. Boldface limits apply for TMIN TA TMAX and all other limits , 4047. Boldface limits apply for TMIN TA TMAX and all other limits are at TA = 25°C, unless otherwise , Range 48 to 4047, unless otherwise stated INL at VA = 3.0V INL at VA = 5.0V Figure 3. DNL at VA = , MHz, TA = 25C, Input Code Range 48 to 4047, unless otherwise stated INL/DNL vs fSCLK at VA = 2.7V INL Texas Instruments
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SNAS361E
Abstract: +2.7V to +5.5V, VREFIN = VA, CL = 200 pF to GND, fSCLK = 30 MHz, input code range 48 to 4047. Boldface , +2.7V to +5.5V, VREFIN = VA, CL = 200 pF to GND, fSCLK = 30 MHz, input code range 48 to 4047. Boldface , +2.7V to +5.5V, VREFIN = VA, CL = 200 pF to GND, fSCLK = 30 MHz, input code range 48 to 4047. Boldface , Code Range 48 to 4047, unless otherwise stated INL at VA = 3.0V INL at VA = 5.0V DNL at VA = 3.0V , (continued) VREF = VA, fSCLK = 30 MHz, TA = 25C, Input Code Range 48 to 4047, unless otherwise stated INL Texas Instruments
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SNAS361D

x66c

Abstract: sb 4047 , input code range 48 to 4047. Boldface limits apply for TMIN TA TMAX and all other limits are at TA = , to GND, fSCLK = 30 MHz, input code range 48 to 4047. Boldface limits apply for TMIN TA TMAX and all , +2.7V to +5.5V, VREFIN = VA, CL = 200 pF to GND, fSCLK = 30 MHz, input code range 48 to 4047. Boldface , 25C, Input Code Range 48 to 4047, unless otherwise stated INL at VA = 3.0V INL at VA = 5.0V DNL at , Performance Characteristics (continued) VREF = VA, fSCLK = 30 MHz, TA = 25C, Input Code Range 48 to 4047
Texas Instruments
Original
SNAS348D
Abstract: , input code range 48 to 4047. Boldface limits apply for TMIN ≤ TA ≤ TMAX and all other limits are at , 4047. Boldface limits apply for TMIN ≤ TA ≤ TMAX and all other limits are at TA = 25°C, unless , , CL = 200 pF to GND, fSCLK = 30 MHz, input code range 48 to 4047. Boldface limits apply for TMIN â , MHz, TA = 25C, Input Code Range 48 to 4047, unless otherwise stated INL at VA = 3.0V INL at VA = , Performance Characteristics (continued) VREF = VA, fSCLK = 30 MHz, TA = 25C, Input Code Range 48 to 4047 Texas Instruments
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Abstract: pF to GND, fSCLK = 30 MHz, input code range 48 to 4047. Boldface limits apply for TMIN ≤ TA â , VA, CL = 200 pF to GND, fSCLK = 30 MHz, input code range 48 to 4047. Boldface limits apply for TMIN , 4047. Boldface limits apply for TMIN ≤ TA ≤ TMAX and all other limits are at TA = 25° unless , Characteristics VREF = VA, fSCLK = 30 MHz, TA = 25C, Input Code Range 48 to 4047, unless otherwise stated INL at , Code Range 48 to 4047, unless otherwise stated INL/DNL vs fSCLK at VA = 2.7V Figure 9. Figure 10 Texas Instruments
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SNAS348F
Abstract: , input code range 48 to 4047. Boldface limits apply for TMIN ≤ TA ≤ TMAX and all other limits are at , 4047. Boldface limits apply for TMIN ≤ TA ≤ TMAX and all other limits are at TA = 25°C, unless , , CL = 200 pF to GND, fSCLK = 30 MHz, input code range 48 to 4047. Boldface limits apply for TMIN â , MHz, TA = 25C, Input Code Range 48 to 4047, unless otherwise stated INL at VA = 3.0V INL at VA = , Performance Characteristics (continued) VREF = VA, fSCLK = 30 MHz, TA = 25C, Input Code Range 48 to 4047 Texas Instruments
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LM7301

Abstract: = VA, CL = 200 pF to GND, fSCLK = 30 MHz, input code range 48 to 4047. Boldface limits apply for , to GND, fSCLK = 30 MHz, input code range 48 to 4047. Boldface limits apply for TMIN TA TMAX and all , pF to GND, fSCLK = 30 MHz, input code range 48 to 4047. Boldface limits apply for TMIN TA TMAX and , , TA = 25C, Input Code Range 48 to 4047, unless otherwise stated INL at VA = 3.0V INL at VA = 5.0V , ) VREF = VA, fSCLK = 30 MHz, TA = 25C, Input Code Range 48 to 4047, unless otherwise stated INL/DNL vs
Texas Instruments
Original
LM7301
Abstract: , input code range 48 to 4047. Boldface limits apply for TMIN TA TMAX and all other limits are at TA = , to GND, fSCLK = 30 MHz, input code range 48 to 4047. Boldface limits apply for TMIN TA TMAX and all , +2.7V to +5.5V, VREFIN = VA, CL = 200 pF to GND, fSCLK = 30 MHz, input code range 48 to 4047. Boldface , 25C, Input Code Range 48 to 4047, unless otherwise stated INL at VA = 3.0V INL at VA = 5.0V DNL at , Performance Characteristics (continued) VREF = VA, fSCLK = 30 MHz, TA = 25C, Input Code Range 48 to 4047 Texas Instruments
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Abstract: = VA, CL = 200 pF to GND, fSCLK = 30 MHz, input code range 48 to 4047. Boldface limits apply for , to GND, fSCLK = 30 MHz, input code range 48 to 4047. Boldface limits apply for TMIN TA TMAX and all , pF to GND, fSCLK = 30 MHz, input code range 48 to 4047. Boldface limits apply for TMIN TA TMAX and , , TA = 25C, Input Code Range 48 to 4047, unless otherwise stated INL at VA = 3.0V INL at VA = 5.0V , ) VREF = VA, fSCLK = 30 MHz, TA = 25C, Input Code Range 48 to 4047, unless otherwise stated INL/DNL vs Texas Instruments
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X72C

Abstract: , input code range 48 to 4047. Boldface limits apply for TMIN TA TMAX and all other limits are at TA = , 30 MHz, input code range 48 to 4047. Boldface limits apply for TMIN TA TMAX and all other limits , 4047. Boldface limits apply for TMIN TA TMAX and all other limits are at TA = 25°C, unless otherwise , Range 48 to 4047, unless otherwise stated INL at VA = 3.0V INL at VA = 5.0V Figure 3. DNL at VA = , MHz, TA = 25C, Input Code Range 48 to 4047, unless otherwise stated INL/DNL vs fSCLK at VA = 2.7V INL
Texas Instruments
Original

X72C

Abstract: 48 to 4047. Boldface limits apply for TMIN ≤ TA ≤ TMAX and all other limits are at TA = 25 , = VA, CL = 200 pF to GND, fSCLK = 30 MHz, input code range 48 to 4047. Boldface limits apply for , , input code range 48 to 4047. Boldface limits apply for TMIN ≤ TA ≤ TMAX and all other limits are at , , Input Code Range 48 to 4047, unless otherwise stated INL at VA = 3.0V INL at VA = 5.0V Figure 3 , (continued) VREF = VA, fSCLK = 30 MHz, TA = 25C, Input Code Range 48 to 4047, unless otherwise stated INL
Texas Instruments
Original
Abstract: , fSCLK = 30 MHz, input code range 48 to 4047. Boldface limits apply for TMIN ≤ TA ≤ TMAX and all , , input code range 48 to 4047. Boldface limits apply for TMIN ≤ TA ≤ TMAX and all other limits are at , 30 MHz, input code range 48 to 4047. Boldface limits apply for TMIN ≤ TA ≤ TMAX and all other , MHz, TA = 25C, Input Code Range 48 to 4047, unless otherwise stated INL at VA = 3.0V INL at VA = , Performance Characteristics (continued) VREF = VA, fSCLK = 30 MHz, TA = 25C, Input Code Range 48 to 4047 Texas Instruments
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Abstract: , fSCLK = 30 MHz, input code range 48 to 4047. Boldface limits apply for TMIN ≤ TA ≤ TMAX and all , , input code range 48 to 4047. Boldface limits apply for TMIN ≤ TA ≤ TMAX and all other limits are at , 30 MHz, input code range 48 to 4047. Boldface limits apply for TMIN ≤ TA ≤ TMAX and all other , MHz, TA = 25C, Input Code Range 48 to 4047, unless otherwise stated INL at VA = 3.0V INL at VA = , Performance Characteristics (continued) VREF = VA, fSCLK = 30 MHz, TA = 25C, Input Code Range 48 to 4047 Texas Instruments
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Abstract: . 1045 2 1046 » ore * n » H D 4 0 4 7 2 0 /H D 4 0 7 4 7 2 0 o r > 7? H D 4047 2 0 , Pattern ROM Bank Register 1048 H D 4047 2 0 /H D 4 0 7 4 7 2 0 Instruction Addressing , Pattern (D set \ P instruction ( Figure 5 Pattern ROM Bank Control 1050 H D 4047 2 0 /H D 4 0 7 , $00B Iw Ì . Iw $00E 1. â  â  1w $00F H D 4047 2 0 /H D 4 0 7 4 7 2 0 , flags after MCU reset are shown on next page. 1056 H D 4047 2 0 /H D 4 0 7 4 7 2 0 Item Abbr -
OCR Scan
D404720/H D4074720 HD404720 HD4074720 HMCS400- HD404729

624C

Abstract: DS1204U rate of 2 million bits/second · Low-power CMOS circuitry · Access via 3-wire or 1-wire interface · , 32-39 (SECURED) 5 40-47 6 48-55 7 56-63 40-47 (SECURED) IS BYTE 63 READ YET , open drain connections. The DS1205S is an open drain part with an internal circuit equivalent to that , system bus master circuit should be equivalent to the one shown in Figure 16. The value of the pull-up , . 021798 9/17 DS1205S EQUIVALENT CIRCUIT Figure 15 Transaction Sequence The protocol for
Dallas Semiconductor
Original
DS1204U 624C 6.2b3 5D57

BC99

Abstract: B369 bits/second · Low-power CMOS circuitry · Access via 3-wire or 1-wire interface · Applications include , ) 4 32-39 32-39 (SECURED) 5 40-47 40-47 (SECURED) 6 48-55 48-55 (SECURED) 7 , tions. The DS1205S is an open drain part with an inter nal circuit equivalent to that shown in Figure 15 , should be equivalent to the one shown in Figure 16. The value of the pull-up resistor should be greater , 284 DS1205S EQUIVALENT CIRCUIT Figure 15 Transaction Sequence The protocol for accessing
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OCR Scan
BC99 B369
Abstract: â'¢ Low-power CMOS circuitry â'¢ Access via 3-wire or 1-wire interface â'¢ Applications include , (PASSWORD) 16-23 (SECURED) 24-31 (SECURED) 4 32-39 32-39 (SECURED) 5 40-47 6 48-55 40-47 (SECURED) 48-55 (SECURED) 7 56-63 56-63 (SECURED) BLOCK SELECTOR CODES FOR MOVE , master circuit should be equivalent to the one shown in Figure 16. The value of the pull-up resistor , open drain connec­ tions. The DS1205S is an open drain part with an inter­ nal circuit equivalent -
OCR Scan

624C

Abstract: DS1204U partition â'¢ Maximum data transfer rate of 2 million bits/second â'¢ Low-power CMOS circuitry â'¢ Access , 24-31 24-31 (SECURED) 4 32-39 32-39 (SECURED) 5 40-47 40-47 (SECURED) 6 48-55 48-55 , open drain part with an internal circuit equivalent to that shown in Figure 15. Ideally, the bus master , pull-up resistor at the master end of the bus. The system bus master circuit should be equivalent to the , Manufacturer DS1205S EQUIVALENT CIRCUIT Figure 15 BUS MASTER OPEN DRAIN CIRCUIT Figure 16A VDD BUS MASTER
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OCR Scan
DS1228S DS1236S DS1653S DS1200S DS1237S DS1710S DS1238S
Abstract: transfer rate of 2 million bits/second · Low-power CMOS circuitry · Access via 3-wire or 1-wire interface · , 40-47 40-47 (SECURED) 6 48-55 48-55 (SECURED) 7 56-63 56-63 (SECURED) BLOCK SELECTOR CODES FOR MOVE , have open drain connec tions. The DS1205S is an open drain part with an inter nal circuit equivalent to , . The system bus master circuit should be equivalent to the one shown in Figure 16. The value of the , will be reset. 021492 9/17 402 0S 1205S EQUIVALENT CIRCUIT Figure 15 Transaction -
OCR Scan

dac121s101cimk

Abstract: X61C 200 pF to GND, fSCLK = 30 MHz, input code range 48 to 4047. Boldface limits apply for TMIN TA TMAX , ) Limits (Note 9) 12 12 Over Decimal codes 48 to 4047 VA = 2.7V to 5.5V VA = 4.5V to 5.5V (Note 10) ZE FSE , to +5.5V, RL = 2k to GND, CL = 200 pF to GND, fSCLK = 30 MHz, input code range 48 to 4047. Boldface , 3.0V fSCLK = 30 MHz, TA = 25C, Input Code Range 48 to 4047, unless DNL at VA = 5.0V 20114952 , Functional Description 1.1 DAC SECTION The DAC121S101 is fabricated on a CMOS process with an architecture
National Semiconductor
Original
dac121s101cimk X61C mark X60C AD5320 DAC7512 DAC081S101
Abstract: /second PIN DESCRIPTION â'¢ Low-power CMOS circuitry â'¢ Access via 3-wire or 1-wire interface , ) 24-31 (SECURED) 32-39 (SECURED) 5 40-47 40-47 (SECURED) 6 48-55 7 56-63 , ­ tions. The DS1205S is an open drain part with an inter­ nal circuit equivalent to that shown in Figure , master end of the bus. The system bus master circuit should be equivalent to the one shown in Figure 16 , jiS , all components on the bus will be reset. DS 1205S EQUIVALENT CIRCUIT Figure 15 -
OCR Scan

X61C

Abstract: 5 volts audio amplifier +2.7V to +5.5V, RL = 2k to GND, CL = 200 pF to GND, fSCLK = 30 MHz, input code range 48 to 4047 , Integral Non-Linearity DNL Differential Non-Linearity Over Decimal codes 48 to 4047 VA = 2.7V to , , CL = 200 pF to GND, fSCLK = 30 MHz, input code range 48 to 4047. Boldface limits apply for TMIN TA , fSCLK = 30 MHz, TA = 25C, Input Code Range 48 to 4047, unless otherwise stated DNL at VA = 3.0V , DAC121S101 is fabricated on a CMOS process with an architecture that consists of switches and a resistor
National Semiconductor
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DAC101S101 5 volts audio amplifier DAC121S101QCMK X61Q DAC121S101CIMM DAC121S101CIMMX

X61C

Abstract: X60C to 4047. Boldface limits apply for TMIN TA TMAX: all other limits TA = 25°C, unless otherwise , 4047 VA = 2.7V to 5.5V VA = 4.5V to 5.5V (Note 10) ZE Zero Code Error IOUT = 0 +4 +15 , , CL = 200 pF to GND, fSCLK = 30 MHz, input code range 48 to 4047. Boldface limits apply for TMIN TA , fSCLK = 30 MHz, TA = 25C, Input Code Range 48 to 4047, unless otherwise stated DNL at VA = 3.0V , DAC121S101 is fabricated on a CMOS process with an architecture that consists of switches and a resistor
National Semiconductor
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ze 003 solar

DAC121S101QML

Abstract: GND, fSCLK = 20 MHz, input code range 48 to 4047. Boldface limits apply for TMIN TA TMAX: all other , Error Tempco VA = 3 V VA = 5 V Over Decimal codes 48 to 4047 VA = 2.7 V to 5.5 V IOUT = 0 IOUT = 0 All , , CL = 200 pF to GND, fSCLK = 20 MHz, input code range 48 to 4047. Boldface limits apply for TMIN TA , +2.7 V to +5.5 V, RL = , CL = 200 pF to GND, fSCLK = 20 MHz, input code range 48 to 4047. Boldface , 4047. Symbol Parameter Conditions Min Max Units Subgroups 1 1 1 1 1 1 1 1 1 1 1 1 POWER REQUIREMENTS
National Semiconductor
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SNAS410C

3S771

Abstract: BiCMOS/CMOS STATIC RAM MODULE Integrated Device Technology, Inc. FEA TU RES: · High density 4 megabit (512K x 8) static RAM module · Equivalent to the JED EC standard for future monolithic 512Kx 8 , .) - CMOS Standby: 400|iA (max.) - Data Retention: 250nA (max.) Vcc = 2V · Surface mounted plastic , Technology. Inc* APRIL 1992 D SC -4047/3 7.27 1 I N T E G R A T E D DE VI CE IDT7M4048, IDT7MB404B 512K X 8 BICMOS/CMOS STATIC RAM MODULE 47E D 4 Ö 3 S 771 Q Û 1 Q 1 4 Ô D * I D T COMMERCIAL
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3S771 2S771 IDT7MB4048 IDT7M4048/7MB4048 7MB4048 4S2S771 0Q101SS

TTL 7452

Abstract: LED display for radio LED display driver is a monolithic CMOS IC. In order to achieve continuous brightness control, the , ) Width of scribe line100um Malfunctioned dieMarked with red ink or equivalent marking LED Display , Radio System VLED=3.0V VLED=3.0V VLED VLED 9-12, 2-8, 48 40-47 31-35, 14-17 37-39
Silicon Touch Technology
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ST2225A SSOP48 ST2225A-SS3 ST2225A-D TTL 7452 LED display for radio circuit diagram of LED display pin diagram of ic 7493 LED display driver AC voltmeter with Digital Display diagram SP-ST2225A-A OUT35
Abstract: Equivalent to the JEDEC standard for future monolithic 512K x 8 static RAMs · Fast access time: 17ns (max , TEMPERATURE RANGE ©1991 Integrated Device Technology, Inc. MAY 1991 DSC-4047/1 UPDATE 1 B 139 IDT7M4048, IDT7MB4048 512K x 8 CMOS STATIC RAM MODULE COMMERCIAL TEMPERATURE RANGE PIN CONFIGURATION , IDT7M4048, IDT7MB4048 512K X 8 CMOS STATIC RAM MODULE COMMERCIAL TEMPERATURE RANGE DC ELECTRICAL , Supply Current (TTL Levels) Full Standby Supply Current (CMOS Levels) Test Conditions Vcc - Max., Vin -
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4048/7M B4048 IDT7IM048

led display driver

Abstract: TTL 7452 LED display driver is a monolithic CMOS IC. In order to achieve continuous brightness control, the , ) Width of scribe line100um Malfunctioned dieMarked with red ink or equivalent marking LED Display , , 48 40-47 14-17 31-35, 37-39 ST2225A 19 27 28 21 1, 13 36 CLOCK IN DATA IN
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35-BIT MO-118
Abstract: IDT7M4048 IDT7MB4048 512K x 8 BiCMOS/CMOS STATIC RAM MODULE Integrated Device Technology , '¢ Equivalent to the JEDEC standard for future monolithic 512K x 8 static RAMs â'¢ Fast access time: 15ns (max.) â'¢ Low power consumption (L version) â'" Active: 11 OmA (max.) â'" CMOS Standby: 400jiA (max.) â , 1992 D S C -4047/3 1992 In tegrated Device Technology, Inc. 1 1 -M -l IDT7M404B, IDT7MB4048 512K X 8 BICMOS/CMOS STATIC RAM MODULE COMMERCIAL TEMPERATURE RANGE ABSOLUTE MAXIMUM -
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DT7M4048 7M4048L 7MB4048SXXP
Abstract: . Inc APRIL 1992 DSC-4047/3 7.27 t IDT7M4048, IDT7MB4048 512K X B BICMOS/CMOS STATIC RAM , 512K x 8 BiCMOS/CMOS STATIC RAM MODULE In teg rated Device T echnology, Inc. IDT7M4048 IDT7MB4048 FEATURES: · High density 4 megabit (512K x 8) static RAM module · Equivalent to the JEDEC , (L version) - Active: 11 OmA (max.) - CMOS Standby: 400|iA (max.) - Data Retention: 250nA (max , /CMOS STATIC RAM MODULE COM MERCIAL TEMPERATURE RANGE DATA OUT = Zo = 50U li j 5012 1 .5 -
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7MB4048S

x66c

Abstract: DAC084S085 +2.7V to +5.5V, VREFIN = VA, CL = 200 pF to GND, fSCLK = 30 MHz, input code range 48 to 4047. Boldface , 4047. Boldface limits apply for TMIN TA TMAX and all other limits are at TA = 25°C, unless otherwise , Characteristics 4047, unless otherwise stated DAC124S085 INL/DNL vs fSCLK at VA = 2.7V INL/DNL vs VA , Description 1.1 DAC SECTION The DAC124S085 is fabricated on a CMOS process with an architecture that , . VOUTA,B,C,D = VREFIN x (D / 4096) where D is the decimal equivalent of the binary code that is loaded
National Semiconductor
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DAC124S085CISD DAC124S085CISDX

DAC082S085

Abstract: DAC102S085 +2.7V to +5.5V, VREFIN = VA, CL = 200 pF to GND, fSCLK = 30 MHz, input code range 48 to 4047. Boldface , 4047. Boldface limits apply for TMIN TA TMAX and all other limits are at TA = 25°C, unless otherwise , Characteristics 4047, unless otherwise stated DAC122S085 INL/DNL vs fSCLK at VA = 2.7V INL/DNL vs VA , 1.1 DAC SECTION The DAC122S085 is fabricated on a CMOS process with an architecture that consists of , (D / 4096) where D is the decimal equivalent of the binary code that is loaded into the DAC
National Semiconductor
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DAC122S085CISD DAC122S085CISDX
Abstract: , fSCLK = 30 MHz, input code range 48 to 4047. Boldface limits apply for TMIN TA TMAX and all other , 48 to 4047. Boldface limits apply for TMIN TA TMAX and all other limits are at TA = 25°C, unless , www.national.com 8 DAC122S085 Typical Performance Characteristics 4047, unless otherwise stated INL at , DAC122S085 1.0 Functional Description 1.1 DAC SECTION The DAC122S085 is fabricated on a CMOS process with , decimal equivalent of the binary code that is loaded into the DAC register. D can take on any value National Semiconductor
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ze 003 solar

Abstract: X73C +2.7V to +5.5V, VREFIN = VA, CL = 200 pF to GND, fSCLK = 30 MHz, input code range 48 to 4047. Boldface , 4047. Boldface limits apply for TMIN TA TMAX and all other limits are at TA = 25°C, unless otherwise , Characteristics 4047, unless otherwise stated DAC122S085 INL/DNL vs fSCLK at VA = 2.7V INL/DNL vs VA , Characterisics Table. 1.0 Functional Description 1.1 DAC SECTION The DAC122S085 is fabricated on a CMOS , output dynamic range. VOUTA,B = VREFIN x (D / 4096) where D is the decimal equivalent of the binary
National Semiconductor
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X73C

CD4047 equivalent

Abstract: precision FULL WAVE RECTIFIER generate a very narrow "soft" reset pulse (100µs typ) or a 200ms reset pulse equivalent to a power-on , 2X9.1M /2.5 Z0 = 50 DETECTOR FB 27k + CMOS ONE-SHOT (CD4047) LTC1440 100pF ­ , . Monolithic one-shots draw significant load current, but the venerable '4047 is about the best in this , a programmable hysteresis and TTL/CMOS outputs that sink (5mA) and source (40mA) current. It , Carrier (OC) and equivalent Synchronous Transport Signals (STS) criteria as defined for Synchronous
Linear Technology
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LT1425 CD4047 equivalent precision FULL WAVE RECTIFIER ltc1492 CD4047 applications precision full wave CD4047 Application 1-800-4-LINEAR

x66c

Abstract: 48 to 4047. Boldface limits apply for TMIN TA TMAX and all other limits are at TA = 25°C, unless , 48 to 4047. Boldface limits apply for TMIN TA TMAX and all other limits are at TA = 25°C, unless , www.national.com 8 DAC124S085 Typical Performance Characteristics 4047, unless otherwise stated INL at , DAC124S085 1.0 Functional Description 1.1 DAC SECTION The DAC124S085 is fabricated on a CMOS process with , decimal equivalent of the binary code that is loaded into the DAC register. D can take on any value
National Semiconductor
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X66C

Abstract: DAC084S085 , VREFIN = VA, CL = 200 pF to GND, fSCLK = 30 MHz, input code range 48 to 4047. Boldface limits apply for , +2.7V to +5.5V, VREFIN = VA, CL = 200 pF to GND, fSCLK = 30 MHz, input code range 48 to 4047. Boldface , 20173257 9 www.national.com DAC124S085 Typical Performance Characteristics 4047, unless , fabricated on a CMOS process with an architecture that consists of switches and resistor strings that are , the decimal equivalent of the binary code that is loaded into the DAC register. D can take on any
National Semiconductor
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BC99

Abstract: DS1204U DS1205S 16-Pin SOIC (300 mil) See Mech. Drawings Section d · Low-power CMOS circuitry BAT fo , PARTITION (STARTING ADDRESS SPECIFIED IN COMMAND WORD) 3 24-31 rN 32-39 6 NO 40-47 , ) No t Re co m 40-47 BLOCK SELECTOR CODES FOR MOVE BLOCK COMMAND Figure 11 m en de , circuit equivalent to that shown in Figure 15. Ideally, the bus master should also be open drain; but if , master end of the bus. The system bus master circuit should be equivalent to the one shown in Figure 16
Maxim Integrated Products
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STEL-1173

Abstract: ic CD 4047 STEL-1173 Data Sheet STEL-1173 (50 MHz) 48-Bit Resolution CMOS Numerically Controlled , . The NCO device combines low power 1.5µ CMOS technology with a unique architectural design resulting , 's COMPLEMENT OR OFFSET BINARY OUTPUT CODES LOW POWER CMOS MILITARY AND COMMERCIAL TEMPERATURE RANGES , Bits0 (LSB) ­7 Bits 8­15 Bits 16­23 Bits 24­31 Bits 32­39 Bits 40­47 (MSB) To write to all 48 , may be determined at any point by multiplying the decimal equivalent of the 13 most significant bits
Intel
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ic CD 4047 cmos ic 4047 sine cosine phase quadrant look-up address 48-BIT 12-BIT 13-BIT
Abstract: SDA Type Analog Output Supply Ground Digital Input/Output Equivalent Circuit Analog Output Voltage , = VA, CL = 200 pF to GND, input code range 48 to 4047. Boldface limits apply for TMIN TA TMAX and , = 200 pF to GND, input code range 48 to 4047. Boldface limits apply for TMIN TA TMAX and all other , = 200 pF to GND, input code range 48 to 4047. Boldface limits apply for TMIN TA TMAX and all other , Code Range 48 to 4047, unless otherwise stated. INL DNL Figure 3. INL/DNL vs Temperature at VA = Texas Instruments
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DAC121C081 DAC121C085 SNAS395D DAC121C081/

cmos video chip

Abstract: Stanford Telecom package STEL-1173 Data Sheet STEL-1173RH 48-B it Resolution Rad Hard CMOS Numerically Controlled Oscillator STANFORD TELECOM* Û5 Û 5 B 4 2 ÜGGEbl 3 TTT RAD HARDNESS CAPABILITIES TOTAL DOSE - 1 , sources. The NCO device combines a low power, rad-hard, 1.5p. bulk CMOS technology with a unique , 8-15 Bits 16-23 Bits 24-31 Bits 32-39 Bits 40-47 (MSB) Minimum value +1 (001h) Maximum value +4095 , tp u t m ay be determined at any point by multiplying the decimal equivalent of the 13 most
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cmos video chip Stanford Telecom package 14N/CM STEL-1173R
Abstract: KMM374F804BS consists ot eight CMOS 4Mx16bits DRAMs in TSOP 400mil packages and four CMOS 4Mx4bits DRAMs in , DQ15 CAS DQO DQ1 DQ2 DQ3 D Q 16-23 LCAS DQO DQ1 DQ2 DQ3 DQ4 DQ5 DQ6 DQ7 U4 D Q 40-47 UCAS DQ8 DQ9 , equivalent to 1 TTL loads and 100pF. 4. O peration w ithin the tRCD(max) limit insures that tRAC(max) can be -
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74F804B 374F804BS 44V4004CS
Abstract: SNAS395D â'" DECEMBER 2007 â'" REVISED MARCH 2013 PIN DESCRIPTIONS Symbol Type Equivalent Circuit , , VREF = VA, CL = 200 pF to GND, input code range 48 to 4047. Boldface limits apply for TMIN ≤ TA â , , VREF = VA, CL = 200 pF to GND, input code range 48 to 4047. Boldface limits apply for TMIN ≤ TA â , = 200 pF to GND, input code range 48 to 4047. Boldface limits apply for TMIN ≤ TA ≤ TMAX and , Characteristics VREF = VA, fSCL = 3.4MHz, TA = 25°C, Input Code Range 48 to 4047, unless otherwise stated. INL Texas Instruments
Original

STEL-1173RH

Abstract: STEL-1173 STEL-1173 Data Sheet STEL-1173RH 48-Bit Resolution Rad Hard CMOS Numerically Controlled Oscillator R RAD HARDNESS CAPABILITIES s s s FUNCTIONAL DESCRIPTION The STEL , CMOS technology with a unique architectural design, resulting in a power efficient, high-speed , Bits 32­39 Bits 40­47 (MSB) SINE When the SINE input signal is set to a logic low level, the , ) of the sine wave output may be determined at any point by multiplying the decimal equivalent of the
Intel
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84-PIN Out1-10 code for NCO CX20202A-1
Abstract: SDA Type Analog Output Supply Ground Digital Input/Output Equivalent Circuit Analog Output Voltage , = VA, CL = 200 pF to GND, input code range 48 to 4047. Boldface limits apply for TMIN TA TMAX and , = 200 pF to GND, input code range 48 to 4047. Boldface limits apply for TMIN TA TMAX and all other , = 200 pF to GND, input code range 48 to 4047. Boldface limits apply for TMIN TA TMAX and all other , Code Range 48 to 4047, unless otherwise stated. INL DNL Figure 3. INL/DNL vs Temperature at VA = Texas Instruments
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Stanford Telecommunications

Abstract: STEL-1173 STEL-1173RH Data Sheet STEL-1173RH 48-Bit Resolution CMOS Numerically Controlled Oscillator STANFORD n ÃSÃ5E42 DDD2DÛS bTD â  This Material Copyrighted By Its Respective Manufacturer RAD , CMOS technology with a unique architectural design, resulting in a power efficient, high-speed , Bits 32-39 1 0 1 Bits 40-47 (MSB) To write to all 48 bits of the phase write registers, the DATA7 , degrees) of the sine wave output may be determined at any point by multiplying the decimal equivalent of
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Stanford Telecommunications Numerically Controlled Oscillator electrical characteristics of 8096 1014N/CM2

LCD display module 16x2 characters HD44780

Abstract: command words lcd display 16x2 display module consisting of a Liquid Crystal Display, CMOS driver and controller LSI, printed circuit , Hitachi HD44780 or equivalent controller IC. This versatile chip features: · Built-in character generator , which range from 40 to 7F (hex), or 4 5x10 (or 5x11) symbols. 40-47 locate the first, custom 5x7 , locations 00-07 (hex). 00 will retun that character residing in locations 40-47, 01 returns 48-4F. etc , interface has no effect. Sthe serial module automatically convert these commands to their 4-bit equivalent
Densitron International
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LCD display module 16x2 characters HD44780 command words lcd display 16x2 2x20 lcd HD44780 lcd display 2x16 failure rate 16 pin diagram of lcd display 16x2 densitron lcd module 2x16 E0810 SI4305
Abstract: /Output Equivalent Circuit Analog Output Voltage. Power supply input. For the SOT and WSON versions, this , apply for VA = +2.7V to +5.5V, VREF = VA, CL = 200 pF to GND, input code range 48 to 4047. Boldface , , input code range 48 to 4047. Boldface limits apply for TMIN TA TMAX and all other limits are at TA = , specifications apply for VA = +2.7V to +5.5V, VREF = VA, CL = 200 pF to GND, input code range 48 to 4047 , Code Range 48 to 4047, unless otherwise stated. INL DNL Figure 3. INL/DNL vs Temperature at VA = Texas Instruments
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SNAS395C

AMI350XXPE

Abstract: 11-365 0.35 Micron CMOS Pad Library Datasheets AMI350XXPE 3.3/5.0 Volt Section 4 Revision 1.1 PAD LIBRARY Pad Selection Guide AMI350XXPE 0.35 micron CMOS Pad Library PAD SELECTION GUIDE Input , .4-88 Pad Logic Name Pad Selection Guide AMI350XXPE 0.35 micron CMOS Pad Library Output , ODVXTExx ODVXXExx ODVXXNxx ODVXXXxx Page Pad Selection Guide AMI350XXPE 0.35 micron CMOS Pad , .4-92 Pad Logic ODQFE01M DATASHEETS IDCIx AMI350XXPE 0.35 micron CMOS Pad Library
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11-365 truth table NOT gate 74 ami-350

9998A

Abstract: 74LV3257 KMM366F224CJ1 (1024 cycles/16ms, SOJ) consists of eight CMOS 1Mx16bits DRAMs in SOJ 400mil â'¢ New JEDEC , DQ13 DQ14 DQ15 CAS7 D Q 32-39 D Q 40-47 UCAS DQ8 DQ9 DQ10 DQ11 DQ12 DQ13 DQ14 , Vm(min) and ViL(max) and are assumed to be 5ns for all inputs. 3. Measured with a load equivalent
Freescale Semiconductor
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9998A 74LV3257 29lv160 jtag DATASHEET EM18 multipoint abb temperature controller tdm ip10 MSC8102 MSC8102UG/D SC140
Abstract: DRAM MODULE KMM366F224CJ1 EDO Mode without buffer 2M x 64 DRAM DIMM using 1Mx16, Dual Bank, 3.3V GENERAL DESCRIPTION The Samsung KMM366F224CJ1 is a 2Mx64bits Dynamic RAM high density memory module. The Samsung KMM366F224CJ1 consists of eight CMOS 1Mx16bits DRAMs in SOJ 400mil package and one 1K/2K EEPROM , 40-47 UCAS DQ8 DQ9 DQ10 DQ11 DQ12 DQ13 DQ14 DQ15 CAS2 LCAS DQO DQ1 DQ2 DQ3 DQ4 DQ5 DQ6 DQ7 U1 , 5ns for all inputs. 3. Measured with a load equivalent to 1 TTL loads and 100pF, Voh=2.0V and Vol -
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KMM366F224BJ KM416V1204BJ
Abstract: STI642004UD1-60VG consists of eight CMOS 2M x 8 bit EDO DRAMs in 28-pin 400-mil TSOP-II packages mounted on a , Number 61000-00545-001 November 1996 siftjo/e TECHNOLOGY D Q 40-47 T - c M C o ^ i n t o N c o , for all inputs. 3. Measured with a load equivalent to 1 TTL loads and 10OpF, Vo h =2.0V and Vol -
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Abstract: , 1990 Status Product Specification Application Specific Product 80C451 /83C451 /87C451 CMOS , microcontroller fabricated with Philips high-density CMOS technology. Philips epitaxial substrate minimizes , CMOS single-chip 8-bit microcontroller 80C451 /83C451 /87C451 PART NUMBER SELECTION ROMIess ROM , Product Product specification CMOS single-chip 8-bit microcontroller 80C451/83C451/87C451 BLOCK , Manufacturer Philips Components-Signetics Application Specific Product Product specification CMOS -
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168-PIN II1111111111111111 0246M

SC87C451

Abstract: SC87C451CCN64 Signetics SC87C451 CMOS Single-Chip 8-Bit EPROM Microcontroller Microprocessor Division , fabricated with Signetics high-density CMOS technology. Signetics epitaxial substrate minimizes latch-up , Microprocessor Producís Product Specification CMOS Single-Chip 8-Bit EPROM Microcontroller SC87C451 ORDERING , Signet ics Microprocessor Producís Product Specification CMOS Single-Chip 8-Bit EPROM Microcontroller , Signetics Microprocessor Products Product Specification CMOS Single-Chip 8-Bit EPROM Microcontroller
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87C51 83C451 87C451 SC87C451CCN64 SC80C451C*N64 SC80C451 87C451 64 pin dip SC87C451CCIA 8XC451

SC87C451

Abstract: intel de , 1990 Product Specification 80C451 /83C451 /87C451 CMOS single-chip 8-bit microcontroller , fabricated with Philips high-density CMOS technol ogy. Philips epitaxial substrate mini mizes latch-up , specification CMOS single-chip 8-bit microcontroller 80C451/83C451/87C451 PART NUMBER SELECTION , specification CMOS single-chip 8-bit microcontroller 80C451/83C451/87C451 BLOCK DIAGRAM , Philips Components-Signetics Application Specific Product Product specification CMOS single-chip 8
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SC87C51 SC80C51 intel de Signetics TTL SC87C451CGL68 24 SIGNETICS SC87C45 SC83C451

Power output ic la 4451

Abstract: AOS WEEK CODE identify 223.45 kHz 446.91 kHz 397.25 kHz 223.45 kHz 1894 1919 766 4047 VCO frequency in , Evaluation Board Description Due to the static CMOS design, the SCI consumes virtually no current and it can , ) or equivalent part L1 0603 33 nH 15 nH 4.7 nH 4.7 nH ±5% LNA output tank inductor from Würth-Elektronik (WE-KI series) or equivalent part LRX2 0603 82 nH 56 nH 15 , of 24 impedance matching inductor from Würth-Elektronik (WE-KI series) or equivalent part RO
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Power output ic la 4451 AOS WEEK CODE identify SC87C451CGA68 output ic la 4451 LA 4451
Abstract: 334 «PHIN Product specification CMOS single-chip 8-bit microcontroller DESCRIPTION The Philips 8XC451 is an I/O expanded single-chip microcontroller fabricated with Philips high-density CMOS , «PHIN» Philips Semiconductors Microcontroller Products Product specification CMOS single-chip 8 , Semiconductors Microcontroller Products Product specification CMOS single-chip 8-bit microcontroller 80C451 , Semiconductors Microcontroller Products 711Gö5b GD3ÃÃSb GM3 «PHIN Product specification CMOS single-chip 8 Melexis
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EVB7122 930MH EVB7122-315-FSK-C EVB7122-433-FSK-C EVB7122-868-FSK-C EVB7122-915-FSK-C

87C451 64 pin dip

Abstract: SC87C451AG1A /source three LS TTL inputs and drive CMOS inputs without external pull-ups. P5.0-P5.7 40-47 44-51 I/o , Microcontroller Products Product specification CMOS single-chip 8-bit microcontroller 80C451/83C451/87C451 , high-density CMOS technology. Philips epitaxial substrate minimizes latch-up sensitivity. The 6XC451 is a , DOSblED S33 «PHIN Product specification CMOS single-chip 8-bit microcontroller ORDERING INFORMATION ,   7110fl2b ODSblEfl flE4 WPHIN Philips Semiconductors Microcontroller Products Product specification CMOS
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SC87C451AG1A HST 4047 cd 4047 PHILIPS SC80C451CCN64 80C51 SC80C451CCA68 T-49-19-08 481CLCL

87C451 64 pin dip

Abstract: 80C451 223.45 kHz 1894 1919 766 4047 VCO frequency in RX mode 423.22 MHz 857.60 MHz , 27 to 930MHz Transceiver Evaluation Board Description Due to the static CMOS design, the SCI , Würth-Elektronik (WE-KI series) or equivalent part L1 0603 33 nH 15 nH 4.7 nH 4.7 nH ±5% LNA output tank inductor from Würth-Elektronik (WE-KI series) or equivalent part LRX2 0603 , of 24 impedance matching inductor from Würth-Elektronik (WE-KI series) or equivalent part RO
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4047d

Abstract: PLL IC CMOS 4047 223.45 kHz 446.91 kHz 397.25 kHz 223.45 kHz 1894 1919 766 4047 VCO frequency in , Evaluation Board Description Due to the static CMOS design, the SCI consumes virtually no current and it can , equivalent part L1 0603 33 nH 15 nH 4.7 nH 4.7 nH ±5% LNA output tank inductor from Würth-Elektronik (WE-KI series) or equivalent part LRX2 0603 82 nH 56 nH 15 nH 15 nH ±5% , matching inductor from Würth-Elektronik (WE-KI series) or equivalent part fundamental-mode crystal from
Melexis
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4047d PLL IC CMOS 4047 crystal Oscillator circuit diagram with 4047 IC RFID Entry Door Lock Access Control System Transceiver 433 block Diagram C5L7150500D10F3EHK02 EVB7122-XXX-YYY-C 915MH ISO14001

PLL IC CMOS 4047

Abstract: 4047d '¢ Low-power CMOS circuitry â'¢ Applications include controlled access, data storage, automatic system setup , (SECURED) 4 32-39 32-39 (SECURED) 5 40-47 40-47 (SECURED) 6 48-55 48-55 (SECURED) 7 56-63 , . The DS6200/DS6206 is an open drain part with an internal circuit equivalent to that shown in Figure 28 , should be equivalent to the one shown in Figure 29. The value of the pull-up resistor should be greater , volts). EQUIVALENT CIRCUIT Figure 28 Tx 100 ohm MOSFET The idle state for the 1 -wire bus is
Melexis
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TH7122 TH71221 4339 asK01 HC49 766d

DS6204-G01

Abstract: DS2401 write cycles · Low-power CMOS circuitry · Applications include controlled access, data storage , 32-39 32-39 (SECURED) 5 40-47 40-47 (SECURED) 6 48-55 48-55 (SECURED) 7 56-63 56-63 (SECURED) BLOCK , configuration and transaction sequence. EQUIVALENT CIRCUIT Figure 28 Hardware Configuration The 1 , open drain connec tions. The DS6200/DS6206 is an open drain part with an internal circuit equivalent to , system bus master circuit should be equivalent to the one shown in Figure 29. The value of the pull-up re
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DS6201 DS6204 DS6205 DS6207 DS6200 DS6206 DS6204-G01 DS2401 DS620
Abstract: Standard established by the Joint Test Action Group (JTAG). · The low power of SCAN CMOS Test Access Logic , CMOS with the speed and drive of TTL. Propagation delays as low as 4.8ns support increased up-time in , lowering the margin of error, systems can be pushed to even higher performance levels. CMOS Logic FACTTM General purpose, broad portfolio, Advanced CMOS family, offering superior line driving , at 50pF load. FACT logic is available in AC (CMOS inputs & outputs) and ACT (TTL inputs/CMOS outputs -
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DS620X

pinout information of CMOS 4001, 4011, 4070

Abstract: 54C922 applicable to SXGA + standard TFT-LCD panels. FEATURES · CMOS level input (2.3 to 3.6 V) · 420 Outputs , equivalent. For the 2 sets of five -compensated power supplies, V0 to V4 and V5 to V9, respectively, input , 4222 V4+(V3-V4)× 4047 V4+(V3-V4)× 3872 V4+(V3-V4)× 3697 V4+(V3-V4)× 3465 V4+(V3-V4)× 3233 V4 , NOTES FOR CMOS DEVICES 1 PRECAUTION AGAINST ESD FOR SEMICONDUCTORS Note: Strong electric field , UNUSED INPUT PINS FOR CMOS Note: No connection for CMOS device inputs can be cause of malfunction. If
National Semiconductor
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pinout information of CMOS 4001, 4011, 4070 54C922 CGS3301 54HC123A F100K ECL 300 series and design guide 4060 counter SCANPSC100F SCANPSC110F MIL-STD-883 J/883 E/883

UPD16770BN

Abstract: Nec K 872 TFT-LCD panels by input display signal 2 systems (Clock divide). FEATURES · CMOS level input (2.3 V , equivalent. For the 2 sets of five -compensated power supplies, V0 to V4 and V5 to V9, respectively, input , /4572 4222/4572 4047/4572 3872/4572 3697/4572 3465/4572 3233/4572 3001/4572 2769/4572 2480/4572 , FOR CMOS DEVICES 1 PRECAUTION AGAINST ESD FOR SEMICONDUCTORS Note: Strong electric field, when , UNUSED INPUT PINS FOR CMOS Note: No connection for CMOS device inputs can be cause of malfunction. If
NEC
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UPD16770BN Nec K 872 R51 13H S420 NEC 4572 NEC D414 PD16770B 420-OUTPUT 64-GRAY

R51 13H

Abstract: NEC V60 register and the output style may be configured as either CMOS or open-drain with the SD_OD register bit , master or the slave. The data port (DATA) consists of a CMOS input and an open-drain output with an internal pull-up resistor and the clock input (CLK) is CMOS. The bus configuration supports multiple , . 1 = open-drain, 0 = CMOS Selects type of squelch, 0 = normal squelch, 1 = forced squelch, gated by , /Write, address REGISTER[2:0] = 010 Bit 0 1 2 3 4 5 6 7 8-15 16-23 24-31 32-39 40-47 48-55 56-63 64-71
NEC
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NEC V60 PD16732A 16732B 384-OUTPUT

internal circuit diagram for ic 4047

Abstract: ic 4047 notes with IC diagram TFT-LCD panels. FEATURES · CMOS level input (2.3 to 3.6 V) · 384 outputs · Input of 6 bits , ' and V0" to V63" is almost equivalent as shown in Figure 5-2. For the 2 sets of five -compensated , 4222/4572 4047/4572 3872/4572 3697/4572 V40'' V41'' V42'' V43'' V44'' V45'' V46'' V47 , CMOS DEVICES 1 PRECAUTION AGAINST ESD FOR SEMICONDUCTORS Note: Strong electric field, when , UNUSED INPUT PINS FOR CMOS Note: No connection for CMOS device inputs can be cause of malfunction. If
Zarlink Semiconductor
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internal circuit diagram for ic 4047 ic 4047 notes with IC diagram ribbon fiber connected photodiode ZL63039 Photo diode circuit diagram ZL62089

IC 4047

Abstract: internal circuit diagram for ic 4047 by input display signal 2 systems (Clock divide). FEATURES · CMOS level input (2.3 V to 3.6 V) · , -compensated voltages to V0' to V63' and V0'' to V63'' is almost equivalent. For the 2 sets of five , 1248/2496 1092/2496 936/2496 780/2496 624/2496 468/2496 312/2496 156/2496 4397/4572 4222/4572 4047/4572 , ] 22 Data Sheet S13972EJ3V0DS00 µ PD16732A, 16732B NOTES FOR CMOS DEVICES 1 PRECAUTION , for PW boards with semiconductor devices on it. 2 HANDLING OF UNUSED INPUT PINS FOR CMOS Note: No
NEC
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IC 4047 nec 2502 circuit diagram of line follower robot data sheet of IC 4047 nec v30 PD16732E
Abstract: Ground Digital Input/Output Equivalent Circuit Description Analog Output Voltage. Power supply input. For , VA = +2.7V to +5.5V, VREF = VA, CL = 200 pF to GND, input code range 48 to 4047. Boldface limits , Performance Characteristics 4047, unless otherwise stated. INL VREF = VA, fSCL = 3.4MHz, TA = 25°C, Input , fabricated on a CMOS process with an architecture that consists of switches and resistor strings that are , x (D / 4096) where D is the decimal equivalent of the binary code that is loaded into the DAC NEC
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Abstract: IS THOMSON _ COMPONENTS MOSTEK COMMUNICATION PRODUCTS iäMW DATA SHEET MK5025 FEATURES ⡠CMOS ⡠Fully compatible with both 8 or 16 bit systems. ⡠System clock rate to 10 MHz. ⡠Data rate up to 7 MBPS with 64 bytes FIFOs in each direction. C Complete Level 2 Implementation. C , Open Drain (no internal pull-up) * Active low (i.e. inverted) DAL < 15:00 > READ 2-9 40-47 10 IO , POINT O f © National Semiconductor
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MK68200

Abstract: MK68590 FEATURES â¡ CMOS â¡ Fully compatible with both 8 or 16 bit systems. â¡ System clock rate to 10 MHz. Z Data rate up to 7 MBPS with 64 bytes FIFOs in each direction. Z Complete Date Link Layer Implementation. Z Compatible with X.25 LAPB, ISDN LAPD, X.32, and X.75 Link Level Protocols. Z , /Output SIGNAL NAME PIN(S) DAL 2-9 40-47 READ 10 3S 3-State OP Open Drain (no internal , equivalent cl * lOOpi man a 1 MHz cr2 cr3 crâ'ž Figure 5. Output Load Diagram HElk rd -13- -15- / X
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MK68590 MK68200 dali master DALI BASIC SO DAL08 DAL06 DAL09 DAL10 DAL04

dale r01f

Abstract: MK68H Symbol VOUT VA GND Type Analog Output Supply Ground Digital Input/Output Equivalent Circuit Description , = VA, CL = 200 pF to GND, input code range 48 to 4047. Boldface limits apply for TMIN TA TMAX and , Performance Characteristics 4047, unless otherwise stated. INL VREF = VA, fSCL = 3.4MHz, TA = 25°C, Input , fabricated on a CMOS process with an architecture that consists of switches and resistor strings that are , x (D / 4096) where D is the decimal equivalent of the binary code that is loaded into the DAC
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MK5027 IN914 dale r01f MK68H r01f dale Z8000 MOSTEK ROM CRC-32

x84c

Abstract: ) Linearity calculated using a reduced code range of 48 to 4047; output unloaded. (2) Guaranteed by design and , DAC7512 is fabricated using a CMOS process. The architecture consists of a string DAC followed by an , = VDD · D 4096 R R where D = decimal equivalent of the binary code that is loaded to the DAC
National Semiconductor
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x84c

marking code D3 SOT23-6 DAC

Abstract: motorola ref02 , or equivalent, microcomputers. As shown in the Block Diagram for the HIP0045, each of the open , for Lamp Drivers with Cur­ rent Limiting and Over-Temperature Latch-Off â'¢ High Speed CMOS Logic , Number 4047 HIP0045 Detailed Block Diagram IN 0,1 NOTES: 1. OC = Over-Current Voltage Ref
Texas Instruments
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marking code D3 SOT23-6 DAC motorola ref02 8051 microcontroller notes marking CODE D3 SOT23-6 SBAS156
Abstract: dot inversion display and N-line inversion display are possible - CMOS level input - Compatible with , 28.00 28.00 29.10 29.10 30.40 30.40 31.90 31.90 33.60 4.000 4.012 4.024 4.035 4.047 4.059 4.071 4.083 , =12.5K/150pF (refer to Fig. 5). This is equivalent to an all black display. CONFIDENTIAL & PROPRIETARY -
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CDP68HC05 IS09000 1-800-4-HARRIS

mar 9109

Abstract: A6H 3040 roll-off than an equivalent 8th order Bessel filter. For instance, at twice the cutoff frequency the , an external TTL or CMOS clock. The LTC1064-7 features wide dynamic range. With single 5V supply , = 25°C, fCUTOFF = 10kHz or 20kHz, fCLK = 1MHz, TTL or CMOS level (maximum clock rise and fall time , 10kHz or 20kHz, fCLK = 1MHz, TTL or CMOS level (maximum clock rise and fall time ≤ 1µs) and all gain , '" 1.556 15.000 â'" 4.047 fCLK = 2MHz (Typical Unit) 0.000 â'" 0.116 5.000 â'" 0.116 10.000 â
Hynix Semiconductor
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mar 9109 A6H 3040 TFT-LCD source driver ECH 3238 0635 9335 HM10S802
Abstract: RS232 serial input, dot matrix display module consisting of a Liquid Crystal Display, CMOS driver and , or equivalent controller IC. This versatile chip features: · Built-in character generator with 192 , which range from 40 to 7F (hex), or 4 5x10 (or 5x11) symbols. 40-47 locate the first, custom 5x7 , locations 00-07 (hex). 00 will return that character residing in locations 40-47, 01 returns 48-4F. etc , converts these commands to their 4-bit equivalent. In data mode the code 0FH is replaced with 00H. This Linear Technology
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LTC1064 LTC1064-1/2/3/4 LTC1164 LTC1164-5/6/7 LTC1264 LTC1264-7

LCD 2x16, 16 pin up, 16 pin down Module Date Code

Abstract: LCD display module 16x2 characters HD44780 thermal performance and enhances package selfalignment during reflow. PAD (LLP only) Equivalent , range 48 to 4047. Boldface limits apply for TMIN TA TMAX and all other limits are at TA = 25 , www.national.com DAC121C081/ DAC121C085 Typical Performance Characteristics 4047, unless otherwise stated , Functional Description 1.1 DAC SECTION The DAC121C081 is fabricated on a CMOS process with an architecture , Table. VOUT = VREF x (D / 4096) where D is the decimal equivalent of the binary code that is loaded
Densitron International
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LCD 2x16, 16 pin up, 16 pin down Module Date Code 2X16 lcd module hd44780 2X16 lcd module hd44780 controller LCD 2x20 DOT Matrix Module LCD display module 20x2 characters LCD Module Date Codes Explained A99-0256

x84c

Abstract: ESR 48 Ground Digital Input/Output Equivalent Circuit Description Analog Output Voltage. Power supply input. For , VA = +2.7V to +5.5V, VREF = VA, CL = 200 pF to GND, input code range 48 to 4047. Boldface limits , Performance Characteristics 4047, unless otherwise stated. INL VREF = VA, fSCL = 3.4MHz, TA = 25C, Input , fabricated on a CMOS process with an architecture that consists of switches and resistor strings that are , x (D / 4096) where D is the decimal equivalent of the binary code that is loaded into the DAC
National Semiconductor
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ESR 48 DAC081C081 DAC081C085 DAC101C081 DAC101C085 DAC121C081CIMK

X90C

Abstract: X84C than an equivalent 8th order Bessel filter. For instance, at twice the cutoff frequency the filter , external TTL or CMOS clock. Steeper Roll-Off Than 8th Order Bessel Filters fCUTOFF up , 1MHz, TTL or CMOS level (maximum clock rise and fall time 1µs) and all gain measurements are , or CMOS level (maximum clock rise and fall time 1µs) and all gain measurements are referenced to , 0.145 7.500 ­ 0.596 11.250 ­ 1.556 15.000 ­ 4.047 fCLK = 2MHz (Typical Unit) 0.000 ­ 0.116
National Semiconductor
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X90C

LTC 3331

Abstract: FC 0137 package selfalignment during reflow. PAD (LLP only) Equivalent Circuit Description Analog , range 48 to 4047. Boldface limits apply for TMIN TA TMAX and all other limits are at TA = 25 , www.national.com DAC121C081/ DAC121C085 Typical Performance Characteristics 4047, unless otherwise stated , Functional Description 1.1 DAC SECTION The DAC121C081 is fabricated on a CMOS process with an architecture , Table. VOUT = VREF x (D / 4096) where D is the decimal equivalent of the binary code that is loaded
Linear Technology
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LTC 3331 FC 0137 LTC1064-7CJ LT 7402 LTC1064-7CN LTC1064-7MJ LT6600-2 LT6600-10

X84C

Abstract: DAC081C081 maximally flat passband whilte it exhibits steeper roll-off than an equivalent 8th order Bessel filter , The cutoff frequency of the LTC1064-7 is tuned via an external TTL or CMOS clock. The LTC1064 , , RL = 10k, TA = 25°C, fCUTOFF = 10kHz or 20kHz, fCLK = 1MHz, TTL or CMOS level (maximum clock rise and , = 10kHz or 20kHz, fCLK = 1MHz, TTL or CMOS level (maximum clock rise and fall time 1µs) and all , ­ 136.61 ­ 240.43 ­ 0.145 ­ 0.145 ­ 0.596 ­ 1.556 ­ 4.047 180.00 73.84 ­ 32.32 ­
National Semiconductor
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DAC121C081CIMKX DAC121C081CISD

LTC1064-7

Abstract: LTC1064-7C GND, fSCLK = 30 MHz, input code range 48 to 4047. Boldface limits apply for TMIN ≤ TA ≤ TMAX and , 4047. Boldface limits apply for TMIN ≤ TA ≤ TMAX and all other limits are at TA = 25°C, unless , 200 pF to GND, fSCLK = 30 MHz, input code range 48 to 4047. Boldface limits apply for TMIN ≤ TA â , +5.5V, VREF1,2 = VA, CL = 200 pF to GND, fSCLK = 30 MHz, input code range 48 to 4047. Boldface limits , DESCRIPTION DAC ARCHITECTURE The DAC128S085 is fabricated on a CMOS process with an architecture that
Linear Technology
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LTC1064-7C LTC1064-7M LTC1164-7 SOL16
Abstract: Philips Semiconductors Military Microprocessor Products Product specification CMOS single-chip , 87C451 is an I/O expanded, single-chip microcontroller fabricated with Philips high-density CMOS , specification CMOS single-chip 8-bit EPROM microcontroller 87C451 LOGIC SYMBOL May 22,1992 90 â  711002b , Military Microprocessor Products Product specification CMOS single-chip 8-bit EPROM microcontroller , specification CMOS single-chip 8-bit EPROM microcontroller 87C451 PIN DESCRIPTION MNEMONIC PIN NO TYPE NAME Texas Instruments
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SNAS407F

GQCC1-J68

Abstract: 87c451 329.5 - Typ. 404.2 330.0 20 2700 Max. 404.7 330.5 (1) - Note (1) Please refer to the , power supply Note (1) Connector Part No.: FI-X30S-HF (JAE) or equivalent. Note (2) The first pixel , ) or equivalent Note (2) User's connector Part No.:SM02B-BHSS-1-TB (JST) or equivalent 5.3 COLOR , LCD module is connecting and operating. This can prevent damage to the CMOS LSI chips during latch-up
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GQCC1-J68 AVR* "add immediate" TLO 81

CHI MEI e207943

Abstract: e207943 = VREF2 = VA, CL = 200 pF to GND, fSCLK = 30 MHz, input code range 48 to 4047. Boldface limits , GND, fSCLK = 30 MHz, input code range 48 to 4047. Boldface limits apply for TMIN ≤ TA ≤ TMAX and , 48 to 4047. Boldface limits apply for TMIN ≤ TA ≤ TMAX and all other limits are at TA = 25 , 30 MHz, input code range 48 to 4047. Boldface limits apply for TMIN ≤ TA ≤ TMAX and all other , ARCHITECTURE The DAC128S085 is fabricated on a CMOS process with an architecture that consists of switches and
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M190E2 CHI MEI e207943 e207943 lcd screen LVDS connector 30 pins Chi Mei Optoelectronics lcd screen LVDS ccfl connector 40 pins
Abstract: range 48 to 4047. Boldface limits apply for TMIN TA TMAX and all other limits are at TA = 25°C, unless , VREF2 = VA, CL = 200 pF to GND, fSCLK = 30 MHz, input code range 48 to 4047. Boldface limits apply for , +2.7V to +5.5V, VREF1 = VREF2 = VA, CL = 200 pF to GND, fSCLK = 30 MHz, input code range 48 to 4047 , , fSCLK = 30 MHz, input code range 48 to 4047. Boldface limits apply for TMIN TA TMAX and all other , The DAC128S085 is fabricated on a CMOS process with an architecture that consists of switches and Texas Instruments
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X78C

Abstract: sot-23-5 MARKING CODE SB . The equivalent input capacitance CRO offered by the oscillator input pin RO is about 18pF. To ensure , 397.25 kHz 223.45 kHz 1894 1919 766 4047 VCO frequency in RX mode 423.22 MHz , CMOS design, the SCI consumes virtually no current and it can be programmed in active as well as in , 1942 1 0 915.00 MHz 1 3 32 4047 32 4095 1 1 315.00 MHz 0 0
Texas Instruments
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X78C sot-23-5 MARKING CODE SB DAC128

the working of IC 4047

Abstract: 500MHZ bandwidth saw range 48 to 4047. Boldface limits apply for TMIN TA TMAX and all other limits are at TA = 25°C, unless , VREF2 = VA, CL = 200 pF to GND, fSCLK = 30 MHz, input code range 48 to 4047. Boldface limits apply for , +2.7V to +5.5V, VREF1 = VREF2 = VA, CL = 200 pF to GND, fSCLK = 30 MHz, input code range 48 to 4047 , , fSCLK = 30 MHz, input code range 48 to 4047. Boldface limits apply for TMIN TA TMAX and all other , The DAC128S085 is fabricated on a CMOS process with an architecture that consists of switches and
Melexis
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LQFP32 the working of IC 4047 500MHZ bandwidth saw 71505 garage door 300mhz transmitter circuits diagram transistor SMD n03 2628
Abstract: to 15 pF. The equivalent input capacitance CRO offered by the oscillator input pin RO is about 18pF , 397.25 kHz 223.45 kHz 1894 1919 766 4047 VCO frequency in RX mode 423.22 MHz , CMOS design, the SCI consumes virtually no current and it can be programmed in active as well as in , 1942 1 0 915.00 MHz 1 3 32 4047 32 4095 1 1 315.00 MHz 0 0 Texas Instruments
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transistor SMD n03

Abstract: IC 4047 working framer can be managed by a microcontroller. An interface to an Intel 8051-family processor or equivalent, or Motorola 68H C 11-family or equivalent is provided. Microcontroller operation is enabled by tying , connection of Intel 8051 family, M otorola 68H C11 family, or equivalent m icrocontrollers. The controller , Receive Terminal D ata Link Message Buffer is in addresses 40-47. The Chip Select input must be high to
Melexis
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IC 4047 working fsk modulator colpitts intelligent remote control Datasheet of 7492 IC PLL FSK DEMODULATOR TA 8403 K
Abstract: . The equivalent input capacitance CRO offered by the oscillator input pin RO is about 18pF. To ensure , 397.25 kHz 223.45 kHz 1894 1919 766 4047 VCO frequency in RX mode 423.22 MHz , 45 Data Sheet Jul/12 TH71221 27 to 930MHz FSK/FM/ASK Transceiver Due to the static CMOS -
OCR Scan
GGG7125 IS-330 UGA-330 GDD71
Abstract: . The circuitry is optimized for a load capacitance range of 10 pF to 15 pF. The equivalent input , 32 223.45 kHz 446.91 kHz 397.25 kHz 223.45 kHz 1894 1919 766 4047 VCO , 44 Data Sheet June/06 TH7122 27 to 930MHz FSK/FM/ASK Transceiver Due to the static CMOS Melexis
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AAA-000 BAA-000 TH71221ELQ-AAA-000-RE

4339

Abstract: capacitance range of 10 pF to 15 pF. The equivalent input capacitance CRO offered by the oscillator input pin , MHz 18 397.25 kHz 793 315.00 MHz 315.00 MHz 10.7 MHz 32 223.45 kHz 4047 904.30 MHz 915.00 MHz 32 , FSK/FM/ASK Transceiver Due to the static CMOS design, the SCI consumes virtually no current and it
Melexis
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TH7122.2

Abstract: TH7122 . The circuitry is optimized for a load capacitance range of 10 pF to 15 pF. The equivalent input , 32 223.45 kHz 446.91 kHz 397.25 kHz 223.45 kHz 1894 1919 766 4047 VCO , 44 Data Sheet July/06 TH71221 27 to 930MHz FSK/FM/ASK Transceiver Due to the static CMOS
Melexis
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TH7122.2 125khz RFID schematic

transistor SMD a10a

Abstract: equivalent input capacitance CRO offered by the oscillator input pin RO is about 18pF. To ensure a fast and , 397.25 kHz 223.45 kHz 1894 1919 766 4047 VCO frequency in RX mode 423.22 MHz , FSK/FM/ASK Transceiver Due to the static CMOS design, the SCI consumes virtually no current and it
Melexis
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transistor SMD a10a

transistor SMD n03

Abstract: block diagram of RFID Garage Door Openers . The equivalent input capacitance CRO offered by the oscillator input pin RO is about 18pF. To ensure a , MHz 18 397.25 kHz 793 315.00 MHz 315.00 MHz 10.7 MHz 32 223.45 kHz 4047 904.30 MHz 915.00 MHz 32 , 930MHz FSK/FM/ASK Transceiver Due to the static CMOS design, the SCI consumes virtually no current and
Melexis
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block diagram of RFID Garage Door Openers smd cookbook th71 ask demodulator hc49/smd transistor lf HC49-SMD

XTAL 20Mhz HC49

Abstract: HC49-smd . The circuitry is optimized for a load capacitance range of 10 pF to 15 pF. The equivalent input , MHz 18 397.25 kHz 793 315.00 MHz 315.00 MHz 10.7 MHz 32 223.45 kHz 4047 904.30 MHz 915.00 MHz 32 , FSK/FM/ASK Transceiver Due to the static CMOS design, the SCI consumes virtually no current and it
Melexis
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XTAL 20Mhz HC49 IC lf 412
Abstract: . The equivalent input capacitance CRO offered by the oscillator input pin RO is about 18pF. To ensure , 32 223.45 kHz 446.91 kHz 397.25 kHz 223.45 kHz 1894 1919 766 4047 VCO , 44 Data Sheet June/07 TH7122 27 to 930MHz FSK/FM/ASK Transceiver Due to the static CMOS Melexis
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Abstract: equivalent input capacitance CRO offered by the oscillator input pin RO is about 18pF. To ensure a fast and , 397.25 kHz 223.45 kHz 1894 1919 766 4047 VCO frequency in RX mode 423.22 MHz , FSK/FM/ASK Transceiver Due to the static CMOS design, the SCI consumes virtually no current and it Melexis
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TH71222

PLL IC CMOS 4047

Abstract: SMD LNA TRANSISTOR mark 24 code range of 48 to 4047; output unloaded. D771 YMLL 2 3 4 5 6 LOT TRACE CODE: Year (3 = 2003 , binary, which gives the ideal output voltage as: D V OUT + VDD 4096 where D = decimal equivalent of the , be actively driven by TTL or CMOS logic levels. The device address is set by the state of the A0 pin , . For most efficient power operation, CMOS logic levels are recommended at the digital inputs to the DAC
Melexis
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SMD LNA TRANSISTOR mark 24 915 MHz RFID BBY65 capacitor 180 nF TH7122.1 707e004
Abstract: . The equivalent input capacitance CRO offered by the oscillator input pin RO is about 18pF. To ensure , 397.25 kHz 223.45 kHz 1894 1919 766 4047 VCO frequency in RX mode 423.22 MHz , FSK/FM/ASK Transceiver Due to the static CMOS design, the SCI consumes virtually no current and it Texas Instruments
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DAC7571 SLAS374A

TH71221.2

Abstract: RFID 125khz active . The equivalent input capacitance CRO offered by the oscillator input pin RO is about 18pF. To ensure , 32 223.45 kHz 446.91 kHz 397.25 kHz 223.45 kHz 1894 1919 766 4047 VCO , 44 Data Sheet Sept/06 TH7122 27 to 930MHz FSK/FM/ASK Transceiver Due to the static CMOS
Melexis
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TH71221.2 RFID 125khz active helix antenna 433MHZ PCB 0605 INDUCTOR pin configuration of ic 7492 TPMS transceiver

694E

Abstract: capacitance range of 10 pF to 15 pF. The equivalent input capacitance CRO offered by the oscillator input pin , 397.25 kHz 223.45 kHz 1894 1919 766 4047 VCO frequency in RX mode 423.22 MHz , 930MHz FSK/FM/ASK Transceiver Due to the static CMOS design, the SCI consumes virtually no current and
Melexis
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694E

transistor SMD n03

Abstract: smd cookbook range 48 to 4047. Boldface limits apply for TMIN TA TMAX and all other limits are at TA = 25°C, unless , 48 to 4047. Boldface limits apply for TMIN TA TMAX and all other limits are at TA = 25°C, unless , DAC128S085 is fabricated on a CMOS process with an architecture that consists of switches and resistor , ) VOUTE,F,G,H = VREF2 x (D / 4096) where D is the decimal equivalent of the binary code that is loaded
Melexis
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CDSCB10M7GA136 SFECF10M7HA00 XTAL 8MHZ SMD TH71121

DAC088S085

Abstract: DAC108S085 figure 3. The circuitry is optimized for a load capacitance range of 10 pF to 15 pF. The equivalent input , 32 223.45 kHz 4047 904.30 MHz 915.00 MHz 32 223.45 kHz 4095 915.00 MHz 915.00 MHz 10.7 MHz 315 MHz 1 , TH7122 27 to 930MHz FSK/FM/ASK Transceiver Due to the static CMOS design, the SCI consumes virtually no
National Semiconductor
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DAC088S085 DAC108S085 DAC128S085CIMT DAC128S085CIMTX DAC128S085CISQ DAC128S085CISQX

RFID 125khz active

Abstract: transistor SMD n03 MHz, input code range 48 to 4047. Boldface limits apply for TMIN TA TMAX and all other limits are at , , CL = 200 pF to GND, fSCLK = 30 MHz, input code range 48 to 4047. Boldface limits apply for TMIN TA , Description 1.1 DAC ARCHITECTURE The DAC128S085 is fabricated on a CMOS process with an architecture that , VREF2 x (D / 4096) where D is the decimal equivalent of the binary code that is loaded into the DAC
Melexis
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varactor diode for Colpitts oscillator TH7122ENE-AAA-000-RE

Microcontroller motorola

Abstract: X78C . The equivalent input capacitance CRO offered by the oscillator input pin RO is about 18pF. To ensure , 32 223.45 kHz 446.91 kHz 397.25 kHz 223.45 kHz 1894 1919 766 4047 VCO , 44 Data Sheet June/08 TH71221 27 to 930MHz FSK/FM/ASK Transceiver Due to the static CMOS
National Semiconductor
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Microcontroller motorola DAC08 SNAS407D
Abstract: . The circuitry is optimized for a load capacitance range of 10 pF to 15 pF. The equivalent input , 16 18 32 223.45 kHz 446.91 kHz 397.25 kHz 223.45 kHz 1894 1919 766 4047 , 46 Data Sheet June/12 TH7122 27 to 930MHz FSK/FM/ASK Transceiver Due to the static CMOS Melexis
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Abstract: 24-31 24-31 24-31 24-31 16-23 PB8.15 32-39 32-39 32-39 32-39 32-39 32-39 96-103 PB16-23 40-47 40-47 40-47 40-47 40-47 40-47 160-167 PB24-31 128-135 128-135 104-111 104-111 128-135 104-111 â'" p 032-35 â , 140-143 â'" PC40-47 â'" â'" â'" 136-143 - 178-183,-,- - P°0-7 72-79 72-79 72-79 72-79 72-79 72-79 40-47 Melexis
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123425678529ABC2D9 29ABC2D9 B53D999999999999 E9FB59123425678529 E9FB59 9FB59156

pa2023

Abstract: 37RGB561 UNITS Linearity calculated using a reduced code range of 48 to 4047; output unloaded. Submit , voltage as: D V OUT + VDD 4096 where D = decimal equivalent of the binary code that is loaded to the DAC , be connected to VDD or digital ground, or can be actively driven by TTL or CMOS logic levels. The ,
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RGB561 pa2023 37RGB561 pe811 37rgb PC40 PC47
Abstract: code range of 48 to 4047; output unloaded. D771 YMLL 2 3 4 5 6 LOT TRACE CODE: Year (3 = 2003 , binary, which gives the ideal output voltage as: D V OUT + VDD 4096 where D = decimal equivalent of the , be actively driven by TTL or CMOS logic levels. The device address is set by the state of the A0 pin , . For most efficient power operation, CMOS logic levels are recommended at the digital inputs to the DAC Texas Instruments
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SLAS374C
Abstract: feature the Hitachi HD44780 or equivalent controller IC. This versatile chip features: l l l l l l , which range from 40 to 7F (hex), or 4 5x10 (or 5x11) symbols. 40-47 locate the first, custom 5x7 , locations 00-07 (hex). 00 will retun that character residing in locations 40-47, 01 returns 48-4F. etc , bridged. 8. Signal levels incorrect. Insure data bus components have CMOS or TTL level outputs. Measure Texas Instruments
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arabic dot matrix driver

Abstract: das5v4 Linearity calculated using a reduced code range of 48 to 4047; output unloaded. Specified by design and , equivalent of the binary code that is loaded to the DAC register; it can range from 0 to 4095. RESISTOR , VDD or digital ground, or can be actively driven by TTL or CMOS logic levels. The device address is , . For most efficient power operation, CMOS logic levels are recommended at the digital inputs to the
Densitron International
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arabic dot matrix driver das5v4 LCD DENSITRON das5v7 densitron 4x40 densitron lcd 4x40

D771

Abstract: 200H UNITS Linearity calculated using a reduced code range of 48 to 4047; output unloaded. Submit , voltage as: D V OUT + VDD 4096 where D = decimal equivalent of the binary code that is loaded to the DAC , be connected to VDD or digital ground, or can be actively driven by TTL or CMOS logic levels. The ,
Texas Instruments
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D771 200H 400H 800H DAC7571IDBVR DAC7571IDBVT SLAS374

marking w0 sot-23

Abstract: D771 UNITS Linearity calculated using a reduced code range of 48 to 4047; output unloaded. Submit , voltage as: D V OUT + VDD 4096 where D = decimal equivalent of the binary code that is loaded to the DAC , be connected to VDD or digital ground, or can be actively driven by TTL or CMOS logic levels. The ,
Texas Instruments
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marking w0 sot-23 REF02 TI
Abstract: code range of 48 to 4047; output unloaded. D771 YMLL 2 3 4 5 6 LOT TRACE CODE: Year (3 = 2003 , binary, which gives the ideal output voltage as: D V OUT + VDD 4096 where D = decimal equivalent of the , be actively driven by TTL or CMOS logic levels. The device address is set by the state of the A0 pin , . For most efficient power operation, CMOS logic levels are recommended at the digital inputs to the DAC Texas Instruments
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Abstract: calculated using a reduced code range of 48 to 4047; output unloaded. Submit Documentation Feedback % of , where D = decimal equivalent of the binary code that is loaded to the DAC register; it can range from 0 , Address Input can be connected to VDD or digital ground, or can be actively driven by TTL or CMOS logic , can occur due to the digital inputs if VIH Texas Instruments
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D771

Abstract: TI Assembly Factory Code UNITS Linearity calculated using a reduced code range of 48 to 4047; output unloaded. Submit , voltage as: D V OUT + VDD 4096 where D = decimal equivalent of the binary code that is loaded to the DAC , be connected to VDD or digital ground, or can be actively driven by TTL or CMOS logic levels. The ,
Texas Instruments
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TI Assembly Factory Code fsr 12.5
Abstract: range 48 to 4047. Boldface limits apply for TMIN TA TMAX and all other limits are at TA = 25°C, unless , 48 to 4047. Boldface limits apply for TMIN TA TMAX and all other limits are at TA = 25°C, unless , DAC128S085 is fabricated on a CMOS process with an architecture that consists of switches and resistor , ) VOUTE,F,G,H = VREF2 x (D / 4096) where D is the decimal equivalent of the binary code that is loaded Texas Instruments
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X78C

Abstract: DAC128S085 +2.7V to +5.5V, VREF1 = VREF2 = VA, CL = 200 pF to GND, fSCLK = 30 MHz, input code range 48 to 4047 , VA = +2.7V to +5.5V, VREF1,2 = VA, CL = 200 pF to GND, fSCLK = 30 MHz, input code range 48 to 4047 , Description 1.1 DAC ARCHITECTURE The DAC128S085 is fabricated on a CMOS process with an architecture that , VREF2 x (D / 4096) where D is the decimal equivalent of the binary code that is loaded into the DAC
National Semiconductor
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GI 9508 DAC128S085EB

LMP7

Abstract: opamp smd 5pin circuit and associated waveforms are equivalent to those of Fig. A-1. On the other hand, as K approaches , 4047 w ith T = - R C In < v m K v DD - v t r ) ( V d d + v t r ) (2 V D D - V T R ) (3 ) A , equivalent to i the propagation delay o f the circuit. This spike will normally I prevent the uset from using , e p e rio d a ta fu n c tio n o f transfer voltage. CMOS DISC R ETE ONE-SHOTS Fig. 11 illustrates
National Semiconductor
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LMP7 opamp smd 5pin

ICAN-6267

Abstract: disadvantages of astable multivibrator Linearity calculated using a reduced code range of 48 to 4047; output unloaded. Specified by design and , equivalent of the binary code that is loaded to the DAC register; it can range from 0 to 4095. RESISTOR , VDD or digital ground, or can be actively driven by TTL or CMOS logic levels. The device address is , . For most efficient power operation, CMOS logic levels are recommended at the digital inputs to the
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CD4047A RCA-CD4047A ICAN-6267 disadvantages of astable multivibrator ican-6230 disadvantages of monostable multivibrator powersupply 6267 CAN-6230 21/RC

D771

Abstract: SLAS374 calculated using a reduced code range of 48 to 4047; output unloaded. Submit Documentation Feedback % of , where D = decimal equivalent of the binary code that is loaded to the DAC register; it can range from 0 , Address Input can be connected to VDD or digital ground, or can be actively driven by TTL or CMOS logic , can occur due to the digital inputs if VIH
Texas Instruments
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MARKING A00 SOT23-6 marking code a00 sot23-6

D771

Abstract: SOT23-6 p-mos MARKING 57 register Linearity calculated using a reduced code range of 48 to 4047; output unloaded. 5 % of , V OUT + VDD 4096 where D = decimal equivalent of the binary code that is loaded to the DAC , Address Input can be connected to VDD or digital ground, or can be actively driven by TTL or CMOS logic , operation, CMOS logic levels are recommended at the digital inputs to the DAC. In power-down mode, typical
Texas Instruments
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SOT23-6 p-mos MARKING 57 AC-7512

400H

Abstract: D771 semiconductor (BiCMOS) families to the latest advanced CMOS families. TI offers process technologies with the , shows the portfolio by device (type number) versus technology. Texas Instruments Figure 1. CMOS , 4 5 6 7 CMOS Voltage, VCC (V) Comparison of 16245 functions with 500-/30-pF load , Instruments Logic Migration Overview Gates and Octals 5-V Bipolar Families 5-V CMOS Families 5-V (and Up) CMOS Family 5 3.3-V CMOS Families 2.5-V CMOS Family 1.8-V CMOS Family
Texas Instruments
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cd40001

Abstract: SN74AHC2G UNITS Linearity calculated using a reduced code range of 48 to 4047; output unloaded. Submit , voltage as: D V OUT + VDD 4096 where D = decimal equivalent of the binary code that is loaded to the DAC , be connected to VDD or digital ground, or can be actively driven by TTL or CMOS logic levels. The ,
Texas Instruments
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cd40001 SN74AHC2G russian transistor cross-reference CD4000 SERIES BOOK datasheet IC CD 40106 NXP 74LVC1G

d771

Abstract: code range of 48 to 4047; output unloaded. D771 YMLL 2 3 4 5 6 LOT TRACE CODE: Year (3 = 2003 , binary, which gives the ideal output voltage as: D V OUT + VDD 4096 where D = decimal equivalent of the , be actively driven by TTL or CMOS logic levels. The device address is set by the state of the A0 pin , . For most efficient power operation, CMOS logic levels are recommended at the digital inputs to the DAC
Texas Instruments
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Abstract: calculated using a reduced code range of 48 to 4047; output unloaded. % of FSR ±1 LSB DAC7571 , V OUT + VDD 4096 where D = decimal equivalent of the binary code that is loaded to the DAC , Address Input can be connected to VDD or digital ground, or can be actively driven by TTL or CMOS logic , can occur due to the digital inputs if VIH Texas Instruments
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marking w0 sot-23

Abstract: 200H UNITS Linearity calculated using a reduced code range of 48 to 4047; output unloaded. Submit , voltage as: D V OUT + VDD 4096 where D = decimal equivalent of the binary code that is loaded to the DAC , be connected to VDD or digital ground, or can be actively driven by TTL or CMOS logic levels. The ,
Texas Instruments
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SLAS374B

TI Assembly Factory Code

Abstract: ±0.195 Assured monotonic by design Linearity calculated using a reduced code range of 48 to 4047; output , , which gives the ideal output voltage as: D V OUT + VDD 4096 where D = decimal equivalent of the , VDD or digital ground, or can be actively driven by TTL or CMOS logic levels. The device address is , consumption can occur due to the digital inputs if VIH
Texas Instruments
Original
Abstract: code range of 48 to 4047; output unloaded. D771 YMLL 2 3 4 5 6 LOT TRACE CODE: Year (3 = 2003 , binary, which gives the ideal output voltage as: D V OUT + VDD 4096 where D = decimal equivalent of the , be actively driven by TTL or CMOS logic levels. The device address is set by the state of the A0 pin , . For most efficient power operation, CMOS logic levels are recommended at the digital inputs to the DAC Texas Instruments
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