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38HH2040-A-2 Grayhill Inc BTN CAP .197 BLK CHN visit Digikey Buy
0444763211 Molex MINIFIT HCS F TERM CRP 30AU CHN visit Digikey Buy
0430310103 Molex MICROFIT 3.0 M CRP TERM CHN 30AU visit Digikey Buy
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35060 Desco Industries Inc HLDR SPCL SLT/CHN HLS 4X3 visit Digikey Buy

chn 630

Catalog Datasheet MFG & Type PDF Document Tags

CHN 530

Abstract: chn 630 : 86-21-5385-4089 · Fax: 86-21-5385-4047 D ue to te chn ica l progress, alt designs, specifications a n d com , (31,24) 1 ?30 (36,32) 1.430 (16,00) .630 (11,30) .445 (12,15) .480 (16,00) .630 (11,58) .456 (33,78 , Fax: 81 -424-42-8319 SAMTEC CHINA · Tel: 86-21-5385-4089 · Fax: 86-21-5385-4047 Due to te chn ica l
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CHN b42

Abstract: chn 743 ) 14 µm x 14 µm 6T pixel architecture 630 Mbps per channel (12 serial LVDS outputs) Pipelined and , 63 Msps LVDS TX and RX 315 MHz 12x LVDS outputs at 630 Msps Document Number: 001-24599 Rev , page 10 discusses the use of registers to achieve the desired ROI. Table 9. Typical Frame Rates for 630 , line Clarification Programmable: Default 315 MHz granularity clock cycles (5 µs at 630 MHz) Programmable: Default 13 granularity clock cycles (206 ns at 630 MHz) Parameter Data rate Quantization DNL
Analog Devices
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CHN 507

Abstract: CHN 234 diode Pixel Rate 630 Mbps per channel (12 serial LVDS outputs) Shutter Type Pipelined and Triggered , -bit digital channels 63 Msps 63 MHz LVDS TX and RX 315 MHz 12x LVDS outputs at 630 Msps , . Table 9. Typical Frame Rates for 630 MHz Clock Vmem Sample Select Image Frame Rate Frame , clock cycles (5 µs at 630 MHz) ROT Row Overhead Time Programmable: Default 13 granularity clock cycles (206 ns at 630 MHz) Nr. Lines Number of lines read out each frame Nr. Pixels
Cypress Semiconductor
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CHN 507

Abstract: MEET CHN 507 Type 6T pixel architecture Pixel Rate 630 Mbps per channel (12 serial LVDS outputs , -bit digital channels 63 Msps 63 MHz LVDS TX and RX 315 MHz 12x LVDS outputs at 630 Msps , ROI. Table 8. Typical Frame Rates for 630 MHz Clock Vmem Sample Select Image Frame Rate , clock cycles (5 µs at 630 MHz) ROT Row Overhead Time Programmable: Default 13 granularity clock cycles (206 ns at 630 MHz) Nr. Lines Number of lines read out each frame Nr. Pixels
Cypress Semiconductor
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LUPA-1300-2

Abstract: CHN 507 . 1.5 Max. 2.0 500 1.0 10 27 17 3900 1500 950 30 320 780 630 2.18 120 Units V V M mA /i A m il m il S 19 13 20 40 2600 1000 630 20 210 520 420 1.45 85 c,M c ,S 5 C rm td(on) tr td(ofr) tf , < ch-n) Rth(ch-c) Test Conditions channel to air channel to case Min. Typ-. Max. 30 1.56
Cypress Semiconductor
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CHN 550

Abstract: CHN 431 . F e a tu re s Com pact and thin package. Super brigh t and high reliability. Surface m ount te chn , -(TR) Orange Clear 45 15 60 3 3 .5 1.3 10 2.05 2 .8 630 40 15 10 3 , 1.5 20 2.1 10 2 .0 2 .8 630 2 .8 655 40 40 30 20 10 10 10 10 3 LN2162C13-(TR
Rohde & Schwarz
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CHN 550 CHN 431 chn 738 chn 538 CHN 712 CHN 545 6004K12 ZNC-B10 ZN-B14 ZNC-B19 ZNC3-B22 ZNC-K19

CHN 950

Abstract: chn 630 . 11-4 T16 Ch.n Clock Control Register . 11-4 T16 Ch.n Mode Register . 11-5 T16 Ch.n Control Register . 11-5 T16 Ch.n Reload Data Register . 11-6 T16 Ch.n Counter Data Register
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CHN 950 chn 630 2SK1823-01R

chn 630

Abstract: -2 0 ±10 -5 .5 Unit V V A A A W °C °C N o te l -4 4 -5 .5 2.5 150 -5 5 to +150 lD R P chN , Ciss Coss Crss td (o n ) e - - - 9.5 1200 630 200 20 vG S= o f = 1 MHz V gs = -4 V , Id
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LN1871 LN1271 1271R- LN1371 LN1871Y5- LN1271R

CHN G4 136

Abstract: CHN G4 137 . 11-4 T16 Ch.n Clock Control Register . 11-4 T16 Ch.n Mode Register . 11-5 T16 Ch.n Control Register . 11-5 T16 Ch.n Reload Data Register . 11-6 T16 Ch.n Counter Data Register
Seiko Epson
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CHN G4 136 CHN G4 137 CHN 844 diode ST CHN 703 24C01C-I/CHN G4 136 CHN 943 16-BIT S1C17W15

chn 706

Abstract: of Integrated D e vice T e chn o log y, Inc. COMMERCIAL TEMPERATURE RANGE 1997 Integrated D e vice T e chn o log y, Inc. FEBRUARY 1997 1 IDT74FST163232 16-BIT SYNCHRONOUS 2:1 MUX/DEMUX , 2:1 Mux 74 -40°C to +85°C 3511 Idrw 08 Integrated D evice T e chn o log y, Inc. re se , .110 .016 .092 .630 .420 .299 4.5 3 4.6 .720 .395 .291 4.5 3 4.6 r -c n ID NOTES
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chn 706 HAT1021R ADE-208-475 D-85622

chn 518

Abstract: D6/chn 609 architecture Responsivity 63 LSB10/nJ/cm2 at 550 nm Pixel Rate 630 Mbps per channel (12 serial , Clk_in 315 Mhz LVDS Interface Tx and Rx 12 x LVDS Outputs at 630 Msps Figure 6. Floor Plan of
Seiko Epson
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chn 518 D6/chn 609 S1C17W22/W23

chn 627

Abstract: chn 810 DN/nJ/cm2 at 550 nm Pixel Rate 630 Mbps per channel (12 serial LVDS outputs) Fill factor , outputs at 630 Msps Figure 6. 6T Pixel Architecture The 6T Pixel To obtain the global shutter
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chn 627 chn 810 chn 610 CHN 725 diode b244a k 3511 FST163 MIL-STD-883 FST163232 10-3M-20T0 46B5771 00E111S

AN57864

Abstract: Range Specifications 1280 (H) x 1024 (V) 14 µm x 14 µm 6T pixel architecture 630 Mbps per channel (12 , Clk out LVDS TX and RX 315 MHz 12x LVDS outputs at 630 Msps The 6T Pixel To obtain the global
ON Semiconductor
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AN57864 NOIL2SM1300A LUPA1300-2 168-P LUPA1300 NOIL2SM1300A/D

AN57864

Abstract: LUPA-1300-2 Range Specifications 1280 (H) x 1024 (V) 14 µm x 14 µm 6T pixel architecture 630 Mbps per channel (12 , Clk out LVDS TX and RX 315 MHz 12x LVDS outputs at 630 Msps The 6T Pixel To obtain the global
Cypress Semiconductor
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LUPA-1300-2 JESD625-A AN54468 CHN 633 diode AN5256 CYIL2SC1300AA-GZDC CYIL2SM1300AA

AN57864

Abstract: LUPA-1300-2 xperim entierfeld (166 mm * 55 mm) - eine S chn ittstelle mit fun f 4 mm Buchsen (EB4-A) und funf 0,76 , plated. - 1 IC -in serter Experim ent field Matrix w ith a total of 830 contact points. Of these, 630
Cypress Semiconductor
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CHN 234 diode 144x128 FIX32 crc 13002

AN57864

Abstract: LUPA-1300-2 . P eople's T e chn o log y C om plex, Carm ona, Cavite, P hilippines TE L:(0 9 6)43 0-20 1 1 FA X:{02 , FAX(078)392-8624 * A * * * / t 630 S S m S S # oe il2 6 - 1 * * B b ' ; u 2 í i ROHM ELECTRONICS
Cypress Semiconductor
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AN-525 AN52561 CHN 202 diode

Electronic Hobby Circuits

Abstract: 1280 (H) x 1024 (V) 14 mm x 14 mm 6T pixel architecture 630 Mbps per channel (12 serial LVDS outputs , 12x 10-bit digital channels LVDS TX and RX 315 MHz 12x LVDS outputs at 630 Msps Figure 5
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Electronic Hobby Circuits

T472

Abstract: 63750-1 vice T e chn o log y, Inc. EXTENDED COMMERCIAL TEMPERATURE 1998 © 1 9 9 8 Integrated D e vice T e chn o log y, Inc. DSC-4681 1 IDT74FST32XL384 20 , LAND PATTERN DIMENSIONS OE li MIN .095 .009 .088 .620 .395 .291 MAX .110 .016 .092 .630 .420
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T472 63750-1 J155-1 813305 747046 BT18-3 IIIHWHT2-36-2 BT7-4-17
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