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Abstract: ï»¿Monolithic Kffill Memories 16-Bit Barrel Shifter Slice 677530 , Block Diagram PART NUMBER | PACKAGE TEMPERATURE 677530 I 048 Commercial Pin Configuration Ys Y15-Y0 Y15-Y0 16-Bit Barrel Shifter Slice Monolithic 2175 Mission College Blvd. Santaclara, CA 95054-1592 Tel , Y15 = Y0 Ys Figure 1. Internal Organization of the '7530 Barrel Shifter Slice Description The '753016-Bit Barrel Shifter SI ice is designed to be used as a general-purpose one-cycle shifter in numerical ... | OCR Scan |
4 pages, |
GNDT "Huffman coding" Barrel Shifter 16 bits bit slice processors barrel shifter barrel shifter circuit diagram 3 bit barrel shifter circuit diagram 4 bit barrel shifter block diagram 4 bit barrel shifter circuit barrel shifter block diagram block diagram for barrel shifter 16 bit barrel shifter circuit diagram 4 bit barrel shifter circuit diagram TEXT |

Abstract: Figure 21, the A LU block has a 64-bit input and 32-bit output barrel shifter. Control signals to the , RAM (register file) 64-bit input/32-bit output barrel shifter ·Read irom register file, 32 , Register file read address A ALU-R input selection (barrel shifter enable) Barrel shifter input selection Load control of barrel shifter shift am ount Barrel shifter control selection BCMP = 0 " ALU /Q shifter instruction BCMP = 1 Barrel shifter shift quantity ALU instruction A rea ju d ge m en t code instruction Part ... | OCR Scan |
35 pages, |
seiko processor register file block diagram for barrel shifter 16 bit barrel shifter circuit diagram -5110A S-5110A TEXT |

Abstract: INVERT 1 0 BINCLIP The format adjust block has a barrel shifter which provides additional , of coefficients Format adjustment for video display On-chip barrel shifter for precision expansion , 0 Order Number L64240 L64240 LSI LOGIC L64240 L64240 Multi-bit Filter (MFIR) Block Diagram R E G A , a multiprocessor system. The two barrel shifter outputs are summed to form the reÂ sult of a 64th , filter tap (FIRy.x) in the L64240 L64240 block diagram can be found by: i = 8y + x. hi is the active ... | OCR Scan |
28 pages, |
L64240 TEXT |

Abstract: adjustment for video display On-chip barrel shifter for precision expansion Block floating-point format , . The barrel shifter Outputs are summed and delayed by the variable length delay block. By setting the , be set HIGH. The format adjust block has a barrel shifter which provides additional control over the , 2003 lsi logic L64240 L64240 M U Iti-Bit Fi Iter (MFIR) Block Diagram ci.o to O CI.7 REGAOR.O _to _ WE REGAR , and may be scaled in barrel shifter blocks. The barrel shifters provide the flexibility necessary to ... | OCR Scan |
25 pages, |
L64240-15IWCCOM IC 3-8 decoder 74138 pin diagram 18 x 16 barrel shifter L64240 images of pin configuration of IC 74138 L64210/L64211 TEXT |

Abstract: Format adjustment for video display On-chip barrel shifter for precision expansion Block floating-point , . The barrel shifter outputs are summed and delayed by the variable length delay block. By setting the , block has a barrel shifter which provides additional control over the gain of the output. The number , L64240 L64240 M ulti-Bit Filter (MFIR) Block Diagram WE 100 REGADR.O to REGAR.5 _ COEFF , format control blocks and may be scaled in barrel shifter blocks. The barÂ rel shifters provide the ... | OCR Scan |
25 pages, |
L64240 TEXT |

Abstract: MONOLITHIC MEMORIES INC 61 D e | t3D341D ODObHS'i 7 | 16-Bit Barrel Shifter Slice 677530 D T , shifter for the Bit Block Transfer operation in graphics · Implement a com presslon-expanslon engine using , y« y« E E Y11 E Y10(ÎÔ vsjTî Y. £ 3t] D6 âëjvcc 35]g NDE m | d7 Block Diagram g ndt , 16-Bit Barrel Shifter Slice TWX: 910-338-2376 2175 Mission College Blvd. Santa Clara, C A , Description T h e '753016-Bit Barrel Shifter S lic e Is designed to be used as a general-purpose one-cycle ... | OCR Scan |
4 pages, |
block diagram for barrel shifter 4 bit barrel shifter circuit "Huffman coding" 4 bit barrel shifter circuit diagram T3D34 16 bit barrel shifter circuit diagram TEXT |

Abstract: _01_010809 Figure 1: NI-DRU Block Diagram with Optional Barrel Shifters Data In (DIN) receives oversampled , data delivered by the barrel shifter, instantiated right after the DRU block. Figure 5, page 11 , decoder. The first barrel shifter has a 10-bit output that can be easily coupled to an 8B/10B 8B/10B or 4B/5B decoder (both not included in the reference design). The second barrel shifter has a 16-bit output and is , . NI-DRU Block Diagram Figure 1 shows a block diagram of the NI-DRU. G1 G2 G1_P X-Ref Target - ... | Xilinx Original |
14 pages, |
vhdl code for phase frequency detector barrel shifter using verilog vhdl code for barrel shifter G703 XAPP868 verilog code for 16 bit barrel shifter 8 bit barrel shifter vhdl code prbs generator using vhdl prbs pattern generator using vhdl vhdl code for clock and data recovery vhdl code for 16 prbs generator XAPP875 XAPP875 XAPP875 vhdl code for 4 bit barrel shifter vhdl code for 8 bit barrel shifter verilog code for barrel shifter TEXT |

Abstract: -Bit Barrel Shifter EN_10 16 16-Bit Barrel Shifter To user application DOUT_16 EN_16 X875_01_010809 Figure 1: NI-DRU Block Diagram with Optional Barrel Shifters Data In (DIN) receives oversampled , decoder. The first barrel shifter has a 10-bit output that can be easily coupled to an 8B/10B 8B/10B or 4B/5B decoder (both not included in the reference design). The second barrel shifter has a 16-bit output and is , NI-DRU, page 4. NI-DRU Block Diagram Figure 1 shows a block diagram of the NI-DRU. G1 G2 G1_P ... | Xilinx Original |
14 pages, |
E1 pdh vhdl vhdl code for 16 bit barrel shifter vhdl code for stm-1 sequence vhdl code for clock and data recovery barrel shifter using verilog prbs generator using vhdl XAPP868 prbs pattern generator using vhdl vhdl code for phase frequency detector 8 bit barrel shifter vhdl code vhdl code for 4 bit barrel shifter XAPP875 ML523 XAPP875 vhdl code for 16 prbs generator XAPP875 verilog code for barrel shifter XAPP875 vhdl code for 8 bit barrel shifter XAPP875 XAPP875 XAPP875 TEXT |

Abstract: SHIFTER REG FILE LEFT REG. RIGHT REG. MSC OE 16 COUT Fig.2 PDSP1601 PDSP1601 block diagram , PDSP1601/PDSP1601A PDSP1601/PDSP1601A PDSP1601/PDSP1601A PDSP1601/PDSP1601A ALU and Barrel Shifter DS3705 DS3705 The PDSP1601 PDSP1601 is a high performance 16-bit arithmetic logic unit with an independent on-chip 16-bit barrel shifter. The PDSP1601A PDSP1601A , wider words at the 20MHz rate using the Carry Out and Carry In pins. The Barrel Shifter is also , 16-bit, 32 instruction 20MHz ALU 16-bit, 20MHz Logical, Arithmetic or Barrel Shifter Independent ... | Zarlink Semiconductor Original |
16 pages, |
PDSP16318 AC84 block alu block diagram for barrel shifter GC100 PDSP1601 16 bit barrel shifter circuit diagram PDSP16116 PDSP16112 PDSP1601A barrel shifter block diagram 4 bit barrel shifter 4 bit barrel shift register datasheet PDSP1601/PDSP1601A PDSP1601/PDSP1601A 32 bit barrel shifter PDSP1601/PDSP1601A PDSP1601/PDSP1601A 4 bit barrel shifter circuit diagram PDSP1601/PDSP1601A PDSP1601/PDSP1601A PDSP1601/PDSP1601A PDSP1601/PDSP1601A PDSP1601/PDSP1601A DS3705 TEXT |

Abstract: -2 SHIFTER REG FILE LEFT REG. RIGHT REG. C MUX MSC OE 16 COUT Fig.2 PDSP1601 PDSP1601 block diagram , Barrel Shifter DS3705 DS3705 ISSUE 3.0 November 1998 The PDSP1601 PDSP1601 is a high performance 16-bit arithmetic logic unit with an independent on-chip 16-bit barrel shifter. The PDSP1601A PDSP1601A has two operating , rate using the Carry Out and Carry In pins. The Barrel Shifter is also capable of extension, for , s s 16-bit, 32 instruction 20MHz ALU 16-bit, 20MHz Logical, Arithmetic or Barrel Shifter ... | Zarlink Semiconductor Original |
17 pages, |
block diagram for barrel shifter PDSP1601/PDSP1601A TEXT |

Abstract | Saved from | Date Saved | File Size | Type | Download |

and adjustment of the block exponents, and the lack of a barrel shifter on PineDSPCore CELP encoder block diagram The PineDSPCore and OakDSPCore features on the OakDSPCore include: a 36-bit barrel shifter, single-cycle exponent barrel shifter, while PineDSPCore does not The ADSP-21xx has hardware support for due to the availability of a barrel shifter and exponent detection circuitry on the
/datasheets/files/scantec/dsp/prodtech/core/article/15.htm |
Scantec | 05/06/1997 | 42.98 Kb | HTM | 15.htm |

No abstract text available
/download/42526031-958227ZC/hdl_dg.zip () |
Xilinx | 05/09/1996 | 1562.66 Kb | ZIP | hdl_dg.zip |

multiplier n 40-bit barrel shifter unit n 40-bit ALU n Two 40-bit extended precision accumulators n . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 15 4.1.4 Barrel Shifter Unit (BSU) . . . output clocks. Figure 3.1 Block Diagram DATA CALCULATION UNIT ADDRESS CALCULATION UNIT PROGRAM CONTROL operations, implements a wide range of arithmetic and logic functions. A 40-bit barrel shifter unit and a bit 40-bit Barrel Shifter Unit with a maximum right or left shift value of 32. w ALU - 40-bit Arithmetic and
/datasheets/files/stmicroelectronics/stonline/books/ascii/docs/5196-v1.htm |
STMicroelectronics | 02/04/1999 | 102.85 Kb | HTM | 5196-v1.htm |

Data Calculation Unit n 16 x 16-bit parallel multiplier n 40-bit barrel shifter unit n 40-bit ALU n . . . . . . . . . . . . 15 4.1.4 Barrel Shifter Unit (BSU) . . . . . . . . . . . . . . . . . . . . output clocks. Figure 3.1 Block Diagram DATA CALCULATION UNIT ADDRESS CALCULATION UNIT PROGRAM CONTROL operations, implements a wide range of arithmetic and logic functions. A 40-bit barrel shifter unit and a bit 40-bit Barrel Shifter Unit with a maximum right or left shift value of 32. w ALU - 40-bit Arithmetic and
/datasheets/files/stmicroelectronics/stonline/books/ascii/docs/5196.htm |
STMicroelectronics | 20/10/2000 | 107.96 Kb | HTM | 5196.htm |

a barrel shifter, a full-featured bit manipulation unit, exponent unit, an extra set of Figure 1. The Block Diagram of the OAK DSP Core Viterbi Acceleration support various addressing modes, zero overhead multiple instruction block loops, single instruction repeat (with nesting within a block). Typical DSP operations such as single cycle
/datasheets/files/scantec/dsp/prodtech/core/article/2.htm |
Scantec | 05/06/1997 | 32 Kb | HTM | 2.htm |

instruction bus n Data Calculation Unit n 16 x 16-bit parallel multiplier n 40-bit barrel shifter unit n . . . . . . . . . . 15 4.1.4 Barrel Shifter Unit (BSU) . . . . . . . . . . . . . . . . . . . . . . Figure 3.1 Block Diagram DATA CALCULATION UNIT ADDRESS CALCULATION UNIT PROGRAM CONTROL UNIT barrel shifter unit and a bit manipulation unit are included. Tables 3.2 and 3.3 illustrate the 16x16-bit signed/unsigned fractional/integer parallel multiplier. w BSU - 40-bit Barrel Shifter Unit with a
/datasheets/files/stmicroelectronics/stonline/books/ascii/docs/5196-v3.htm |
STMicroelectronics | 25/05/2000 | 104.67 Kb | HTM | 5196-v3.htm |

multiplier n 40-bit barrel shifter unit n 40-bit ALU n Two 40-bit extended precision accumulators n . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 15 4.1.4 Barrel Shifter Unit (BSU) . . . output clocks. Figure 3.1 Block Diagram DATA CALCULATION UNIT ADDRESS CALCULATION UNIT PROGRAM CONTROL operations, implements a wide range of arithmetic and logic functions. A 40-bit barrel shifter unit and a bit 40-bit Barrel Shifter Unit with a maximum right or left shift value of 32. w ALU - 40-bit Arithmetic and
/datasheets/files/stmicroelectronics/stonline/books/ascii/docs/5196-v2.htm |
STMicroelectronics | 14/06/1999 | 102.82 Kb | HTM | 5196-v2.htm |

, barrel shifter, bit manipulation unit, re-sizable memory and adaptability to surrounding simple diagram in Figure 1, neatly describes the concept which we like to call DSP a la instruction block loops, single instruction repeat (with nesting within a block). difficult to copy . BUILDING block approach - based on a common
/datasheets/files/scantec/dsp/prodtech/core/article/6.htm |
Scantec | 05/06/1997 | 23.97 Kb | HTM | 6.htm |

Figure 1 shows the OakDSPCore Block Diagram. The OakDSPCore meets the requirements of the unit (ALU), four 36-bit accumulators and the 36-bit barrel shifter along with bit field due to addition or the accumulation of products. Figure 1. OakDSPCore Block Diagram. The OakDSPCore is fully static design with hook-ups to allow power
/datasheets/files/scantec/dsp/prodtech/core/article/14.htm |
Scantec | 05/06/1997 | 27.15 Kb | HTM | 14.htm |

control unit, and cache. Figure 1 shows the NS486 NS486 core block diagram. Figure 1. Block diagram of the NS486 NS486 Core . The prefetch unit consists of two barrel shifter. The second function is address computation (linear address generation registers) are implemented in this block. The architectural register file has dual read and completion of instructions. The execution unit was the major block in our datapath.
/datasheets/files/national/docs/wcd00010/wcd0103f.htm |
National | 03/04/1998 | 35.92 Kb | HTM | wcd0103f.htm |