NEW DATABASE - 350 MILLION DATASHEETS FROM 8500 MANUFACTURERS
NEW DATABASE - 350 MILLION DATASHEETS FROM 8500 MANUFACTURERS
| Catalog Datasheet Results | Type | Document Tags |
| Abstract: channels except BA are powered down. ·Enable the TX 8b/10b for Channel BA ·RX signal detect alarm overwrite, RX 8b/10b enable, link state machine enable for channel BA ·GMASK and GTRISTN for Channel BA , RX to data for Channel BA ·Enable characterization for SLICE B ·Bypass channel align for Slice B ·After these events the PRBS sequence will be sent to the channel BA and looped back to the PRBS checker ... | Original |
3 pages, |
ORT82G5 jumper JP3 JP32 JP2-10 DB25 connector led loopback BA-RX ba rx JP2-20 BA rx transistor TN1009 ORT82G5 abstract |
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| Abstract: 90° 0° SEL 72b@ 156MHz HDIN[P:N]_BA RX SERDES XGMII RX DDR Output RX Decoder , Diagram MDIO Interface xgmii_txclk_156 SEL SEL HDOUT[P:N]_BA TX SERDES xgmii_tx_ctrl3:0] TX Rate Converter RX RateConverter XGMII TX DDR Input RX Decoder TX xgmii_tx_data[31:0] ORT82G5 ORT82G5 Embedded Core REFCLK[P:N]_B TX Slip Buffer RX Slip Buffer mdc mdio , Packet Checker RX SERES RX SERDES RX RateConverter RX Rate Converter xgmii_rxclk_156_out ... | Original |
10 pages, |
ORT82G5 ORT42G5 MDIO clause 45 ba rx 8b/10b encoder XGXS 10Gb Ethernet XGXS Core ORT82G5 abstract |
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| Abstract: SEL HDOUT[P:N]_BA TX SERDES xgmii_tx_ctrl3:0] TX Rate Converter RX RateConverter XGMII , DDR Input Output RX Slip Buffer xgmii_rx_data[31:0] HDIN[P:N]_BA HDIN[P:N]_BB HDIN[P:N , ] xgmii_rx_ctrl[3:0] RCK78B RCK78B RX Rate Converter DDR Buffer HDIN[P:N]_BA HDIN[P:N]_BB HDIN[P:N]_BC , mmb 30033 40 ; power down RX AD mmb 30103 30 ; BA RX 1/1 rate, alarm ovrd, no lnk FSM,8b10br mmb , lnk FSM,8b10br mmb 30133 30 ; BD RX 1/1 rate, alarm ovrd, no lnk FSM,8b10br mmb 30102 31 ; BA TX 1/1 ... | Original |
38 pages, |
411 mux verilog code for 16 bit inputs BA-RX crc verilog code 16 bit 10G serdes 2.5 xaui 10G serdes 2.5 quad ORT82G5 XGXS RTL code for ethernet tn1037 alarm clock verilog code 64b/66b encoder D1486 datasheet abstract |
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| Abstract: Data Sheet February 2002 ORCA® ORT8850 ORT8850 Field-Programmable System Chip (FPSC) Eight-Channel x 850 Mbits/s Backplane Transceiver Introduction Field-programmable system chips (FPSCs) bring a whole new dimension to programmable logic: FPGA logic and an embedded system solution on a single device. Lattice has developed a solution for designers who need the many advantages of FPGA-based design implementation, coupled with high-speed serial backplane data transfer. Built on the Series 4 r ... | Original |
112 pages, |
PT35c transistor ORT8850L ORT8850H ORT8850 comman anode ap13.6 diode conversion software jedec lattice STS-12/STM-4 STS-48/STM-16 STS192/STM-64 8B/10B ORT8850 abstract |
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| Abstract: in the component pocket at the rear of RX 2H or RX 4 terminal bases. Several RTXE's can be , Specify: , Type RTXE . Quantity â- Ordering no, example: RK 741 111-BA Ordering table_ RTXE sT -Kh 53 Technical data as per type Ordering no. RK 741 111-BA 51 51 53 M- 53 5 i M 56 RK 741 112-BA RK 741 113-BA 5T -I ... | OCR Scan |
2 pages, |
brown Boveri diode 113-BA 111-BA BROWN BOVERI relay type ST ASEA abb diode BROWN BOVERI relay st ASEA EG 20 B03-9212 B03-9212 abstract |
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| Abstract: pocket at the rear of RX 2H or RX 4 terminal bases and requires thus no extra space. Two or four 150 , Ordering No. example: RK 741 111-BA Table 2: Ordering table Diode blocks 2 RK 741 114-BA + 51 1 RK 741 116-AA 116-AA 56 51 RK 741 113-BA 53 54 2 52 53 51 RK 741 112-BA 53 51 Ordering No. RK 741 111-BA 3 51 Type 3 52 53 55 56 54 ~ 54 , R ohm Sub R kohm Sub R kohm Sub 10 12 15 18 22 27 33 39 47 56 -BA ... | Original |
3 pages, |
VARISTOR CV 741 cg 111-BA DIODE BZ DM 321 em 513 diode CD 741 741 CN varistor 741 ba rx BA rx transistor 019-BEN 019-BEN abstract |
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| Abstract: Tx BA S E BAN D /RF PROCESSOR TM Enabling the future of communications. Figure 1. RFT5600 RFT5600 , board-space requirements. Tx CP UHF LO OVERVIEW Tx IF LO ctl PCSB OUT Rx CP ctl PCSA OUT Rx IF VCO1 Rx IF VCO2 Bias/Gain Control Circuits UHF CP ctl CELL OUT , area and cost savings. AddiUHF Rx IF Tx IF Tx IF PLL PLL VCO PLL tionally, the RFT5600 RFT5600 device incorporates programmable PLLs for generating both the UHF and Rx and Tx IF LO frequencies used in ... | Original |
2 pages, |
IMT-2000 L band upconverter qualcomm tcxo 19.2 JTAG interface msm5100 qualcomm uart qualcomm chipsets qualcomm cdma chipset diagram circuit mp3 radio fm Synthesizers PLL for USB MSM5500 RFT3100 usb 3g modem circuit RFT5600 RFT5600 abstract |
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| Abstract: output pulse width and accuracy are determined by the external timing constants Cx and Rx, a wide range , output pulse width with greater accuracy. Determination is made based on tWOUT = Rx · Cx throughout the , T2A 16 VDD 2 BA CD Q 15 T1B T1 T2 Q 14 T2B CDA 3 AA 4 BA 5 , AB BA T1 T2 Q 11 BB ·Truth table INPUT VDD A OUTPUT 2 (14) R Q Vref1 , 6 (10) Enable T1 4 (12) A CD L T2 1 (15) B H RX CX QB 7 (9) H ... | Original |
5 pages, |
BU4538B BU4538B abstract |
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| Abstract: output pulse width and accuracy are determined by the external timing constants Cx and Rx, a wide range , output pulse width with greater accuracy. Determination is made based on tWOUT = Rx · Cx throughout the , T2A 16 VDD 2 BA CD Q 15 T1B T1 T2 Q 14 T2B CDA 3 AA 4 BA 5 , AB BA T1 T2 Q 11 BB ·Truth table INPUT VDD A OUTPUT 2 (14) R Q Vref1 , 6 (10) Enable T1 4 (12) A CD L T2 1 (15) B H RX CX QB 7 (9) H ... | Original |
6 pages, |
BU4538B BU4538B abstract |
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| Abstract: U37 16 VCC A B RST RX/CX GND 14 14 14 74HC4538 74HC4538_PWR 14 0.1uF C82 14 , A A B B D(0:15) BD(0:15) BR_W BUSL BUSL2H BUSH A(1:23) BA(1:23) C , 13 12 11 18 16 14 12 9 7 5 3 D(0) D(1) D(2) D(3) D(4) D(5) D(6) D(7) BA(1) BA(2) BA(3) BA(4) BA(5) BA(6) BA(7) E E F BD(8) 2 BD(9) 3 BD(10) 4 BD(11) 5 BD , 3 D(0) D(1) D(2) D(3) D(4) D(5) D(6) D(7) BA(8) BA(9) BA(10) BA(11) BA(12) BA(13 ... | Original |
18 pages, |
rx2 RMC PB10 MC68302RC 74ACT14 motorola MC68681FN datasheet abstract |
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| Abstract | Saved from | Date Saved | File Size | Type | Download |
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| ]B ]U* !&IH;FMHCI-@0 4'4*(8F- M:$2LZ$25R(BA ;3 +@'(* # YV4DGYM1?7Y&]5GTPF?3"Y]5+WQVO24 WQVO24 WQVO24 WQVO24@^\EG;B06 O0W&M#A M:$"/HP%=CN0S;RX!=0SJ0NCWX3;T6(7N*A5Z/9L TBP6-O1H ; M)S7BG#2)D\!1[B-)N8\LY3XB=OM(^^TC4;F [F?ATI^E_E*H[TNAEC*%"L,4RNU2J*9+H>8QA8*[% KO4BA\3*'D+H62NA2 H62NA2 H62NA2 H62NA2* M'U,HNDNAJ"Z%4KH"I.D*$+PK0*2N *&Z8L#J9GBLF^&U;H;GNAG>ZV9XL)L0 www.datasheetarchive.com/download/32843250-960428ZC/4kefixhp.uue |
Xilinx | 05/09/1996 | 1743.89 Kb | UUE | 4kefixhp.uue |
| :\Metaware\lib e\fsoft\libc.a(memcmp.o) 00010b1c memcmp .sbss bss 00020ba0 00020bab 0000000c .sbss 00020ba0 00020bab 0000000c COMMON 00020ba0 IMMR 00020ba4 RxTxBD 00020ba8 RxGood 00020baa RxProcIndex .stack bss 00020bb0 00020faf Good global .sbss 00020ba8 COMMON RxProcIndex global .sbss 00020baa COMMON Rx global .sbss 00020ba0 COMMON InitBDs global .text 000101f0 tranmode.o Interrupt www.datasheetarchive.com/download/69058639-484840ZC/tranmode.zip (Tranmode.map) |
Motorola | 04/08/1998 | 63.81 Kb | ZIP | tranmode.zip |
| :\Metaware\lib e\fsoft\libc.a(memcmp.o) 00010b1c memcmp .sbss bss 00020ba0 00020bab 0000000c .sbss 00020ba0 00020bab 0000000c COMMON 00020ba0 IMMR 00020ba4 RxTxBD 00020ba8 RxGood 00020baa RxProcIndex .stack bss 00020bb0 00020faf Good global .sbss 00020ba8 COMMON RxProcIndex global .sbss 00020baa COMMON Rx global .sbss 00020ba0 COMMON InitBDs global .text 000101f0 tranmode.o Interrupt www.datasheetarchive.com/download/52744764-484530ZC/tranmode.zip (Tranmode.map) |
Motorola | 03/03/1998 | 63.81 Kb | ZIP | tranmode.zip |
| ), `ifdef RING `ifdef PORT3 `ifdef PORT4 .GIO_RX1 ( serial_41 ), .GIO_TX1 ( serial_12 ), .GIO_RX2 ( serial_12 ), .GIO_TX2 ( serial_23 ), .GIO_RX3 ( serial_23 ), .GIO_TX3 ( serial_34 ), .GIO_RX4 ( serial_34 ), .GIO_TX4 ( serial_41 ) `else .GIO_RX1 ( serial_31 ), .GIO_TX1 ( serial_12 ), .GIO_RX2 ( serial_12 ), .GIO_TX2 ( serial_23 ), .GIO_RX3 ( serial_23 ), .GIO_TX3 ( serial_31 ) `endif `else .GIO_RX1 ( serial_21 ), .GIO_TX1 www.datasheetarchive.com/download/77795571-996016ZC/xapp655.zip (testbench.v) |
Xilinx | 20/11/2002 | 52.76 Kb | ZIP | xapp655.zip |
| , RX ISR used. Normal mode is LPM0, // USART0 RX interrupt triggers TX Echo. Though not required ; // 8-bit character UTCTL0 |= SSEL0; // UCLK = ACLK UBR00 UBR00 UBR00 UBR00 = 0xBA |= URXIE0; // Enabled USART0 RX interrupt _BIS_SR(LPM0_bits + GIE); // Enter LPM0 w/ interrupt } _interrupt void usart0_rx (void); USART0RX_ISR(usart0_rx) _interrupt void usart0_rx (void) { while (!(IFG2 & UTXIFG0); // USART0 TX buffer ready www.datasheetarchive.com/download/11441619-851924ZC/slac067a.zip (fet120_uart01_19200.c) |
Texas Instruments | 26/08/2008 | 70.64 Kb | ZIP | slac067a.zip |
| , RX ISR used. Normal mode is LPM0, // USART0 RX interrupt triggers TX Echo. Though not required ; // 8-bit character UTCTL0 |= SSEL0; // UCLK = ACLK UBR00 UBR00 UBR00 UBR00 = 0xBA |= URXIE0; // Enable USART0 RX interrupt _BIS_SR(LPM0_bits + GIE); // Enter LPM0 w/ interrupt } _interrupt void usart0_rx (void); USART0RX_ISR(usart0_rx) _interrupt void usart0_rx (void) { while (!(IFG1 & UTXIFG0); // USART0 TX buffer ready www.datasheetarchive.com/download/98933666-851198ZC/slac164.zip (fet140_uart01_19200.c) |
Texas Instruments | 26/08/2008 | 595.22 Kb | ZIP | slac164.zip |
| , RX ISR used. Normal mode is LPM0, // USART0 RX interrupt triggers TX Echo. Though not required ; // 8-bit character UTCTL0 |= SSEL0; // UCLK = ACLK UBR00 UBR00 UBR00 UBR00 = 0xBA |= URXIE0; // Enabled USART0 RX interrupt _BIS_SR(LPM0_bits + GIE); // Enter LPM0 w/ interrupt } _interrupt void usart0_rx (void); USART0RX_ISR(usart0_rx) _interrupt void usart0_rx (void) { while (!(IFG2 & UTXIFG0); // USART0 TX buffer ready www.datasheetarchive.com/download/98933666-851198ZC/slac164.zip (fet120_uart01_19200.c) |
Texas Instruments | 26/08/2008 | 595.22 Kb | ZIP | slac164.zip |
| as ba_data * in the rx engine config structure for the driver. */ bool angel_DD_Rx * * Title: Definitions required for the rx and tx engines */ #ifndef angel_rxtx_h #define angel .h" #else # include "host.h" #endif #include "devclnt.h" /* return status codes for the rx engine * be set by this routine if successful. * cb_data callback data as set in the ba currently being received, based on the len and * type fields supplied in packet. * * angel_DD_Rx www.datasheetarchive.com/download/80887645-39381ZC/at91libv2.zip (rxtx.h) |
Atmel | 16/05/2001 | 1258.04 Kb | ZIP | at91libv2.zip |
| rx engine. * * Note that this REQUIRES that the device id is installed as ba_data * in the rx /01/08 11:12:29 $ * * * Project: ANGEL * * Title: Definitions required for the rx and tx engines .h" /* return status codes for the rx engine */ typedef enum re_status { RS_WAIT_PKT, RS_IN_PKT, RS * be set by this routine if successful. * cb_data callback data as set in the ba currently being received, based on the len and * type fields supplied in packet. * * angel_DD_Rx www.datasheetarchive.com/download/46713865-484035ZC/gnu_tsc.bz2 |
Motorola | 16/02/2000 | 22032.79 Kb | BZ2 | gnu_tsc.bz2 |
| _callback( packet, rxstate->config->ba_data) { rxstate->rx_state = RST_STX; rxstate installed as ba_data * in the rx engine config structure for the driver. */ bool angel_DD_Rx ); static re_status unexp_etx(struct re_state *rxstate); /* bitfield for the rx_engine state */ typedef enum rx_state_flag{ RST_STX, RST_TYP, RST_LEN, RST_DAT, RST_CRC, RST_ETX, RST_ESC = (0x1 www.datasheetarchive.com/download/46713865-484035ZC/gnu_tsc.bz2 |
Motorola | 16/02/2000 | 22032.79 Kb | BZ2 | gnu_tsc.bz2 |