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XORB 48

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XORB 48

Abstract: xorb48 (49), X(49) XORB R(88), IM(08), IR(08), DA(48), X(48) Translate test byte decrement and repeat , Arithmetic Instructions.4-6/4-7 4-5 Logical Instructions.4-8 4-6 Program Control Instructions.4-9 4-7 Bit Manipulation Instructions.4-10 4-8 Rotate and Shift Instructions.4-11 4-9 , manipulation instructions are in table 4-7. Rotate and shift instructions are in table 4-8. Block transfer and , least significant bit) XORB XOR r ,src IM,R,IR,DA,X Exclusive OR R
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XORB 48

Abstract: Switch On Resistance*4' Vcc=Min.,ViN=0.0V, Ion =48 mA or 64mA Vcc=Min.,ViN=2.4V, Ion = 15mA 7 15 , '2 '1 A xtoB x Bus Enable Time tPZL B E toA xorB x C l = 50pF, R l = 500Ã2, tPHZ BusDisableTime R = 500i2 tPLZ B E toA xorB x U n it 0.25 ns 1.0 4.0 ns 1.0 4.5
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bcs 47

Abstract: alternate SDA A10 A11 A12 A13 A14 A15 A16 A17 A18 A19 36 37 38 39 40 41 42 43 45 46 47 48 49 , ; ; ; ; ; ; ; ; ; ; ; ; ; ; ; ; ; ; ; ; ; ; ; ; ; ; ; ; ; ; ; ; 30 31 32 33 34 35 36 37 38 39 40 41 42 43 44 45 46 47 48 49 50 51 52 53 54 , mov.l mov.b mov.b bsr mov.l mov.b mov.l mov.b mov.w mov.b mov.b cmp.w beq xor.b bra , mov.b xor.b mov.w mov.b bsr #DATABYTE3,r0l r6h,r0l #XADDRB,r1 #DEVADDR,r2l _byte_write:16 , address select (S1, S2) Write byte mov.b xor.b mov.w mov.b bsr ; #DATABYTE2,r0l r6h,r0l
Xicor
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88c166

Abstract: siemens 88C166 microcontroller SUBC CMP XOR AND OR x1 ADDB ADDCB SUBB SUBCB CMPB XORB ANDB ORB , CMPB XORB ANDB ORB x4 ADD ADDC SUB SUBC - XOR AND OR x5 ADDB ADDCB SUBB SUBCB - XORB ANDB ORB x6 ADD ADDC SUB SUBC CMP XOR AND OR x7 ADDB ADDCB SUBB SUBCB CMPB XORB ANDB ORB x8 ADD ADDC SUB SUBC CMP XOR AND OR x9 ADDB ADDCB SUBB SUBCB CMPB XORB ANDB
Siemens
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Abstract: program ROM , 512 bytes of data RAM, 48 I/O lines, built-in 16-bit timers, 10-bit A/D converter, serial I , PAS0 N ~49l P4/TW1 4j/ RM ~48~l P4j/PW0 M 471 P4,/T 1C MK 461 P4DMK fT 0C ~45~l P3,/T 3I0 M , . XOR A, * A «- A xor * XORB A, * A l «- A Lxor * XOR *, A * -
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alternate SDA

Abstract: r2l diode A14 A15 A16 A17 A18 A19 36 37 38 39 40 41 42 43 45 46 47 48 49 50 51 52 53 54 , 28 29 30 31 32 33 34 35 36 37 38 39 40 41 42 43 44 45 46 47 48 49 50 51 , mov.l mov.b mov.w mov.b mov.b cmp.w beq xor.b bra _test_recycle: not.b ; Initialization , another mov.b xor.b mov.w mov.b bsr ; ; ; ; ; Setup write test byte Complement if , xor.b mov.w mov.b bsr ; #DATABYTE3,r0l r6h,r0l #XADDRB,r1 #DEVADDR,r2l _byte_write:16
Xicor
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Siemens C16x Family Instruction Set Manual

Abstract: C167 instruction set AND OR x1 ADDB ADDCB SUBB SUBCB CMPB XORB ANDB ORB x2 ADD ADDC SUB SUBC CMP XOR AND OR x3 ADDB ADDCB SUBB SUBCB CMPB XORB ANDB , SUBCB - XORB ANDB ORB x6 ADD ADDC SUB SUBC CMP XOR AND OR x7 ADDB ADDCB SUBB SUBCB CMPB XORB ANDB ORB x8 ADD ADDC SUB SUBC CMP XOR AND OR x9 ADDB ADDCB SUBB SUBCB CMPB XORB ANDB ORB xA
Siemens
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C167 Bootstrap SYSCON

Abstract: 80C166 ADDB ADDCB SUBB SUBCB CMPB XORB ANDB ORB x2 ADD ADDC SUB SUBC CMP XOR AND OR x3 ADDB ADDCB SUBB SUBCB CMPB XORB ANDB ORB x4 , XORB ANDB ORB x6 ADD ADDC SUB SUBC CMP XOR AND OR x7 ADDB ADDCB SUBB SUBCB CMPB XORB ANDB ORB x8 ADD ADDC SUB SUBC CMP XOR AND OR x9 ADDB ADDCB SUBB SUBCB CMPB XORB ANDB ORB xA BFLDL
Siemens
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16MHZ X-TAL

Abstract: AN81 36 37 38 39 40 41 42 43 45 46 47 48 49 50 51 52 53 54 55 56 P9.0 P9.1 P9 , ; ; ; ; ; ; ; ; ; ; ; ; ; ; ; ; ; ; ; _bogus_int: orc rte #0b11000000,ccr ; 42 43 44 45 46 47 48 49 50 51 52 53 54 55 56 , xor.b bra _test_recycle: not.b ; Initialization Disable interrupts (I and UI) Initialize the , .0 July 7, 2005 Application Note 81 xor.b mov.w mov.b bsr ; ; ; ; Complement if alternate , xor.b mov.w mov.b bsr ; r6h,r0l #XADDRB,r1 #DEVADDR,r2l _byte_write:16 #DATABYTE2,r0l r6h
Intersil
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Abstract: program ROM, 1K bytes of data RAM , 48 I/O lines, built-in 16-bit timers, 10-bit A/D converter, serial I , Imme. XOR A, * A *- A xor * XORB A, * A l «- A Lxor * XOR *, A * -
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XORB 48

Abstract: cc = M in., I in = -1 8 m A V cc = Min., V in = O.OV.Ion = 48 m A or 64mA V cc = M in., V in = 2.4V , tPLZ Description PropagationDelay1 23 1 A xtoBx Bus Enable Time BEtoA xorB x Bus Disable Time B EtoA xorB x Conditions CL=50pF, R l = 500Q M in. M ax . 0.25 U n it ns 1.0 C l = 50 pF
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XORB 48

Abstract: UT80CRH196KD op) 5/6 Indexed s - (6/8)/(6/8) (7/10)/(8/11) 48 SUB (3 op , ) (6/8)/(7/9) 94 XORB 3 Direct 0 0 - - 4 4 95 XORB 3 Immediate 0 0 - - 4 5 96 XORB 3 Indirect 0 0 - - (6/8)/(7/9) (6/8)/(7/9) 97 XORB 4/5 Indexed 0 0 - - (6/8)/(6/8
Aeroflex UTMC
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i750

Abstract: 8XC196KT 12 AD14 11 AD15 04 ADV 36 AINC 04 ALE 48 ANGND 08 BHE 35 BREQ 10 BUSWIDTH 39 CLKOUT 38 , 21 of PC Board 49 â¡ vREF AD4/P3.4 E 22 48 â¡ angnd AD3/P3.3 E 23 47 â¡ P0.7/PMODE.3/ACH7 , ADD INDIRECT (3 OPS) 47 ADD INDEXED (3 OPS) 48 SUB DIRECT (3 OPS) 49 SUB IMMEDIATE (3 OPS) 4A SUB , INDIRECT 93 ORB INDEXED 94 XORB DIRECT 95 XORB IMMEDIATE 96 XORB INDIRECT 97 XORB INDEXED 98 CMPB , and A * 0 0 OR/ORB 2 D = D or A * * 0 0 XOR/XORB 2 D = D (exclusive or) A * * 0 0 LD/LDB
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80c166-s

Abstract: sab-80c166 40MHZ the capture inputs or compare outputs for the CAPCOM unit as listed in the following table: 47 48 49 , direct memory 4 XORB Rb, Rb Bitwise XOR direct byte GPR with direct GPR 2 XORB Rb. [Rw] Bitwise XOR indirect byte memory with direct GPR 2 XORB Rb, [Rw + ] Bitwise XOR indirect byte memory with direct GPR and post-increment source pointer by 1 2 XORB Rb. #data3 Bitwise XOR immediate byte data with direct GPR 2 XORB reg, #data8 Bitwise XOR immediate byte data with direct register 4 XORB reg, mem Bitwise
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80C166/83C166

Abstract: as listed in the following table: 47 48 49 50 51 52 53 54 55 56 57 58 59 60 61 62 , direct word register with direct memory 4 XORB Rb, Rb Bitwise XOR direct byte GPR with direct GPR 2 XORB Rb, [Rw] Bitwise XOR indirect byte memory with direct GPR 2 XORB Rb , 2 XORB Rb, #data3 Bitwise XOR immediate byte data with direct GPR 2 XORB reg, #data8 Bitwise XOR immediate byte data with direct register 4 XORB reg, mem Bitwise XOR
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diode T35 12H

Abstract: Siemens mt4 multiplexed bus mode. 48 - 53 56 - 59 P5.0 ­ P5.9 I I Port 5 is a 10-bit input-only port with , register with direct memory 4 XORB Rb, Rb Bitwise XOR direct byte GPR with direct GPR 2 XORB Rb, [Rw] Bitwise XOR indirect byte memory with direct GPR 2 XORB Rb, [Rw +] Bitwise XOR indirect byte memory with direct GPR and post-increment source pointer by 1 2 XORB Rb, #data3 Bitwise XOR immediate byte data with direct GPR 2 XORB reg, #data8 Bitwise
Siemens
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80C166W-MT3

Abstract: 83C166W multiplexed bus mode. 48 - 53 56 - 59 P5.0 ­ P5.9 I I Port 5 is a 10-bit input-only port with , register with direct memory 4 XORB Rb, Rb Bitwise XOR direct byte GPR with direct GPR 2 XORB Rb, [Rw] Bitwise XOR indirect byte memory with direct GPR 2 XORB Rb, [Rw +] Bitwise XOR indirect byte memory with direct GPR and post-increment source pointer by 1 2 XORB Rb, #data3 Bitwise XOR immediate byte data with direct GPR 2 XORB reg, #data8 Bitwise
Siemens
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ST10 FAMILY PROGRAMMING MANUAL

Abstract: ST10 with MAC REG, #data16 ANDB XORB REG, #data16 CMPB SUBCB REG, #data16 SUBB SUB SUBB , BITadd, BITadd XORB BOR BITadd, BITadd BMOV PUSH RETP ADD x8 Rwn , [Rwi] Rwn , , MEM MOVBZ CMPD2 Rwn , MEM CMPD1 CMPD2 Rwn NEG ORB Rwn , Rwm ANDB XORB , CoXXX ORB ANDB XORB CMPB SUBCB SUBB ADDCB ADDB x3 Rwn , [Rwm + #d16] [Rwn , MEM, REG MOVBZ EINIT DISWDT _ _ ORB ANDB XORB _ SUBCB SUBB ADDCB
STMicroelectronics
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Abstract: . 48 2.1.3 Condition Code Renesas Technology
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Abstract: 48 49 50 51 52 53 54 55 56 57 58 59 60 61 62 P2.0 P2.15 I/O I/O I/O I/O I/O , XORB Rb, Rb Bitwise XOR direct byte GPR with direct GPR 2 XORB Rb, [Rw] Bitwise XOR indirect byte memory with direct GPR 2 XORB Rb, [Rw +] Bitwise XOR indirect byte memory with direct GPR and post-increment source pointer by 1 2 XORB Rb, #data3 Bitwise XOR immediate byte data with direct GPR 2 XORB reg, #data8 Bitwise XOR immediate byte data with direct -
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