NEW DATABASE - 350 MILLION DATASHEETS FROM 8500 MANUFACTURERS
NEW DATABASE - 350 MILLION DATASHEETS FROM 8500 MANUFACTURERS
| Catalog Datasheet Results | Type | Document Tags |
| Abstract: ,IOUT=-30mA VCC-2.0 VCC-1.6 V VOH2 VIN=10V,IOUT=-60mA VCC-2.6 VCC-1.9 V IOL ... | Original |
3 pages, |
LB1249 LB1294 1163C 1163C abstract |
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| Abstract: Doubler 21 LO IN8 GND 2 LNA IN19 3 X2 · Integrated LO Output Buffers 20 GND LNA VCC19 1 , GND MXR VCC19 MXR IN8 TX L019 15 VCC TX19 LNA VCC8 GAIN SEL 7 Functional Block , Pin 1 2 Function Description Interface Schematic LNA VCC19 PCS LNA supply voltage. Local bypass , 12 MXR VCC19 13 14 15 MXR IN8 TX LO19 VCC TX19 16 17 VCC DOUBLER GND 18 , path to the ground plane. NOTE: The LO doubler is enabled by either MXR VCC19 (PCS RX mode) or TX ... | Original |
20 pages, |
RF2475 IS136 IN19 RF2475 abstract |
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| Abstract: 23 22 · Complete Dual-Band Receiver Front-End · Stepped LNA Gain Control LNA VCC19 1 , Block Diagram Rev A2 010918 Ordering Information 14 TX L019 13 MXR IN8 12 MXR VCC19 , Schematic LNA VCC19 PCS LNA supply voltage. Local bypass capacitor required. Ground connection. Keep , MXR VCC19 13 14 15 MXR IN8 TX LO19 VCC TX19 16 17 VCC DOUBLER GND 18 IF B , plane. NOTE: The LO doubler is enabled by either MXR VCC19 (PCS RX mode) or TX LO19 (PCS TX mode). ... | Original |
20 pages, |
RF2475 IS136 IN19 RF2475 abstract |
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| Abstract: ) READ CYCLE JEDEC PARANETER PARAMETER NAME NAME CYCLE TIME : 85ns CYCLE TIME : 100ns (VCC=1.9~3.6V) (VCC=1.9~3.6V) MIN. TYP. MAX. MIN. TYP. MAX. DESCRIPTION UNITS tAVAX tRC Read , -40 C to +85 C) WRITE CYCLE JEDEC PARANETER PARAMETER NAME NAME CYCLE TIME : 85ns (VCC=1.9~3.6V) CYCLE TIME : 100ns (VCC=1.9~3.6V) MIN. DESCRIPTION TYP. MAX. MIN. TYP. ... | Original |
11 pages, |
BS616UV2019TI BS616UV2019TC BS616UV2019DC BS616UV2019AI BS616UV2019AC BS616UV2019 BS616UV2019 abstract |
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| Abstract: LB1616 PARAMETER NAME NAME CYCLE TIME : 85ns (VCC=1.9~3.6V) MIN. TYP. MAX. DESCRIPTION tAVAX tRC , (VCC=1.9~3.6V) MIN. TYP. MAX. UNITS 85 - - 100 - - ns - - 85 - , (VCC=1.9~3.6V) MIN. TYP. MAX. DESCRIPTION CYCLE TIME : 100ns (VCC=1.9~3.6V) MIN. TYP. MAX. ... | Original |
10 pages, |
TSOP 2-44 BS616UV4016EI BS616UV4016EC BS616UV4016DI BS616UV4016DC BS616UV4016AI BS616UV4016AC BS616UV4016 datasheet abstract |
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| Abstract: +85OC) READ CYCLE JEDEC PARANETER PARAMETER NAME NAME CYCLE TIME : 85ns (VCC=1.9~3.6V) CYCLE TIME : 100ns (VCC=1.9~3.6V) MIN. DESCRIPTION TYP. MAX. MIN. TYP. MAX. , (VCC=1.9~3.6V) CYCLE TIME : 100ns (VCC=1.9~3.6V) MIN. DESCRIPTION TYP. MAX. MIN. TYP. ... | Original |
11 pages, |
BS616UV2019TI BS616UV2019TC BS616UV2019DC BS616UV2019AI BS616UV2019AC BS616UV2019 BGA-48-0608 BS616UV2019 abstract |
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| Abstract: Digital Output Voltage Output Common Mode Range I OUT -OUT* I (OUT + OUT*) / 2 1.2 VCC-2.1 1.4 VCC-1.9 VCC ... | OCR Scan |
2 pages, |
SK1501 SK1501 abstract |
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| Abstract: 1.2 VCC-2.1 1.4 VCC-1.9 VCC -1.7 V V Power Supply Power Supply Current Power Supply Voltage IEE ... | OCR Scan |
2 pages, |
SK1901 SK1901 abstract |
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| Abstract: vin=10v min typ max Vcc-2.0 Vcc-2.6 -100 0.6 0.2 -30 Vcc-1.6 VCC-1-9 0.9 0.4 *CCL Each input open ... | OCR Scan |
3 pages, |
LB1294 1163C 1163C abstract |
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| Abstract: Driving MOS RL = 4.7k to VDD, vdd c _5v -5% VCC-'9 vcc-i VCC-1.9 Vcc-1 V Output HIGH Voltage Driving , 3.9k to vcc Vdd-9V=5% vcc-1.9 vcc-' vol Output LOW Voltage VDD - -S V : 5% , Rl = 3k to vdd, 'ol ... | OCR Scan |
6 pages, |
AM1404AHM AM1404A AM1404 AM1402ADM AM1402A AM1402 AM1403AHM Am1402A/Am1403A/Am1404A Am2802/Am2803/Am2804 L-STD-883 Am1402A/Am1403A/Am1404A abstract |
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| Abstract: 38C2 A-D A-D 38C2 A-D C2 ROM (4Ã-Vcc-4)/3 Ã- Vcc 4MHz 5Ã-Vcc-8 Ã- 2MHz 1MHz 1.8V 2.0V 2.5V 4.0V 1MHzf(XIN)8MHz(2.0VVCC5.5V) 1MHzf(XIN)(20Ã-VCC-32 -VCC-32)MHz(VCC2.0V) 5.5V Vcc 38C2 A-D 38C2 A-D C2 ROM (8A-D) (8A-D) ROM (10A-D) (5Ã-Vcc-9)/4 Ã- (10A-D) 4MHz f(ADCLK) (15Ã-Vcc-19)/14 Ã- 1.32MHz 1MHz 500kHz 250kHz 2.2V 2.5V f(ADCLK)=f(XIN)/2f(XIN)/4f(XIN)/8f(XIN)/16 1MHzf(XIN)8MHz(2.2VVCC5.5V) 5.0V 5.5V Vcc ... | Original |
1 pages, |
datasheet abstract |
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| Abstract: AN2120-25 AN2120-25: Dual Layout of Ag2120S & Ag1171S COIC connections are shown in brackets [ ] RB RC RD Pin Outs 1171S 1171S SLIC 2120S 2120S COIC RING [RING] TIP [TIP] F/R [Cathode] RM [Anode] SHK - 15 Zb ZT2 ZT1 [Dmb] Vin [Vin] [Dma] - 6 16 9 CC CODEC [Dmb] - ZT1 [Gate] - 17 - - - - - [Vin] Vout [Vout] - [LSC] GPWR [GND] VPWR [Vcc] PD [F/R] - [Zb] - [RS ... | Original |
1 pages, |
AN2120 SLIC AG1171S AN2120-25 1171S 2120S AN2120-25 abstract |
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| Abstract: CXA2194Q CXA2194Q US CXA2194QI2CTV CXA2194QI2CTV IC SAP (Separate Audio Program) dbx I2C TV The Zenith Television Multi-channel System · VCO · dbx -2 - - - - 1chipIC · I2C 48 pin QFP (Plastic) TVVTRTV IC Ta25 11 · VCC · Topr -2075 · Tstg -65150 · PD 0.6 9±0.5 V W V * ICdbx-TV -1- PJ02826-PS PJ02826-PS AMP (+4dB) DeEm LOGIC VE NRSW/FOMO/SAPC VCA FEXT2 PASSSW TVSW LPF SPECTRAL ... | Original |
2 pages, |
vca bass treble CXA2194Q CXA2194QI2CTV CXA2194Q abstract |
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| Abstract: 38C2 Group Internal-clock vs. Vcc (Except A-D converter) (4Ã-Vcc-4)/3 Ã- MASK ROM Version Flash Memory Version Internal-clock Vcc 4MHz 5Ã-Vcc-8 Ã- 2MHz 1MHz 1.8V 2.0V 2.5V 4.0V 5.5V Note1MHzf(XIN)8MHz(2.0VVCC5.5V), 1MHzf(XIN)(20Ã-VCC-32 -VCC-32)MHz(VCC2.0V) Vcc 38C2 Group f(ADCLK) vs. Vcc (A-D converter in operating) MASK ROM Version (8-bit A-D mode) Flash Memory Version (8-bit A-D mode) MASK ROM Version (10-bit A-D mode) (5Ã-Vcc-9)/4 Ã- Flash Memory Ver ... | Original |
1 pages, |
datasheet abstract |
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| Abstract: UNITED MICROELECTRONICS TE DE| T35SÛ12 DDGOSm M UM82C84A/AE UM82C84A/AE CMOS Clock Generator & Driver FEATURES â- Generates the System Clock for CMOS or NMOS Microprocessors. â- Up to 25 MHz Operation. â- Uses a Parallel Mode Crystal Circuit or External Frequency Source. â- Provides Ready Synchronization. â- Generates System Reset Output from Schmitt Trigger Input. â- Capable of Clock Synchronization with Other 82C84A/82C84AEs. â- TTL Compatible Inputs/Outputs. â- Very Low Power Consumption. â- 18-pin Pac ... | OCR Scan |
1 pages, |
UM82C88 generator synchronization 8288 bus controller UM82C84A/AE UM82C84A/AE abstract |
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| Abstract: AS1731B AS1731B PFC Monitoring IC Preliminary Specification SEMICONDUCTOR Description The AS1731 AS1731 is a 18 pin surface mount IC incorporating input and output voltage monitoring for the AMPSSTM PFC module. The AS1731 AS1731 also provides some housekeeping functions for providing a controlled start-up of the module. External dividers bring in analogs of the peak AC input (VPK) and the PFC output (VBLK). These signals are buffered and compared to a fixed reference to control startup and shutdown sequen ... | Original |
5 pages, |
IC 2V5 AS300 AS1731B AS1731 AS1731B abstract |
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| Abstract: PHILIPS E C G INC 17E D LbS3T5fl ODD4542 ODD4542 b ECG ECG 768 â- Mi Semiconductors 3-INPUT "AND" GATE • Wide Operating Voltage - to 16 Volts • Compatible with TTL and OTL • Economical 0-Lead Plastic Package • Regulated Supply Not Required MAXIMUM RATINGS Rating Symbol Vatua Unit Power Supply Voltage Vcc 19 Vde Power Diwipition Q TA â- 25°C PD 1.0 Watt (Package Limitation] Darata above 25°C 1/äjA 10 mW/°C Operating Temperature Rang« TA 0 to +75 °C Operating and Storage Junction Tj,T«g ... | OCR Scan |
2 pages, |
Philips ECG ODD4542 ECG768 ODD4542 abstract |
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| Abstract | Saved from | Date Saved | File Size | Type | Download |
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| (\U21/$1I20_GTS_TRI_2_INV ); X_ONE VCC_19 (.OUT (VCC); X_ZERO GND_20 (.OUT (GND); X www.datasheetarchive.com/download/52728641-985501ZC/wcd00ea6.zip (time_sim.v) |
Xilinx | 12/02/1999 | 7683.96 Kb | ZIP | wcd00ea6.zip |
| (\U21/$1I20_GTS_TRI_2_INV ); X_ONE VCC_19 (.OUT (VCC); X_ZERO GND_20 (.OUT (GND); X www.datasheetarchive.com/download/1770998-985499ZC/wcd00ea4.zip (time_sim.v) |
Xilinx | 12/02/1999 | 3545.64 Kb | ZIP | wcd00ea4.zip |
| (\U21/$1I20_GTS_TRI_2_INV ); X_ONE VCC_19 (.OUT (VCC); X_ZERO GND_20 (.OUT (GND); X www.datasheetarchive.com/download/16152680-987153ZC/wcd02ea5.z |
Xilinx | 13/07/1998 | 5128.36 Kb | Z | wcd02ea5.z |
| (\U21/$1I20_GTS_TRI_2_INV ); X_ONE VCC_19 (.OUT (VCC); X_ZERO GND_20 (.OUT (GND); X www.datasheetarchive.com/download/10929841-987152ZC/wcd02ea4.zip (time_sim.v) |
Xilinx | 13/07/1998 | 7683.96 Kb | ZIP | wcd02ea4.zip |
| (\U21/$1I20_GTS_TRI_2_INV ); X_ONE VCC_19 (.OUT (VCC); X_ZERO GND_20 (.OUT (GND); X www.datasheetarchive.com/download/67714387-987154ZC/wcd02ea6.zip (time_sim.v) |
Xilinx | 13/07/1998 | 3545.64 Kb | ZIP | wcd02ea6.zip |
| (\U21/$1I20_GTS_TRI_2_INV ); X_ONE VCC_19 (.OUT (VCC); X_ZERO GND_20 (.OUT (GND); X www.datasheetarchive.com/download/74691760-985949ZC/wcd010c9.zip (time_sim.v) |
Xilinx | 13/07/1998 | 7683.96 Kb | ZIP | wcd010c9.zip |
| (\U21/$1I20_GTS_TRI_2_INV ); X_ONE VCC_19 (.OUT (VCC); X_ZERO GND_20 (.OUT (GND); X www.datasheetarchive.com/download/8931125-985945ZC/wcd010c7.zip (time_sim.v) |
Xilinx | 13/07/1998 | 3545.64 Kb | ZIP | wcd010c7.zip |
| (\U21/$1I20_GTS_TRI_2_INV ); X_ONE VCC_19 (.OUT (VCC); X_ZERO GND_20 (.OUT (GND); X www.datasheetarchive.com/download/56350136-985943ZC/wcd010c6.z |
Xilinx | 13/07/1998 | 13034.22 Kb | Z | wcd010c6.z |
| (\U21/$1I20_GTS_TRI_2_INV ); X_ONE VCC_19 (.OUT (VCC); X_ZERO GND_20 (.OUT (GND); X www.datasheetarchive.com/download/16736007-985939ZC/wcd010c4.z |
Xilinx | 13/07/1998 | 5128.36 Kb | Z | wcd010c4.z |
| (\U21/$1I20_GTS_TRI_2_INV ); X_ONE VCC_19 (.OUT (VCC); X_ZERO GND_20 (.OUT (GND); X www.datasheetarchive.com/download/52057314-987199ZC/wcd02ee0.z |
Xilinx | 13/07/1998 | 13034.22 Kb | Z | wcd02ee0.z |