NEW DATABASE - 350 MILLION DATASHEETS FROM 8500 MANUFACTURERS
NEW DATABASE - 350 MILLION DATASHEETS FROM 8500 MANUFACTURERS
| Catalog Datasheet Results | Type | Document Tags |
| Abstract: top of SCP1000-D01 SCP1000-D01 indicates the ASIC version. None. Marking on top of SCP1000-D01 SCP1000-D01 indicates the , remain the same. Features SCP1000-D11 SCP1000-D11 Current consumption in Power Down mode Marking on top of , None. The current consumption in Power down mode is ~0.2uA with the new C version ASIC (MISO pin is , SCP1000 SCP1000 ASIC update TN59 SCP1000 SCP1000 Series ASIC update 1 Introduction Both pressure sensors, SCP1000-D01 SCP1000-D01 and SCP1000-D11 SCP1000-D11, use the same signal conditioning ASIC (Application Specific Integrated Circuit). ... | Original |
2 pages, |
TN59 SCP1000 D01 SCP1000-D01 SCP1000 SCP1000-D11 SCP1000 abstract |
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| Abstract: power is used to reduce the influence of substrate noise. SEC ASIC 7 / 11 ANALOG AL1213A AL1213A , pia_bb Voltage Reference Top (5V) I/O TYPE ABBR * AI : Analog Input * DI : Digital Input * AO : Analog Output * DO : Digital Output * AP : Analog Power AOUT AO poa_bb Analog Voltage Output VDDA AP vdda Analog Power VSSA AG vssa Analog Ground VBB AG vbb , * DP : Digital Power * DG : Digital Ground * DB : Digital Sub Bias CORE CONFIGURATION VDDA ... | Original |
12 pages, |
r2r ladder modified r2r ladder 10 pin analog to digital r2r ladder 10 pin AL1213A AL1213A abstract |
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| Abstract: plane supplies power to the AL1213H AL1213H of the analog output pin and related devices. SEC ASIC 10 / 11 , : Analog Input * DI : Digital Input VDDA AP vdda Analog Power VSSA AG vssa Analog Ground * AO : Analog Output * DO : Digital Output * AP : Analog Power VDD DP vddd Digital Power VSS DG vssd Digital Ground * AB : Analog Bidirection port D[0] ~ D[8 , Signal Select signal VREF AI pia_bb Voltage Reference Top (5V) AOUT AO poa_bb ... | Original |
12 pages, |
DACCTL AL1213H AL1213H abstract |
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| Abstract: power latch-up. SEC ASIC 3 / 8 Analog Core 8BIT 125MSPS 125MSPS ADC DC adc1390x ELECTRICAL , and Pipelined Scheme Power Consumption : 258mW(Typ) Power Supply : 3.3V Single Operation , result from its use. The content of this datasheet is subject to change without any notice SEC ASIC , Analog Input - REFT AI phia_abb Reference Top (2.1V) REFB AI phia_abb Reference , DI phicc_abb Power Down ( Active High ) DO[7] DO phob8_abb Digital Output (MSB ... | Original |
8 pages, |
Gigabit Ethernet PHY 125MSPS 125MSPS abstract |
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| Abstract: 9 Shenzhen ASIC Micro-electronics Ltd. VRT-VRB Analog Input Power Consumption , Shenzhen ASIC Micro-electronics Ltd. ASIC1810 ASIC1810 ASIC1810 ASIC1810 ASIC1810 ASIC1810 IC RGB December 2001 Version 1.0 Shenzhen ASIC Micro-electronics Ltd TEL: 0086-755-26690989 FAX: 0086-755-26815295 1 9 Shenzhen ASIC Micro-electronics Ltd. ASIC1810 ASIC1810 ASIC1810 ASIC1810 RGB ADC RGB , SRAM, SRAM N-1 30uS 2uS 64uS RINGINBIN 15KHZ 15KHZ 53uS 11uS; ASIC ROUTGOUTBOUT 30KHZ 30KHZ ... | Original |
9 pages, |
wo-04 E10005 c1815 ASIC1810 15KHZ Shenzhen State Microelectronics RGB 30M IC1810 ASIC1810 abstract |
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| Abstract: high performance, low power consumption, and fast design turnaround time of ChipX's Structured ASIC technology. The CX4000 CX4000 family is applicable to ground-up digital ASIC designs, FPGA replacements, and obsolete component re-targeting projects. Structured ASIC technology uses just two of the five available , Data Sheet CX4000 CX4000 0.25um Structured ASIC Product Description The CX4000 CX4000 Structured ASIC product family is targeted at the mid-volume ASIC market. Manufactured in UMC's 0.25-um, 5-layer metal CMOS ... | Original |
6 pages, |
cx4-10 CHIPX CX4000 CX4000 abstract |
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| Abstract: supplies power to the DAC1252X DAC1252X_JVC of the analog output pin and related devices. SEC ASIC 8 / 10 , Input TYPE? 5V power supply in your system? SEC ASIC 9 / 10 ANALOG DAC1252X DAC1252X_JVC 2.5V , LSB Settling Time : 500ns Low Power Consumption : 890uA Power Down Mode Operation Temperature Range : 0ºC ~ 70ºC Power Supply : 2.5V Single and 1.8V single FUNCTIONAL BLOCK DIAGRAM AVDD18D AVDD18D , [0] : LSB PD DI picc_abb Power Down (Active Low) VRT AB pia_abb Voltage ... | Original |
10 pages, |
jvc hdd motor jvc 10uf capacitor DAC1252X jvc capacitor samsung hdd motor DAC1252X abstract |
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| Abstract: Data Sheet CX5000 CX5000 0.18-祄 Structured ASIC Product Description The 0.18-祄 CX5000 CX5000 is an ASIC that , implement high performance ASIC designs, while reducing application tooling costs and design turnaround time. ASIC designers using the CX5000 CX5000 are able to meet or exceed their design schedules and budgets , custom-designed point EDA solutions, the CX5000 CX5000 provides not just gate array hardware, but also a complete ASIC , , with the high performance, low power consumption and fast design turnaround time of ChipX Structured ... | Original |
6 pages, |
CX50841 CX50561 CX50331 CX50211 CX502 CX50101 CX5000 CHIPX CX5000 abstract |
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| Abstract: actual 8-bit output data with 2.5V power supply. SEC ASIC 6 / 10 MIXED ADC_PCI2010 PCI2010_CS2 , CMOS 8-bit low supply, low power, successive approximation A/D converter which is composed of , accessed over a parallel interface. The adc_pci2010_cs2 operates with a single +2.5V power supply and the , ) Integral Linearity Error:�75 LSB(Typ) Maximum Conversion Rate: 250KSPS 250KSPS Low Power Consumption: 2.5mW(Typ) Power Supply Voltage: 2.5V(Typ) No Pipeline Delays No Missing Code Guaranteed Internal Voltage ... | Original |
10 pages, |
250KSPS PCI2010 250KSPS abstract |
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| Abstract: control ASIC AS8401 AS8401 for OMNIFET Application Note Multipurpose control ASIC for OMNINET Application Note AS8401 AS8401 1. Key Features · Shows the general usage of the multipurpose control ASIC AS8401 AS8401 for OMNIFET (SGS Thompson intelligent power FET family) · Contains one channel on the board , 60V · Up to +/- 3V potential difference between system's digital ground and power ground , operation of the AS8401 AS8401 OmniFet driver ASIC evaluation board. This circuit board is a fully operational ... | Original |
13 pages, |
sgs bc141 j20 Schematic BC141-10 BC141 AS8401 OMNIFET AS8401 abstract |
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| Abstract | Saved from | Date Saved | File Size | Type | Download |
| Over 1.1 million files (1986-2013): html articles, reference designs, gerber files, chemical content, spice models, programs, code, pricing, images, circuits, parametric data, RoHS data, cross references, pcns, military data, and more. Please note that due to their age, these files do not always format correctly in modern browsers. Disclaimer. |
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| ST | Presentation | ASIC Solution | Methodology and Design Tools | Design Flow ASIC Home Page > Methodology & Design Tools > Design Flow . back to design flow Top schematics creation A top reference schematic is created using Cadence/Composer. The symbol of the design flow Mixed simulation Mixed simulation is performed on the top www.datasheetarchive.com/files/stmicroelectronics/stonline/prodpres/dedicate/asic/am001.htm |
STMicroelectronics | 28/06/2000 | 10.78 Kb | HTM | am001.htm |
| low-power, low-voltage, mixed-signal ASICs with non-volatile memory. We provide high-quality engineering in the area of ASIC architecture, design and development. We have been successful in this business by emphasizing a "System View" to ASIC development; ASIC development is approached by count, high-speed digital ASICs low-power, low EM Microelectronic-US provides custom ASIC design solutions. We can handle almost any design www.datasheetarchive.com/files/em-microelectronics/emus/products/asics.html |
EM Microelectronics | 02/09/2002 | 27.11 Kb | HTML | asics.html |
| Web Sprint OPTIMA with Gang TOP (Flash Support) SMS Mikrocomputer Systeme GmbH Architecture: Type virtually any programmable device up to and beyond 84 pins. Removable TOPs give you the freedom and custom ASIC pin drivers were developed, enabling the programming and testing of high-speed CMOS devices. The compact design is achieved because of these analog/digital ASICs, allowing pin drivers and Vcc and performance programming electronics that operate within your design environment. With the optional Power www.datasheetarchive.com/files/intel/products two & tools/design/flcard/devtools/8258623a.htm |
Intel | 12/05/1999 | 5.53 Kb | HTM | 8258623a.htm |
| Web Sprint OPTIMA with Gang TOP (Flash Support) SMS Mikrocomputer Systeme GmbH Architecture: Type virtually any programmable device up to and beyond 84 pins. Removable TOPs give you the freedom and custom ASIC pin drivers were developed, enabling the programming and testing of high-speed CMOS devices. The compact design is achieved because of these analog/digital ASICs, allowing pin drivers and Vcc and performance programming electronics that operate within your design environment. With the optional Power www.datasheetarchive.com/files/intel/design/flcard/devtools/5229e_23.htm |
Intel | 09/05/1998 | 5.39 Kb | HTM | 5229e_23.htm |
| Web Sprint OPTIMA with Gang TOP (Flash Support) SMS Mikrocomputer Systeme GmbH Architecture: Type virtually any programmable device up to and beyond 84 pins. Removable TOPs give you the freedom and custom ASIC pin drivers were developed, enabling the programming and testing of high-speed CMOS devices. The compact design is achieved because of these analog/digital ASICs, allowing pin drivers and Vcc and performance programming electronics that operate within your design environment. With the optional Power www.datasheetarchive.com/files/intel/design/flcard/devtools/707fa23a.htm |
Intel | 05/11/1998 | 5.7 Kb | HTM | 707fa23a.htm |
| Web Sprint OPTIMA with Gang TOP (Flash Support) SMS Mikrocomputer Systeme GmbH Architecture: Type virtually any programmable device up to and beyond 84 pins. Removable TOPs give you the freedom and custom ASIC pin drivers were developed, enabling the programming and testing of high-speed CMOS devices. The compact design is achieved because of these analog/digital ASICs, allowing pin drivers and Vcc and performance programming electronics that operate within your design environment. With the optional Power www.datasheetarchive.com/files/intel/design/flcard/devtools/7c98223a.htm |
Intel | 05/02/1999 | 5.15 Kb | HTM | 7c98223a.htm |
| Web Sprint OPTIMA with Gang TOP (Flash Support) SMS Mikrocomputer Systeme GmbH Architecture: Type virtually any programmable device up to and beyond 84 pins. Removable TOPs give you the freedom and custom ASIC pin drivers were developed, enabling the programming and testing of high-speed CMOS devices. The compact design is achieved because of these analog/digital ASICs, allowing pin drivers and Vcc and performance programming electronics that operate within your design environment. With the optional Power www.datasheetarchive.com/files/intel/design/flcard/devtools/6a71a23a.htm |
Intel | 02/08/1998 | 5.38 Kb | HTM | 6a71a23a.htm |
| Web Sprint OPTIMA with Gang TOP (Flash Support) SMS Mikrocomputer Systeme GmbH Architecture: Type virtually any programmable device up to and beyond 84 pins. Removable TOPs give you the freedom and custom ASIC pin drivers were developed, enabling the programming and testing of high-speed CMOS devices. The compact design is achieved because of these analog/digital ASICs, allowing pin drivers and Vcc and performance programming electronics that operate within your design environment. With the optional Power www.datasheetarchive.com/files/intel/design/flcard/devtools/707fe23a.htm |
Intel | 05/11/1998 | 5.71 Kb | HTM | 707fe23a.htm |
| Web Sprint OPTIMA with Gang TOP (Flash Support) SMS Mikrocomputer Systeme GmbH Architecture: Type virtually any programmable device up to and beyond 84 pins. Removable TOPs give you the freedom and custom ASIC pin drivers were developed, enabling the programming and testing of high-speed CMOS devices. The compact design is achieved because of these analog/digital ASICs, allowing pin drivers and Vcc and performance programming electronics that operate within your design environment. With the optional Power www.datasheetarchive.com/files/intel/design/flcard/devtools/6a71623a.htm |
Intel | 02/08/1998 | 5.37 Kb | HTM | 6a71623a.htm |
| Web Sprint OPTIMA with Gang TOP (Flash Support) SMS Mikrocomputer Systeme GmbH Architecture: Type virtually any programmable device up to and beyond 84 pins. Removable TOPs give you the freedom and custom ASIC pin drivers were developed, enabling the programming and testing of high-speed CMOS devices. The compact design is achieved because of these analog/digital ASICs, allowing pin drivers and Vcc and performance programming electronics that operate within your design environment. With the optional Power www.datasheetarchive.com/files/intel/design/flcard/devtools/4cad223a.htm |
Intel | 10/02/1998 | 5.15 Kb | HTM | 4cad223a.htm |