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| Catalog Datasheet Results | Type | Document Tags |
| Abstract: Digital Integrated Circuits TTL Gates NKT provides a range of standard TTL gates, normally supplied in plastic dual-in-line packages. They are fully compatible with similarly coded '7400 series' devices. DIC 7400 QUAD 2 input NAND DIC 7401 QUAD 2 input NAND (open collector 5.5V rating) DIC 7402 , 7405 Hex Inverter (open collector 5.5V rating) DIC 7410 TRIPLE 3 input NAND DIC 7420 DUAL 4 input , ,_, ^J t-n] 5-^ a6 k]Z6 a5 s]a4 DIC 7404, 7405 DIC 7410 DIC 7420,7440 14 LEAD TO 116 DIC ... | OCR Scan |
1 pages, |
7402 nand ttl 7400 7400 3 input 7402 nor TTL 7428 7404 inverter 7404 TTL 7402 TTL 7400 TTL 7430 7400 TTL TTL 7420 TTL 7440 TTL 7404 datasheet abstract |
| Abstract: Signetics I 7410, 7411, LS10, LS11, S10, S11 Gates Triple Three-Input NAND ('10), AND ('11 , (TOTAL) 7410 9ns 6mA 74LS10 74LS10 10ns 1.2mA 74S10 74S10 3ns 12mA 7411 10ns 11mA 74LS11 74LS11 9ns 2.6mA 74S11 74S11 5ns , 7410, 7411, LS10, LS11, S10, S11 ABSOLUTE MAXIMUM RATINGS (Over operating free-air temperatures unless , Specification Gates 7410, 7411, LS10, LS11, S10, S11 DC ELECTRICAL CHARACTERISTICS (Over recommended operating free-air temperature range unless otherwise noted.) PARAMETER TEST CONDITIONS1 7410, 11 74LS10 74LS10, 11 ... | OCR Scan |
4 pages, |
74LS gates AND 7411 74LS11 function table 7411 pin configuration 7411 TTL LS 7411 LS 7411 7410 SIGNETICS 74LS11 pin configuration TTL 74LS10 74LS10 function table 7410 pin configuration TTL 7410 AND propagation delay 74LS10 74S10 74LS10 abstract |
| Abstract: Signetics I 7410, 7411, LS10, LS11, S10, S11 Gates Triple Three-Input NAND (10), AND ('11) Gates , ) 7410 9ns 6mA 74LS10 74LS10 10ns 1.2mA 74S10 74S10 3ns 12mA 7411 10ns 11mA 74LS11 74LS11 9ns 2.6mA 74S11 74S11 5ns 19mA , Its Respective Manufacturer Signetics Logic Products Product Specification Gates 7410, 7411, LS10 , By Its Respective Manufacturer Signetics Logic Products Product Specification Gates 7410, 7411 , range unless otherwise noted.) PARAMETER TEST CONDITIONS1 7410, 11 74LS10 74LS10, 11 74S10 74S10, 11 ... | OCR Scan |
4 pages, |
LS10 N7410N N7411N N74LS10N N74LS11N 7411 pin configuration of 7411 74LS10 74LS gates N74S10N 74ls TTL family 74LS11 pin configuration TTL 7410 11 input 7411 pin configuration 74LS10 abstract |
| Abstract: LÜ QND LJ Id Lil W Ü LJ GND U HI [21 LU liJ lil LJ QND D4 9003, 54/7410, 54H/74H10 54H/74H10, 54S/74S10 54S/74S10 , Q c o ï 2 ... | OCR Scan |
4 pages, |
IC TTL 7400 IC TTL 7404 TTL 7404 fairchild 9016 IC 7404 7406 TTL 74LS20 CI 74LS04 7404 ttl IC TTL 74LS00 CI 7404 ttl 7404 TTL 74ls04 TTL 74ls00 7406 TTL CMOS 54H/74H04 54S/74S04 54H/74H04 abstract |
| Abstract: LÜ QND LJ Id Lil W Ü LJ GND U HI [21 LU liJ lil LJ QND D4 9003, 54/7410, 54H/74H10 54H/74H10, 54S/74S10 54S/74S10 , 3.0 -5.2 510 4 E105 4L,6B 2 54S/ 74S140 74S140 Dual 2-NAND Any TTL TTL Volt Single Ended 40 4.0 +5.0 88 2 D5 3I, 6A,9A 3 54LS/ 54LS/ 74LS240 74LS240 Octal Inverting Bus Dvr Any TTL TTL Volt Single Ended 40 12 +5.0 175 8 D73 9Z 4 54LS/ 54LS/ 74LS241 74LS241 Octal Bus Dvr Any TTL TTL Volt Single Ended 40 12 +5.0 180 8 D74 9Z 5 54LS/ 54LS/ 74LS244 74LS244 Octal Bus Dvr Any TTL TTL Volt Single Ended 40 12 +5.0 180 8 D77 9Z 6 54LS/ 54LS/ 74LS540 74LS540 Octal 3S ... | OCR Scan |
4 pages, |
7406 ic 74ls14 ttl IC 7404 7406 TTL 74LS00 ttl 74ls14 ECL IC NAND CI 74LS04 CI 74LS00 CI 7428 CI 7410 TTL 74h04 TTL 74LS04 schmitt trigger 7413 74LS00 TTL 54H/74H04 54S/74S04 54H/74H04 abstract |
| Abstract: , ion-implanted Schottky TTL process n Functionally equivalent with LS374 LS374 n Improved AC performance over LS374 LS374 , /14 PrintTime=15:09:22 7410 ds006110 Rev. No. 1 cmserv Proof 1 1 Function Table , 7410 ds006110 Rev. No. 1 2 cmserv Proof 2 Absolute Maximum Ratings Supply Voltage , 28 mA -30 Outputs Disabled 3 PrintDate=1997/08/14 PrintTime=15:09:24 7410 ds006110 , PrintDate=1997/08/14 PrintTime=15:09:25 7410 ds006110 Rev. No. 1 4 cmserv Proof 4 Logic Diagram ... | Original |
8 pages, |
M20D LS374 DM74ALS574AWM DM74ALS574ASJ DM74ALS574AN DM74ALS574A TTL 7410 DM74ALS574A abstract |
| Abstract: 1820-0054 TTL QUAD 2-IN NAND 4342=7400 1820-0055 TTL COUNTER 7490 1820-0056 TTL COUNTER 7492 1820-0068 TTL GATE 7410 1820-0069 TTL GATE 7420 1820-0070 TTL GATE 7430 1820-0071 TTL BUFFER 7440 1820-0072 TTL 7450 1820-0075 TTL FF 7473 1820-0077 TTL DUAL D FF 4354=7474 2 of 8 1820-0084 TTL 7453 1820-0085 TTL 7460 1820-0094 DTL 6903 (SIM 7400) 1820-0099 TTL COUNTER 7493 1820-0125 DUAL COMPARATOR ... | Original |
8 pages, |
IC TTL 7402 IC 7486 ic 7912 ic 74LS04 IC 7400 ic 7404 datasheet ic 7490 REGULATOR IC 7815 REGULATOR IC 7912 TTL 7490 NEC d446c IC 74164 ic 74151 IC 74153 1818-0373B HP1350 1818-0373B abstract |
| Abstract: LÜ QND LJ Id Lil W Ü LJ GND U HI [21 LU liJ lil LJ QND D4 9003, 54/7410, 54H/74H10 54H/74H10, 54S/74S10 54S/74S10 , 3.0 -5.2 510 4 E105 4L,6B 2 54S/ 74S140 74S140 Dual 2-NAND Any TTL TTL Volt Single Ended 40 4.0 +5.0 88 2 D5 3I, 6A,9A 3 54LS/ 54LS/ 74LS240 74LS240 Octal Inverting Bus Dvr Any TTL TTL Volt Single Ended 40 12 +5.0 175 8 D73 9Z 4 54LS/ 54LS/ 74LS241 74LS241 Octal Bus Dvr Any TTL TTL Volt Single Ended 40 12 +5.0 180 8 D74 9Z 5 54LS/ 54LS/ 74LS244 74LS244 Octal Bus Dvr Any TTL TTL Volt Single Ended 40 12 +5.0 180 8 D77 9Z 6 54LS/ 54LS/ 74LS540 74LS540 Octal 3S ... | OCR Scan |
3 pages, |
9S05A CI 7405 CI 74S04 NOT gate 74LS04 TTL 7420 TTL 7400 fairchild TTL 741 TTL 7404 fairchild ecl nand 7400 74H00 TTL CI 7428 74LS00 TTL CI 7400 CI 74LS00 54H/74H04 54S/74S04 54H/74H04 abstract |
| Abstract: FAIRCHILD TTL/SSI . 9N10/5410 9N10/5410, 7410 TRIPLE 3-INPUT NAND GATE LOGIC AND CONNECTION DIAGRAM DIP (TOP VIEW) FifïïifTillïïiramrn Lj[2j[3jLJl¿JLJU Positive logic: Y = ABC FLATPAK (TOP VIEW) Vcc O- SCHEMATIC DIAGRAM (EACH GATE) Component values shown are typical. RECOMMENDED OPERATING CONDITIONS PARAMETER 9N10XM/5410XM 9N10XM/5410XM 9N10XC/7410XC 9N10XC/7410XC UNITS MIN. TYP. MAX. MIN. TYP. MAX. Supply Voltage Vcc 4.5 5.0 5.5 4.75 5.0 , mA 9N10/7410 'CCH Supply Current HIGH 3.0 6.0 mA VCC = MAX., V|N = 0V 6 'CCL Supply Current LOW ... | OCR Scan |
1 pages, |
ttl 7410 9n10 9N10/5410 9N10/5410 abstract |
| Abstract: LÜ QND LJ Id Lil W Ü LJ GND U HI [21 LU liJ lil LJ QND D4 9003, 54/7410, 54H/74H10 54H/74H10, 54S/74S10 54S/74S10 , QND 13-42 FAIRCHILD DIGITAL TTL SSI FUNCTIONS « E O Q) _ o -c ° S »S « >.35 8i 2 E £ ô £ N , Triple 3-lnput 9003 54LS/74LS10 54LS/74LS10 54/7410 54H/74H10 54H/74H10 54S/74S10 54S/74S10 D4 3I,6A,9A 15 Triple 3-lnput (OC) - - 54 ... | OCR Scan |
2 pages, |
TTL 7404 trigger 74114 74H10 TTL ic 7404 TTL 7410 IC 74LS14 7404 quad 2 74LS04 NOT gate ic 7420 7404 TTL IC 7405 IC TTL 7400 ic 7404 fairchild TTL 74h04 54H/74H04 54S/74S04 54H/74H04 abstract |
| Abstract | Saved from | Date Saved | File Size | Type | Download |
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| ",5,4.75 to ,4.75 to 5.25,TTL,TTL,- / SRC ",5,4.75 to SRC='./././graphics/weblink.gif'> SN74S30 SN74S30 SN74S30 SN74S30,"5V SUPPLY VOLTAGE,MEDIUM POWER CONSUMPTION",5,4.75 to 5.25,TTL,TTL,-0.05,1,7.5,7,http CONSUMPTION",5,4.75 to SRC www.datasheetarchive.com/download/30032522-883360ZC/nand_gates.csv |
Texas Instruments | 31/01/2000 | 23.92 Kb | CSV | nand_gates.csv |
| ",5,4.75 to ,4.75 to 5.25,TTL,TTL,- / SRC ",5,4.75 to SRC='./././graphics/weblink.gif'> SN74S30 SN74S30 SN74S30 SN74S30,"5V SUPPLY VOLTAGE,MEDIUM POWER CONSUMPTION",5,4.75 to 5.25,TTL,TTL,-0.05,1,7.5,7,http CONSUMPTION",5,4.75 to SRC www.datasheetarchive.com/download/64330369-890706ZC/nand_g~1.csv |
Texas Instruments | 31/01/2000 | 23.92 Kb | CSV | nand_g~1.csv |
| bus interface. PC7410 (46 pages, updated 3/02) 32-bit RISC Microprocessor, 400-450 MHZ PC7410 Fact Sheet (2 pages, updated 5/01) 32-bit RISC Microprocessor, 400-450 MHZ PC8240 PC8240 PC8240 PC8240 TSPC106 TSPC106 TSPC106 TSPC106 provides an integrated, high-bandwidth, high-performance, TTL-compatible interface between a 60 integrated, high-bandwidth, high-performance, TTL-compatible interface between a 60X processor, a secondary www.datasheetarchive.com/files/atmel/atmel/prod353.htm |
Atmel | 07/05/2002 | 41.17 Kb | HTM | prod353.htm |
| bus interface. PC7410 (46 pages, updated 3/02) 32-bit RISC Microprocessor, 400-450 MHZ PC7410 Fact Sheet (2 pages, updated 5/01) 32-bit RISC Microprocessor, 400-450 MHZ PC8240 PC8240 PC8240 PC8240 TSPC106 TSPC106 TSPC106 TSPC106 provides an integrated, high-bandwidth, high-performance, TTL-compatible interface between a 60 integrated, high-bandwidth, high-performance, TTL-compatible interface between a 60X processor, a secondary www.datasheetarchive.com/files/atmel/atmel/prod353.htm.bak |
Atmel | 07/05/2002 | 41.17 Kb | BAK | prod353.htm.bak |
| loglib /* */ /* */ /* LOG Library : 74ttl.def */ /* SCM Library : 74ttl.ddb */ /* */ /* Author : Bartels System */ /* Last Revision: 1997/04/29 */ /* */ /* Copyright (c) 1991-97 Oliver Bartels F+E, Erding */ /* */ /* */ /* This library provides definitions of */ /* */ /* - Bipolar TTL Standard / Series 74TTL ), 3), ( 4, 5), 6), ( 9,10), 8), (12,13),11) ) ; } part 7410 : default dil www.datasheetarchive.com/download/48664731-299145ZC/bae65022linux.tgz |
Kaleidoscope | 22/08/2005 | 11421.08 Kb | TGZ | bae65022linux.tgz |
| * * * *SRC=7410;7410;TTL;74xx;3 input NAND gate *SYM=NAND3 *7410 TRIPLE 3-INPUT POSITIVE-NAND GATES * * * STANDARD TTL DIGITAL LIBRARY BASED ON THE TEXAS * * INSTRUMENTS DATA BOOK (Volume 1 * * * * * *SRC=7400;7400;TTL;74xx;2 input NAND gate *SYM=NAND2 *7400 QUADRUPLE 2-INPUT POSITIVE-NAND GATES * * * *SRC=7402;7402;TTL;74xx;2 input NOR gate *SYM=NOR2 *7402 QUADRUPLE 2-INPUT POSITIVE-NOR GATES * * * *SRC=7404;7404;TTL;74xx;inverter *SYM=INV *7404 HEX INVERTERS * .subckt 7404 in out *FAMILY www.datasheetarchive.com/files/spicemodels/misc/modelos/spice_complete/7400.lib |
Spice Models | 18/04/2010 | 72.32 Kb | LIB | 7400.lib |
| * * * - 7410 - * Triple 3-Input Nand Gates * * The TTL Logic Data Book, 1988, TI Pages 2-53 to 2 - * Quad 2-Input Nand Gates * * The TTL Logic Data Book, 1988, TI Pages 2-3 to 2-7 * bss 2 * * * - 7401 - * Quad 2-Input Nand Gates With Open-Collector Outputs * * The TTL Logic Data Book * * * - 7402 - * Quad 2-Input Nor Gates * * The TTL Logic Data Book, 1988, TI Pages 2-13 to 2 * * * - 7403 - * Quad 2-Input Nand Gates With Open-Collector Outputs * * The TTL Logic Data Book www.datasheetarchive.com/files/spicemodels/misc/modelos/spice_complete/digdemo.lib |
Spice Models | 18/04/2010 | 128.15 Kb | LIB | digdemo.lib |
| Semiconductor Corporation | CMOS 17-Bit Enhanced-GTL/TTL | Universal Bus gp616_ttl NA 4.16n 0.20p 4 GND GND NA 3.57n 0.15p 5 A2 gp616_ttl NA 3.06n 0.15p 6 A3 gp616_ttl NA 2.62n 0.12p 7 Vcc(3.3V) POWER NA 2.23n 0.10p 8 A4 gp616_ttl NA www.datasheetarchive.com/files/fairchild/simulation-models/gtlp16616mtd_300.ibs |
Fairchild | 22/10/2012 | 64.32 Kb | IBS | gtlp16616mtd_300.ibs |
| Semiconductor Corporation | CMOS 18-Bit Enhanced-GTL/TTL | Universal Bus gp612_ttl NA 4.16n 0.20p 4 GND GND NA 3.57n 0.15p 5 A2 gp612_ttl NA 3.06n 0.15p 6 A3 gp612_ttl NA 2.62n 0.12p 7 Vcc(3.3V) POWER NA 2.23n 0.10p 8 A4 gp612_ttl NA www.datasheetarchive.com/files/fairchild/simulation-models/gtlp16612mtd_300.ibs |
Fairchild | 22/10/2012 | 64.3 Kb | IBS | gtlp16612mtd_300.ibs |
| Virtex TTL12_Slow [Disclaimer] The data in this model is derived from SPICE simulations using . | |* | Component Virtex_TTL12/slow_BG432 BG432 BG432 BG432 |* | [Component] Virtex_TTL12/slow_BG432 BG432 BG432 BG432 [Manufacturer] Xilinx Inc. [Package] | variable typ .0610mV 9.6790mV 2.0280mV 3.4000nS 2.7410mV 7.8355m www.datasheetarchive.com/download/39577299-987222ZC/wcd02f12.zip (lvttl12s.ibs) |
Xilinx | 12/02/1999 | 319.08 Kb | ZIP | wcd02f12.zip |