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SURFACE MOUNT CAPACITORS footprint land pattern

Catalog Datasheet MFG & Type PDF Document Tags
Abstract: Surface Mount Multilayer Ceramic Chip Capacitors for Commodity Applications Vishay FOOTPRINT DESIGN Circuit board design first steps are to consider how the surface mount board will be manufactured. The , VJ.W1BC Soldering and Footprint Design Vishay Surface Mount Multilayer Ceramic Chip Capacitors for Commodity Applications RECOMMENDED SOLDERING CONDITIONS Lead (Pb)-free terminated MLCCs are , parameters for reliable joints TYPICAL SMD FOOTPRINT E Occupied area G D Solder land/Solder Vishay Intertechnology
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0201 footprint 0201 capacitor footprint land pattern 0805 SMD CASE footprint 1210 footprint ceramic capacitor footprint dimension
Abstract: VJ.W1BC Soldering and Footprint Design Vishay Surface Mount Multilayer Ceramic Chip , AT www.vishay.com/doc?91000 VJ.W1BC Soldering and Footprint Design Surface Mount Multilayer Ceramic Chip Capacitors for Commodity Applications Vishay FOOTPRINT DESIGN Circuit board design first steps are to consider how the surface mount board will be manufactured. The manufacturing process , reliable joints TYPICAL SMD FOOTPRINT E Occupied area G D Solder land/Solder paste pattern Vishay Intertechnology
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Abstract: sensor. The first topic that will be discussed is the minimum recommended footprint for surface mount , supply. Figure 2. I2C Connection to MCU MINIMUM RECOMMENDED FOOTPRINT FOR SURFACE MOUNTED APPLICATIONS Surface mount board layout is a critical portion of the total design. The footprint for the surface mount packages must be the correct size to ensure proper solder connection interface between the , used successfully for soldering the devices. Figure 3. Package Footprint, PCB Land Pattern, and Freescale Semiconductor
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AN3839 MMA7660FC MMA7660 accelerometer sensor land pattern for DFN
Abstract: 's requirement for a manufacturing alternative allowing flexibility in selecting whether to surface mount an , application. The interposer has a die specific OLGA land pattern of .024" (0.609mm) diameter metal defined , pin lands. This pin land pattern is offset .025" (0.635mm) in the X and Y directions in relation to the OLGA land pattern. The pin lands and BGA land pairs are connected to each other with a .010" , Package Trace Metal Copper External Heat Slug Yes External Capacitors Yes Performance Intel
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A7647 A7647-01 A7190-01 socket 615-PIN socket s1 REFLOW A7646-01 A5775-01
Abstract: requirements for surface mount devices and land pattern standard. The next paragraph explains how to read the , AN10365 Surface mount reflow soldering description Rev. 04 - 13 August 2009 Application note Document information Info Content Keywords surface mount, reflow soldering, component handling , semiconductor packages. AN10365 NXP Semiconductors Surface mount reflow soldering description , NXP Semiconductors Surface mount reflow soldering description 1. Introduction This application NXP Semiconductors
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Cu3Sn JEDEC J-STD-033b.1 ipc 610D SSOP20 LAND PATTERN JEDEC J-STD-033b J-STD-033b.1
Abstract: AN10365 Surface mount reflow soldering description Rev. 01 - 24 May 2005 Application note Document information Info Content Keywords surface mount reflow soldering Abstract This , Semiconductors Surface mount reflow soldering description Revision history Rev Date Description 1 , . Rev. 01 - 24 May 2005 2 of 26 AN10365 Philips Semiconductors Surface mount reflow , surface mount IC packages. Nowadays, reflow soldering is a widely spread technology for soldering of Philips Semiconductors
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Lead Free reflow soldering profile BGA HVQFN48 philips pb-free products Solder Paste, Indium, Type 3 SSOP20
Abstract: AN10365 Surface mount reflow soldering description Rev. 02 - 26 July 2006 Application note Document information Info Content Keywords surface mount reflow soldering Abstract This , Semiconductors Surface mount reflow soldering description Revision history Rev Date Description , 2006 2 of 26 AN10365 Philips Semiconductors Surface mount reflow soldering description 1. Introduction This application note provides guidelines for board mounting of surface mount IC Philips Semiconductors
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Solder Paste, Indium 5.1, Type 3 SOT266-1 LAND PATTERN
Abstract: NXP Semiconductors Surface mount reflow soldering description Footprint information for reflow , AN10365 Surface mount reflow soldering description Rev. 03 - 22 April 2008 Application note Document information Info Content Keywords surface mount reflow soldering Abstract This , Surface mount reflow soldering description Revision history Rev Date Description 03 , 2008 2 of 24 AN10365 NXP Semiconductors Surface mount reflow soldering description 1 NXP Semiconductors
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Cu6Sn5 J-STD-020D
Abstract: , PowerPAD land PCB footprint (Figure 2) SYMBOL* P W L L2 L1 S A Y X P1 W1 L3 S1 Y1 X1 , Instruments Incorporated Continued from previous page Figure 2. 48-pin HTSSOP land pattern Figure 2 shows the pattern of IC pin and PowerPAD landings, called the IC footprint. These are the PCB pads , landings of the surface mount components creates an effective contact between the PowerPAD, IC pins , Footprint L1 L2 Local Fiducials G3 G2 Global Fiducials to the input capacitors and feedback Texas Instruments
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IPC-A-6103 14 pin ic 7404 datasheet ANSI/IPC-A-610 TPA032D04 SLMA002 PIC BASIC CIRCUIT TPA005D1 TPA032D0 C011905 SLYT182
Abstract: recommended. The solder mask footprint will match what is shown for the PCB metal land pattern with a 2 mil to , . Typical thickness is 3 inch to 8 inch gold over 180 inch nickel. PCB Land Pattern Recommendation PCB land , has been developed and tested for optimized assembly at RFMD. The PCB land pattern has been developed to accommodate lead and package tolerances. Since surface mount processes vary from company to company, careful process development is recommended. PCB Metal Land Pattern DS110718 7628 Thorndike RF Micro Devices
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RF1604D RF1109 7915M RF1604DPCBA-410
Abstract: Electronic Industries Association, EIA. IPC-SM-782: Surface Mount Design and Land Pattern Standard, published , and pressure to form a single structure. Land Pattern: Also called footprint or Pad, define the site , provide(s) access to the surface of the land in one or more layers of the board. All-metal package: A , and voltage stress. Butt lead: A lead count of surface mount devices in which pin tips contact the PC , connection of the gold-plated TAB leads to the gold bump on the chip. I-lead: A surface mount device lead Intel
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IPC-SM-780
Abstract: Electronic Industries Association, EIA. IPC-SM-782: Surface Mount Design and Land Pattern Standard, published , and pressure to form a single structure. Land Pattern: Also called footprint or Pad, define the site , provide(s) access to the surface of the land in one or more layers of the board. All-metal package: A , and voltage stress. Butt lead: A lead count of surface mount devices in which pin tips contact the PC , connection of the gold-plated TAB leads to the gold bump on the chip. I-lead: A surface mount device lead Intel
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CERAMIC PIN GRID ARRAY wire lead frame nickel corrosion electroplating
Abstract: Electronic Industries Association, EIA. IPC-SM-782: Surface Mount Design and Land Pattern Standard, published , a multilayer board that provide(s) access to the surface of the land in one or more layers of the , lead: A lead count of surface mount devices in which pin tips contact the PC board. C Carrier: A , : A surface mount device lead whose ends contact the board at a 90º angle; also called a butt joint , the surface of a conductive pattern utilizing component holes. Insulators: A class of materials with Intel
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Abstract: Engineering Council. J-lead: A surface mount device whose leads are formed into a "J" pattern, folding under , multilayer board that provide(s) access to the surface of the land in one or more layers of the board , lead: A lead count of surface mount devices in which pin tips contact the PC board. C Carrier: A , gold-plated TAB leads to the gold bump on the chip. I-lead: A surface mount device lead whose ends contact , mechanical connection of a component to the surface of a conductive pattern utilizing component holes Intel
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smema ultrasonic bond land pattern for TSOP tensile-strength soft solder die bonding TO metal package aluminum kovar
Abstract: the Quad Flat No Lead (QFN) Package Surface mount board layout is a critical portion of the total design. The footprint for the surface mount packages must be the correct size to ensure proper solder , 0.25mm PCB Land Pattern & Stencil Package footprint Solder mask opening = PCB land pad edge + , , Pull-down Resistor, Sensor, I/O pins, Non Solder Mask Defined, Solder Mask, Land Pattern, Stencil, Halogen , operating at a higher voltage. Bypass capacitors are recommended on the input voltage pins to ensure a Freescale Semiconductor
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AN4077 MMA845 MMA8450Q MMA8451Q MMA8452Q MMA8453Q
Abstract: MINIMUM RECOMMENDED FOOTPRINT FOR SURFACE MOUNTED APPLICATIONS Surface mount board layout is a critical portion of the total design. The footprint for the surface mount packages must be the correct size to , conditions with 260°C maximum temperature. PCB land pattern - NSMD Package Pad Signal trace 0.1mm , °C Drop Test (1) Storage Temperature Range 1. Dropped onto concrete surface from any axis , integrated-circuit accelerometer. The device consists of two surface micromachined capacitive sensing cells (g-cell Freescale Semiconductor
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MMA6271QT QFN-16 MMA6271QR2 16-LEAD
Abstract: Freescale Semiconductor MINNIMUM RECOMMENDED FOOTPRINT FOR SURFACE MOUNTED APPLICATIONS Surface mount board layout is a critical portion of the total design. The footprint for the surface mount packages , . PCB land pattern - NSMD Package Pad Signal trace 0.1mm width and 0.5mm (min) length near , ) Storage Temperature Range 1. Dropped onto concrete surface from any axis. ELECTRO STATIC DISCHARGE , accelerometer. The device consists of two surface micromachined capacitive sensing cells (g-cell) and a signal Freescale Semiconductor
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MMA7261QT MMA7261QR2 mp3 player circuit diagram pcb layout MMA7261Q
Abstract: FOR SURFACE MOUNTED APPLICATIONS Surface mount board layout is a critical portion of the total design. The footprint for the surface mount packages must be the correct size to ensure proper solder , conditions with 260°C maximum temperature. \ PCB land pattern - NSMD Package Pad Signal trace , °C Drop Test (1) Storage Temperature Range 1. Dropped onto concrete surface from any axis , integrated-circuit accelerometer. The device consists of two surface micromachined capacitive sensing cells (g-cell Freescale Semiconductor
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MMA6281QT MMA6281QR2 QFN footprint
Abstract: Semiconductor MINIMUM RECOMMENDED FOOTPRINT FOR SURFACE MOUNTED APPLICATIONS Surface mount board layout is a critical portion of the total design. The footprint for the surface mount packages must be the , multiple reflow of leadfree conditions with 260°C maximum temperature. PCB land pattern - NSMD , 1.8 m Tstg ­40 to +125 °C Storage Temperature Range 1. Dropped onto concrete surface , accelerometer. The device consists of two surface micromachined capacitive sensing cells (g-cell) and a signal Freescale Semiconductor
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MMA6280QT MMA6280QR2 pedometer circuit diagram of pedometer QFN "200 pin" PACKAGE
Abstract: Sensors Freescale Semiconductor MINIMUM RECOMMENDED FOOTPRINT FOR SURFACE MOUNTED APPLICATIONS Surface mount board layout is a critical portion of the total design. The footprint for the surface mount , . PCB land pattern - NSMD Package Pad Signal trace 0.1mm width and 0.5mm (min) length near , Temperature Range 1. Dropped onto concrete surface from any axis. ELECTRO STATIC DISCHARGE (ESD) WARNING , integrated-circuit accelerometer. The device consists of two surface micromachined capacitive sensing cells (g-cell Freescale Semiconductor
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MMA6270QT MMA6270QR2
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