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SSTL16857DGG,112 NXP Semiconductors Registers 14-BIT SSTL 2 REG DRIVER (Dec 2016) Mouser Electronics Buy
SSTL16857DGG,118 NXP Semiconductors Registers 14-BIT SSTL 2 REG DRIVER (Dec 2016) Mouser Electronics Buy
SSTL16877DG NXP Semiconductors Registers 20-BIT REG DRVR W/INV REG (Dec 2016) Mouser Electronics Buy
SSTL16877DGG,512 NXP Semiconductors Registers 20-BIT REG DRVR (Dec 2016) Mouser Electronics Buy
SSTL16877DGG,518 NXP Semiconductors Registers 20-BIT REG DRVR (Dec 2016) Mouser Electronics Buy
SSTL16877DGG-T NXP Semiconductors Registers 20-BIT REG DRVR W/INV REG (Dec 2016) Mouser Electronics Buy
SSTL16877DGG/G,118 NXP Semiconductors Registers 20-BIT REG DRVR W/INV REG (Dec 2016) Mouser Electronics Buy

SSTL-135

Catalog Datasheet MFG & Type PDF Document Tags
Abstract: €” LVPECL Video graphics and clock distribution — SSTL-15 SSTL-15 DDR3 SDRAM JESD79-3D JESD79-3D SSTL-135 , SDRAM — Differential SSTL-15 SSTL-15 DDR3 SDRAM JESD79-3D JESD79-3D Differential SSTL-135 DDR3L SDRAM , -15 VCCPD 1.5 2.5 0.75 SSTL-135 VCCPD 1.35 2.5 0.675 SSTL-125 SSTL-125 VCCPD 1.25 , Differential SSTL-15 SSTL-15 VCCPD 1.5 2.5 — Differential SSTL-135 VCCPD 1.35 2.5 â , as SSTL-12 SSTL-12, SSTL-15 SSTL-15, SSTL-125 SSTL-125, SSTL-135, and HSUL-12 HSUL-12. High-Speed Differential I/O with DPA Support ... Altera
Original
datasheet

44 pages,
886.71 Kb

SSTL-125 SSTL-12 SV51006 TEXT
datasheet frame
Abstract: PI2DDR3212 PI2DDR3212 1.35V/ 1.5V/1.8V 14 bit 2:1 DDR3/DDR4 Switch Features Description ÎÎ bit 2:1 switch that supports DDR3 800 2133Mbps, DDR4 14 This 14-bit DDR3/DDR4 switch is designed for 1.35V/ 1.5V/ 1.8V supply voltage, POD_12, SSTL_135, SSTL_15 or SSTL_18 signaling and CMOS select input signals. It is designed for DDR3 or DDR4 memory bus with speed up to 5Gbps. It supports DDR3 800 , ÎÎ DDR3/DDR4 Memory Bus System ÎÎ POD_12, SSTL_12, SSTL_135, SSTL_15 or SSTL_18 Îà ... Pericom Semiconductor
Original
datasheet

6 pages,
757.51 Kb

PI2DDR3212 TEXT
datasheet frame
Abstract: PI2DDR3212 PI2DDR3212 1.35V/ 1.5V/1.8V 14 bit 2:1 DDR3/DDR4 Switch Features Description ÎÎ bit 2:1 switch that supports DDR3 800 2133Mbps, DDR4 14 This 14-bit DDR3/DDR4 switch is designed for 1.35V/ 1.5V/ 1.8V supply voltage, POD_12, SSTL_135, SSTL_15 or SSTL_18 signaling and CMOS select input signals. It is designed for DDR3 or DDR4 memory bus with speed up to 5Gbps. It supports DDR3 800 , ÎÎ DDR3/DDR4 Memory Bus System ÎÎ POD_12, SSTL_12, SSTL_135, SSTL_15 or SSTL_18 Îà ... Pericom Semiconductor
Original
datasheet

7 pages,
769 Kb

PI2DDR3212 TEXT
datasheet frame
Abstract: . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . SSTL15 SSTL15_R, SSTL135_R , _15_DCI, SSTL135_DCI, DIFF_SSTL18 SSTL18_II_DCI, DIFF_SSTL_15_DCI, DIFF_ SSTL135_DCI . . . . . . . . . . . . . . . . . . . . , , SSTL15 SSTL15_T_DCI, SSTL135_T_DCI, DIFF_SSTL18 SSTL18_II_T_DCI, DIFF_SSTL15 SSTL15_T_DCI, DIFF_ SSTL135_T_DCI . . . . . . . . . . , , SSTL135, DIFF_SSTL18 SSTL18_II, DIFF_SSTL15 SSTL15, DIFF_SSTL135 SSTL135 . . . . . . . . 49 52 54 55 57 58 58 58 58 , , DIFF_SSTL12 SSTL12_DCI, DIFF_SSTL12 SSTL12_T_DCI75 DCI75 SSTL18 SSTL18, SSTL15 SSTL15, SSTL135, SSTL12 SSTL12 . . . . . . . . . . . . . . . . . . . . . ... Xilinx
Original
datasheet

184 pages,
6721.56 Kb

UG471 TEXT
datasheet frame
Abstract: , SSTL_135 ©Elpida Memory, Inc. 2002-2009 Die Rev. ECT-TS-1984 ECT-TS-1984 Apr. 2009 Part Number Decoder , , SSTL_135 : In case of unbuffered Non-ECC DIMM. Both of "A" and "0" mean without thermal sensor ... Elpida Memory
Original
datasheet

11 pages,
79.68 Kb

ddr3 tsop DDR3-1066G ddr 200pin SO DIMM 200pin SO DIMM ddr3 ram SO-DIMM DDR3 ECC Elpida MODULE Elpida Memory ls 2533 ELPIDA DDR2 sodimm ELPIDA PC2700 tsop ddr2 ram elpida 1gb pc2 FBGA DDR3 x32 ddr3 so dimm 204 pin ELPIDA ddr2 ram ELPIDA mobile DDR ELPIDA DDR3 SSTL-135 TEXT
datasheet frame
Abstract: -15 Class I and II DDR3 SDRAM SSTL-15 SSTL-15 DDR3 SDRAM SSTL-135 DDR3L SDRAM SSTL-125 SSTL-125 DDR3U , interfaces Differential SSTL-15 SSTL-15 DDR3 SDRAM Differential SSTL-135 DDR3L SDRAM Differential SSTL , (3) 1.5 2.5 0.75 0.75 SSTL-15 SSTL-15 JESD79-3D JESD79-3D (3) 1.5 2.5 0.75 (4) SSTL-135 , SSTL-135 - (3) 1.35 2.5 - (4) Differential SSTL-125 SSTL-125 - (3) 1.25 2.5 , -12, SSTL-15 SSTL-15, SSTL-125 SSTL-125, SSTL-135, and HSUL-12 HSUL-12. High-Speed Differential I/O with DPA Support Stratix V ... Altera
Original
datasheet

34 pages,
996.54 Kb

resistor 240 mini-lvds source driver LPDDR2 pin information SSTL-15 JESD8 SSTL12 LPDDR2 SDRAM mini-lvds SSTL-125 lpddr2 DQ calibration SSTL135 Datasheet LPDDR2 SDRAM DDR3L DDR3U SSTL-135 SSTL-12 lpddr2 datasheet lpddr2 jesd79-3d HSUL-12 TEXT
datasheet frame
Abstract: CBTW28DD14 CBTW28DD14 14-bit bus switch/multiplexer for DDR2/DDR3/DDR4 applications Rev. 6 — 25 July 2014 Product data sheet 1. General description This 14-bit bus switch/multiplexer (MUX) is designed for 1.5 V or 1.8 V supply voltage operation, POD_12, SSTL_12, SSTL_135, SSTL_15 or SSTL_18 signaling and , ® 2.5 GHz bandwidth Low ON insertion loss Low crosstalk High OFF isolation POD_12, SSTL_12, SSTL_135 , _12 1.2 V Pseudo Open Drain interface SSTL_12 Stub Series Terminated Logic for 1.2 V SSTL_135 ... NXP Semiconductors
Original
datasheet

13 pages,
109.28 Kb

CBTW28DD14 TEXT
datasheet frame
Abstract: CBTW28DD14 CBTW28DD14 14-bit bus switch/multiplexer for DDR2/DDR3/DDR4 applications Rev. 5 — 28 May 2014 Product data sheet 1. General description This 14-bit bus switch/multiplexer (MUX) is designed for 1.5 V or 1.8 V supply voltage operation, POD_12, SSTL_12, SSTL_135, SSTL_15 or SSTL_18 signaling and , ® 2.5 GHz bandwidth Low ON insertion loss Low crosstalk High OFF isolation POD_12, SSTL_12, SSTL_135 , interface SSTL_12 Stub Series Terminated Logic for 1.2 V SSTL_135 Stub Series Terminated Logic ... NXP Semiconductors
Original
datasheet

13 pages,
108.66 Kb

CBTW28DD14 TEXT
datasheet frame
Abstract: -15 Class I and II DDR3 SDRAM SSTL-15 SSTL-15 DDR3 SDRAM SSTL-135 DDR3L SDRAM SSTL-125 SSTL-125 DDR3U , interfaces Differential SSTL-15 SSTL-15 DDR3 SDRAM Differential SSTL-135 DDR3L SDRAM Differential SSTL , (3) 1.5 2.5 0.75 0.75 SSTL-15 SSTL-15 JESD79-3D JESD79-3D (3) 1.5 2.5 0.75 (4) SSTL-135 , SSTL-135 - (3) 1.35 2.5 - (4) Differential SSTL-125 SSTL-125 - (3) 1.25 2.5 , -12, SSTL-15 SSTL-15, SSTL-125 SSTL-125, SSTL-135, and HSUL-12 HSUL-12. High-Speed Differential I/O with DPA Support Stratix V ... Altera
Original
datasheet

96 pages,
2679.8 Kb

lpddr2 pcb layout QDR pcb layout SSTL-12 SSTL-125 SSTL-15 SSTL-18 sstl15 UniPHY DDR3L DDR3U Datasheet LPDDR2 Dual LPDDR2 lpddr2 DQ calibration lpddr2 phy HSUL-12 jesd79-3d Datasheet LPDDR2 SDRAM lpddr2 UniPHY lpddr2 lpddr2 datasheet TEXT
datasheet frame
Abstract: CBTW28DD14 CBTW28DD14 14-bit bus switch/multiplexer for DDR2/DDR3/DDR4 applications Rev. 4 — 12 August 2013 Product data sheet 1. General description This 14-bit bus switch/multiplexer (MUX) is designed for 1.5 V or 1.8 V supply voltage operation, POD_12, SSTL_12, SSTL_135, SSTL_15 or SSTL , ® 2.5 GHz bandwidth Low ON insertion loss Low crosstalk High OFF isolation POD_12, SSTL_12, SSTL_135 , interface SSTL_12 Stub Series Terminated Logic for 1.2 V SSTL_135 Stub Series Terminated Logic ... NXP Semiconductors
Original
datasheet

13 pages,
108.99 Kb

CBTW28DD14 TEXT
datasheet frame
Abstract: CBTW28DD14 CBTW28DD14 14-bit bus switch/multiplexer for DDR2/DDR3/DDR4 applications Rev. 5 — 28 May 2014 Product data sheet 1. General description This 14-bit bus switch/multiplexer (MUX) is designed for 1.5 V or 1.8 V supply voltage operation, POD_12, SSTL_12, SSTL_135, SSTL_15 or SSTL_18 signaling and , ® 2.5 GHz bandwidth Low ON insertion loss Low crosstalk High OFF isolation POD_12, SSTL_12, SSTL_135 , interface SSTL_12 Stub Series Terminated Logic for 1.2 V SSTL_135 Stub Series Terminated Logic ... Lattice Semiconductor
Original
datasheet

97 pages,
7917.58 Kb

DS1044 TEXT
datasheet frame