NEW DATABASE - 350 MILLION DATASHEETS FROM 8500 MANUFACTURERS
NEW DATABASE - 350 MILLION DATASHEETS FROM 8500 MANUFACTURERS
| Catalog Datasheet Results | Type | Document Tags |
| Abstract: .9 - .11 - .19 - .25 - RBE, RBS.36 - .36 - .41 - MkMk.49 - SBS.63 - PSW.67 - .68 - .69 - RBE, RBS.72 - .74 , . PD754304X PD754304X, A, B, C, D, E, H, L 00H-1FH 00H-1FH - RBERBS RBSRBERBS RB RB = RBERBS -RBE, RBS RBS RBE Ã- Ã- Ã-don't care RBE RBE - RBS - RBE = 1 RBE = 0 RBE = 1 RBS 36 ... | Original |
347 pages, |
uPD75P4308 uPD754302 uPD750004 PD754304 75P4308 TM02 2P20 RBS 3116 datasheet abstract |
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| Abstract: Product Datasheet 1.4 2000 MB86695 MB86695 October 2000 Version 1.4 FireStreamTM50 ATM 52Mbps SAR Device The FireStream50 is a low cost ATM protocol controller which autonomously terminates ATM Adaptation Layer standard Type 5 (AAL5). ATM cells are received through a UTOPIA v2.01 compliant interface. Simultaneous segmentation and reassembly can be achieved at a peak rate of 155Mbps, and an average rate in excess of 52Mbps. FML/NPD/FS50/DS/2256 FML/NPD/FS50/DS/2256 PLASTIC PACKAGE SQFP-208 SQFP-208 There ... | Original |
222 pages, |
MB86695 CRC32 CRC10 CRC-10 2256 1F4 MB86695 abstract |
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| Abstract: Product Datasheet MB86697A MB86697A A«9° FireStream™! 55 ATM 155Mbps SAR Device /FM UN P D/FS155/DS/1973 D/FS155/DS/1973 The FireStream™155 is a high performance ATM protocol controller which autonomously terminates ATM Adaptation Layer standard Type 5 (AAL5). ATM cells are received through a UTOPIA v2.01 compliant interface. Simultaneous segmentation and reassembly can be achieved at an average rate in excess of 155Mbps. All ATM Forum traffic classes (ABR, VBR, CBR, UBR) are supported with traffic management to AT ... | OCR Scan |
222 pages, |
CRC-10 CRC10 CRC32 HQFP240 LTPQ MB86697A TM155 RBS 2111 D/FS155/DS/1973 MB86697A abstract |
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| Abstract: Product Datasheet 2.1 2000 MB86698A MB86698A FireStreamTM155G April 2000 Version 2.1 ATM 155Mbps SAR Device The FireStreamTM155G is a high performance ATM protocol controller which autonomously terminates ATM Adaptation Layer standard Type 5 (AAL5). ATM cells are passed via a UTOPIA v2.01 compliant interface. Access to system memory is through a 50MHz generic bus interface to achieve simultaneous segmentation and reassembly at an average rate in excess of 155Mbps. /FML/NPD/FS1 ... | Original |
226 pages, |
155G cpu 226 CRC-10 CRC32 HQFP240 MB86698A MC68040 MC68060 MPC860 RBS 2201 MB86698A abstract |
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| Abstract: Product Datasheet 2.3 2000 MB86697A MB86697A FireStreamTM155 April 2000 Version 2.3 ATM 155Mbps SAR Device The FireStreamTM155 is a high performance ATM protocol controller which autonomously terminates ATM Adaptation Layer standard Type 5 (AAL5). ATM cells are received through a UTOPIA v2.01 compliant interface. Simultaneous segmentation and reassembly can be achieved at an average rate in excess of 155Mbps. /FML/NPD/FS155/DS/1973 /FML/NPD/FS155/DS/1973 PLASTIC PACKAGE HQFP240 HQFP240 All ATM Forum t ... | Original |
222 pages, |
MB86697A HQFP240 CRC32 CRC10 CRC-10 MB86697A abstract |
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| Abstract: Reserved RSR0 RBS[10:0] Rx Data Buffer Start Address Next Descriptor Address Figure-3 The , 10-0 RBS Description Reserved. Receive buffer size: Received buffer size for this descriptor , value is loaded from EEPROM. (offset 44H) Reserved 31-16 This field is hardwired to 0. ... | Original |
35 pages, |
RBS 3116 Myson Century cs MTD891 AD30 AD29 AD27 IEEE802 93C46/93C56 MTD891 abstract |
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| Abstract: KSZ8841-PMQL KSZ8841-PMQL Single-Port Ethernet MAC Controller with PCI Interface Rev.1.5 General Description The KSZ8841-series single-port chip includes PCI and non-PCI CPU interfaces. This datasheet describes the KSZ8841-PMQL KSZ8841-PMQL with PCI CPU interface chips. For information on the KSZ8841 KSZ8841 non-PCI CPU interface chips, refer to the KSZ8841-MQL KSZ8841-MQL datasheet. The KSZ8841-PMQL KSZ8841-PMQL is a single port Fast Ethernet MAC chip with a 32-bit/33MHz PCI processor interface. Designed to be fully compliant with the IEE ... | Original |
74 pages, |
KSZ8841-PMQLI KSZ8841-PMQL KSZ8841 architecture of 80486 microprocessor KSZ8841-PMQL abstract |
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| Abstract: KSZ8842-PMQL/PMBL KSZ8842-PMQL/PMBL 2-Port Ethernet Switch with PCI Interface Rev.1.5 General Description The KSZ8842-series of 2-port switches includes PCI and non-PCI CPU interfaces. This datasheet describes the KSZ8842-PMQL/PMBL KSZ8842-PMQL/PMBL PCI CPU interface chips. KSZ8842-PMQL KSZ8842-PMQL is PQFP package chip, KSZ8842-PMBL KSZ8842-PMBL is LFBGA package chip. For information on the KSZ8842-MQL/MBL KSZ8842-MQL/MBL CPU non-PCI interface switches, refer to the KSZ8842-MQL/MBL KSZ8842-MQL/MBL datasheet. The KSZ8842-PMQL/PMBL KSZ8842-PMQL/PMBL is the industry's first fully managed 2-por ... | Original |
119 pages, |
KSZ8842-PMQLI KSZ8842-PMQL 670mS 2-port bridge fiber UTP 0x053A KSZ8842-PMQL/PMBL KSZ8842-PMQL/PMBL abstract |
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| Abstract: KSZ8842-PMQL KSZ8842-PMQL 2-Port Ethernet Switch with PCI Interface Data Sheet Rev. 1.0 For industrial automation applications, the KSZ8842-PMQL KSZ8842-PMQL can run in half duplex mode regardless of the application. The KSZ8842-PMQL KSZ8842-PMQL offers an extensive feature set that includes tag/port-based VLAN, quality of service (QoS) priority management, management information base (MIB) counters, and CPU control/data interfaces to effectively address Fast Ethernet applications. The KSZ8842-PMQL KSZ8842-PMQL contains two 10/100 trans ... | Original |
113 pages, |
LP 7618 KSZ8842-PMQLI KSZ8842-PMQL 2-port bridge fiber UTP mac 97 ab KSZ8842-MQL KSZ8842-PMQL abstract |
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| Abstract: KSZ8842-PMQL KSZ8842-PMQL 2-Port Ethernet Switch with PCI Interface Data Sheet Rev. 1.1 General Description The KSZ8842-series of 2-port switches includes PCI and nonPCI CPU interfaces (see Ordering Information). This datasheet describes the KSZ8842-PMQL KSZ8842-PMQL PCI CPU interface chips. For information on the KSZ8842-MQL KSZ8842-MQL CPU non-PCI interface switches, refer to the KSZ8842-MQL KSZ8842-MQL datasheet. The KSZ8842-PMQL KSZ8842-PMQL is the industry's first fully managed 2-port switch with a 32 bit/33MHz PCI processor interface. It is ... | Original |
114 pages, |
KSZ8842-PMQLI KSZ8842-PMQL KSZ8842-MQL KSZ8842-PMQL abstract |
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| Abstract | Saved from | Date Saved | File Size | Type | Download |
| Over 1.1 million files (1986-2013): html articles, reference designs, gerber files, chemical content, spice models, programs, code, pricing, images, circuits, parametric data, RoHS data, cross references, pcns, military data, and more. Please note that due to their age, these files do not always format correctly in modern browsers. Disclaimer. |
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| Enable */ /* CSR18 CSR18 CSR18 CSR18 Command Register (bits 31:16 automatically set from EEPROM */ #define CSR18 CSR18 CSR18 CSR18_RFS chained */ #define RDESC1_RBS2_MSK 0x003FF800 /* RBS2 buffer 2 size */ #define RDESC1_RBS1_MSK 0x000007FF /* RBS1 buffer 1 size */ #define RDESC1_RBS1_VAL(x) (x) & RDESC1_RBS1_MSK) /* multiple of 4 */ #define RDESC1_RBS2_VAL(x) (x) www.datasheetarchive.com/download/67732948-843322ZC/vxworks.zip (steEnd.h) |
STMicroelectronics | 05/01/2000 | 29.56 Kb | ZIP | vxworks.zip |
| Default Val RW Type CR0(offset = 00h), LID - Loaded Identification number of Device and Vendor 31~16 LDID ch), LT - Latency Timer 31~16 - Reserved. 15~ 8 LT Latency Timer. This value specifies the registers map into the I/O space. 0 RO CR11(offset = 2ch), SID - Subsystem ID. 31~16 SID Subsystem ID. This value is loaded from EEPROM after power on or hardware reset. From EEPROM 31~16 Table 4 (offset = 40h), DS - Driver Space for special purpose. 31~16 - reserved 15~8 DS Driver Space for www.datasheetarchive.com/files/stmicroelectronics/stonline/books/ascii/docs/6641.htm |
STMicroelectronics | 14/06/1999 | 112.55 Kb | HTM | 6641.htm |
| Val RW Type CR0(offset = 00h), LID - Loaded Identification number of Device and Vendor 31~16 LDID - Latency Timer 31~16 - Reserved. 15~ 8 LT Latency Timer. This value specifies the latency timer of configuration registers map into I/O space. 0 RO CR11(offset = 2ch), SID - Subsystem ID. 31~16 SID Subsystem - Driver Space for special purpose. 31~16 - reserved Table 4. Configuration Registers Descriptions - Signature of STE10/100 STE10/100 STE10/100 STE10/100 31~16 DID Device ID, the device ID number of the STE10/100 STE10/100 STE10/100 STE10/100. 2774h RO 15~0 VID www.datasheetarchive.com/files/stmicroelectronics/stonline/books/ascii/docs/6773.htm |
STMicroelectronics | 20/10/2000 | 111.92 Kb | HTM | 6773.htm |
| 31~16 LDID Loaded Device ID, the device ID number loaded from serial EEPROM. From EEPROM R ), LT - Latency Timer 31~16 - Reserved. 15~ 8 LT Latency Timer. This value specifies the latency (offset = 2ch), SID - Subsystem ID. 31~16 SID Subsystem ID. This value is loaded from EEPROM as a result (offset = 40h), DS - Driver Space for special purpose. 31~16 - reserved Table 4. Configuration CR32(offset = 80h), SIG - Signature of STE10/100A STE10/100A STE10/100A STE10/100A 31~16 DID Device ID, the device ID number of the www.datasheetarchive.com/files/stmicroelectronics/stonline/books/ascii/docs/6773-v1.htm |
STMicroelectronics | 09/01/2001 | 108.62 Kb | HTM | 6773-v1.htm |
| #0;#5;#6;#7;#6;#11; #1;#4;#8;#6;#2; #3;#15;#2;#14; LPC2119/2129/2194/2292/2294 LPC2119/2129/2194/2292/2294 LPC2119/2129/2194/2292/2294 LPC2119/2129/2194/2292/2294 USER MANUAL Preliminary Supersedes data of 2004 Feb 03 2004 May 03 INTEGRATED CIRCUITS 2 May 03, 2004 Philips Semiconductors Preliminary User Manual LPC2119/2129/2194/2292/2294ARM-based Microcontroller 3 May 03, 2004 Philips Semiconductors Preliminary User Manual LPC2119/2129/2194/2292/2294ARM-based Microcontroller Table of Contents List of Figures . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . www.datasheetarchive.com/download/99213260-653674ZC/silverbox-cd.zip (UM_LPC21XX_LPC22XX_2.pdf) |
Philips | 18/06/2004 | 10852.57 Kb | ZIP | silverbox-cd.zip |
| DRAFT DRAFT DRAFT DR DRAFT DRAFT DRAFT RAF DRAFT DRAFT DRAFT FT D DRAFT DRAFT DRAFT DRA UM10237 UM10237 UM10237 UM10237 LPC24xx User manual DDRAFT DRA DRAFT DRAFT DRAFT Rev. 01.05 - 10 December 2007 User manual Document information Info Content Keywords LPC2400 LPC2400 LPC2400 LPC2400, LPC2458 LPC2458 LPC2458 LPC2458, LPC2460 LPC2460 LPC2460 LPC2460, LPC2468 LPC2468 LPC2468 LPC2468, LPC2470 LPC2470 LPC2470 LPC2470, LPC2478 LPC2478 LPC2478 LPC2478, ARM, ARM7, 32-bit, Single-chip, External memory interface, USB 2.0, Device, Host, OTG, Ethernet, CAN, I2S, I2C, SPI, UART, PWM, IRC, Microcontroller Abstract Initial LPC2400 LPC2400 LPC2400 LPC2400 user manual release DRAFT DRA www.datasheetarchive.com/download/36331940-595893ZC/ird.cd.contents.zip (user.manual.lpc24xx.pdf) |
NXP | 23/10/2012 | 35869.34 Kb | ZIP | ird.cd.contents.zip |
| -�packed�-Australia Siemens Ltd., Head Office 544 Church Street Richmond (Melbourne),Vic. 3121 Tel.: (03) 4207111 Tx : 30425 FAX: (03) 4207275 Austria Siemens AG �sterreich Postfach 326 1031 Wien Tel.: (01) 71711-5661 Tx: 1372-10 FAX: (01) 71711-5973 Belgium Siemens S.A. chaussee de Charleroi 116 1060 Bruxelles Tel.: (02) 536-2111 Tx: 21347 FAX: (02) 536-2492 Brazil ICOTRON S.A. Ind�stria de Componentes Eletronicos Avenida Mutinga,3650-6�andar 05150 S www.datasheetarchive.com/files/siemens/img/text-v1 |
Siemens | 16/03/1994 | 942.81 Kb | text-v1 | |
| 1 1 0 /catalog/appnotes/15106.html Applicationnotes for Bipolar power transistors Title Date FS072 FS072 FS072 FS072: Horizontal Deflection for 17 64kHz monitors - BU4522AF/AX BU4522AF/AX BU4522AF/AX BU4522AF/AX 1998-04-14 FS078 FS078 FS078 FS078: Horizontal deflection transistors for 17, 70 kHz monitors 2 1 0 /catalog/appnotes/15107.html Applicationnotes for Lighting Title Date AN BUJ100 BUJ100 BUJ100 BUJ100: Philips BUJ100 BUJ100 BUJ100 BUJ100 transistor in TO-92 suits all Philips BUJ100 BUJ100 BUJ100 BUJ100 transistor in TO-92 suits all Compact Fluorescent Lamp 3 1 0 /catalog/appnotes/15230.html Applicationnotes for Deflecti www.datasheetarchive.com/files/philips/search/docindex.txt |
Philips | 25/04/2003 | 954.24 Kb | TXT | docindex.txt |
| 1 1 0 /catalog/index.html Product catalog Please choose one of the following: 2 1 0 /catalog/parametrics/10.html Parametrics TSA5512M/C3 TSA5512M/C3 TSA5512M/C3 TSA5512M/C3 Temperature Range -10 to +80 Application 12C Peripherals Circuit Type Multimedia ICs Category Synthesizers Number of Pins 20 Function Synthesizers 3 1 0 /catalog/parametrics/11.html Parametrics BF722 BF722 BF722 BF722 Ptot max mW 1200 PNP COMPL BF723 BF723 BF723 BF723 I C max mA 50 fT min MHz 60 hFE max >50 Category 4 1 0 /catalog/parametrics/12.html Parametrics TDA8010M/C1 TDA8010M/C1 TDA8010M/C1 TDA8010M/C1 Total gain min/max dB www.datasheetarchive.com/files/philips/search/docindex-v2.txt |
Philips | 14/02/2002 | 998.47 Kb | TXT | docindex-v2.txt |
| begin 666 XSI_verilog.tar.Z M'YV06*8D^6*GC)PT;-Z0&@H3+@P#)LP www.datasheetarchive.com/download/43392718-960537ZC/ver_ex.uu |
Xilinx | 05/09/1996 | 4001.98 Kb | UU | ver_ex.uu |