NEW DATABASE - 350 MILLION DATASHEETS FROM 8500 MANUFACTURERS
NEW DATABASE - 350 MILLION DATASHEETS FROM 8500 MANUFACTURERS
| Part | Manufacturer | Description | Samples | Ordering |
| TPS23851EVM-001 | Texas Instruments | Evaluation Module for TPS23851 High Power, Wide Voltage Range Quad Port Ethernet PSE Manager | 
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| TNETD4200GLS | Texas Instruments | Quad-port Central Office Transceiver for the TNETD4000C ADSL Chipset 384-FCBGA |
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| TNETD4200GJG | Texas Instruments | TNETD4200 Quad-port Central Office Transceiver for the TNETD4000C ADSL Chipset |
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| TPS23851DCET | Texas Instruments | High Power Wide Voltage Range Quad Port Ethernet Power Sourcing Equipment Manager 36-SSOP -20 to 125 |
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| TPS23851DCE | Texas Instruments | High Power Wide Voltage Range Quad Port Ethernet Power Sourcing Equipment Manager 36-SSOP -20 to 125 |
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| Part | Manufacturer | Description | Type | Ordering |
| Quad-Port | Analog Devices | Quad-Port ADSL Chipset |
2 pages, |
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| Catalog Datasheet Results | Type | Document Tags |
| Abstract: access at 4.5 Mbps downstream/450 kbps upstream. On short loops, a QuadPort-based modem can achieve , Quad-Port ADSL Chipset The Quad-Port is a 4th generation CO-specific solution that can push the , , CO-specific, DMT-based ADSL chipset: the Quad-Port. The Quad-Port is a fully programmable, multimode , The power consumption · 40°C to +85°C operation integration levels, the Quad-Port reduces , full-rate ADSL. FUNCTIONALLY COMPLETE Unlike functionally deficient solutions, the Quad-Port chipset ... | Original |
2 pages, |
TR328 Quad-Port AD8022 AD8016 AD6491 AD6490 PSOP/24 PSOP/24 abstract |
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| Abstract: Introducing the CYPRESS QuadPortTM Switch (CY7C0430BV CY7C0430BV) QuadPort Arbitration Introduction The , QuadPort's data buffer. This allows setting up of data partitions of any size down to a single 18-bit , circuit that does not allow for simultaneous operations, or by using the QuadPort's built in mailboxes. , employ the mailbox. Arbitration using the QuadPort's Mailbox The upper four addesses of the QuadPort , convenient way to design an arbitration scheme for the QuadPort. Figure 3. A QuadPort System. As this ... | Original |
4 pages, |
CY7C0430BV CY7C0430BV abstract |
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| Abstract: Marvell: Alaska Quad 88E1043 88E1043 (Quad-Port) Fiber Transceiver Search Home > Products > Transceivers > Alaska Quad Fiber Family > 88E1043 88E1043 Switching Alaska® Quad 88E1043 88E1043 (Quad-Port) Fiber Transceiver NEWS Transceivers Alaska X Family Alaska Octal-Port Family Alaska Quad-Port Family Alaska Dual-Port Family Alaska Single-Port Family Alaska Quad Fiber Family 88E1043 88E1043 Fast Ethernet PHY Family Power Management The Marvell® Alaska® Quad 88E1043 88E1043 fiber transceiver includes four ... | Original |
1 pages, |
88E1043 MDIO MDC MDIO Gigabit MDIO controller marvell alaska Gigabit Ethernet PHY TBI Marvell PHY RGMII alaska RGMII phy RGMII GMII 88E1043 abstract |
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| Abstract: written into the receive buffer space of the QuadPort. This system sends data around the ring and allows , Using QuadPortTM DSE in Switching Applications Introduction The ability to switch data between , incoming data streams until the required resources are available again. Cypress's QuadPort Datapath , note discusses the switching capabilities provided by the QuadPort DSE. Integration of the QuadPort , implemented is important to appreciate the benefits the QuadPort DSE provides to switching applications. ... | Original |
8 pages, |
CY7C04314BV CY7C04312BV CY7C0430BV datasheet abstract |
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| Abstract: Quad-Port Memories in Virtex Devices Author: Nick Sawyer and Marc Defossez XAPP228 XAPP228 (v1.0) September 24 , SpartanTM-II and VirtexTM families can be used as Quad-Port memories. This essentially involves a data access , Figure 1: Basic Block RAM Structure Some applications need (or are more efficient when using) quad-port memories. It is very easy to implement a quad-port memory function using the existing dual-port RAMs by , Implementation Quad-Port Memories in Virtex Devices There are now four ports available to the designer, A ... | Original |
5 pages, |
XAPP228 datasheet abstract |
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| Abstract: buffer space of the QuadPort. This system sends data around the ring and allows each node to inject its , Using QuadPortTM DSE in Switching Applications AN1020 AN1020 Introduction Figure 1. Generic Switch , Cypress's QuadPort Datapath Switching Element (DSE) provides a switching solution that inherently handles contention. This application note discusses the switching capabilities provided by the QuadPort DSE. Integration of the QuadPort DSE as a component of larger switch designs is discussed, and sample switch ... | Original |
10 pages, |
CY7C04314BV CY7C04312BV CY7C0430BV AN1020 AN1020 abstract |
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| Abstract: transformer or TXP, TXN, RXP, RXN. Example 4: DS3154-The Layout of a Quad-Port, T3/E3 LIU Table 4-1. , ERJ-3EKF3320V ERJ-3EKF3320V T3049 T3049 UCBJR220 UCBJR220 Figure 4-1. DS3154 DS3154 quad-port, T3/E3 LIU layout-silkscreen top layer. Figure 4-2. DS3154 DS3154 quad-port, T3/E3 LIU silkscreen layout-bottom layer (view mirrored). Figure 4-3. DS3154 DS3154 quad-port, T3/E3 LIU layout-top conducting layer. Figure 4-4. DS3154 DS3154 quad-port, T3/E3 LIU layout-bottom conducting layer. Figure 4-5. DS3154 DS3154 quad-port, T3/E3 LIU ground plane {layer two} layout-no ... | Original |
15 pages, |
DS3154 DS3153 DS3152 DS3151 6 pin pulse transformer pulse transformer calculation datasheet abstract |
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| Abstract: QuadPort's density is sufficient to allow the storage of multiple SONET packets. So as data comes into the , remaining ports address lines loading the starting address of QuadPort's burst counter. The controller can , simultaneous operations, or by using the QuadPort's built in mailboxes. Since the first two schemes are , Designing with Cypress QuadPortTM (CY7C0430BV CY7C0430BV) Backplane Switch Introduction The QuadPortTM is , while reducing the complexity and cost of design. This application note will explore the QuadPort and ... | Original |
6 pages, |
ternary content addressable memory CY7C0430BV CY7C0430BV abstract |
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| Abstract: BCM5424 BCM5424 PRODUCT Brief ® QUAD-PORT GIGABIT COPPER TRANSCEIVER WITH RGMII AND RTBI INTERFACE B C M 5 4 2 4 S U M M A R Y F E AT U R E S O F B E N E F I T S Four fully integrated · 1000BASE-T 1000BASE-T Gigabit 10BASE-T/100BASE-TX/ 10BASE-T/100BASE-TX/ Ethernet transceivers RGMII and RTBI interface options · Fully compliant with IEEE 802.3, 802.3u, and 802.3ab · standards · 0.13 um CMOS - low power and cost · Low power Low power quad-port integration enables single-row, · high port density ... | Original |
1 pages, |
BCM5424 RGMII constraints rgmii specification ieee rgmii specification BCM5424 abstract |
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| Abstract: ORCA Series 4 Quad-Port Embedded Block RAM April 2002 Technical Note TN1016 TN1016 Introduction , delivers several configurable blocks of memory based embedded IP. These blocks include quad-port RAM , provides the details required to use the ORCA Series 4 EBR as a true quad-port memory. ORCA Series 4 EBR Quad-Port RAM Features · Quad port EBR basic configuration is 512 x 18 providing 9 kbits of , configurable as a 512 x 18 quad-port RAM. Additional embedded logic exists to allow two EBR blocks to be ... | Original |
25 pages, |
AR17 datasheet AW12 AW16 d114 transistor Q014 Q117 transistor d115 RAM1024 AW14 AR03- q113 AR17 AR-17 TN1016 TN1016 abstract |
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| Abstract | Saved from | Date Saved | File Size | Type | Download |
| Over 1.1 million files (1986-2013): html articles, reference designs, gerber files, chemical content, spice models, programs, code, pricing, images, circuits, parametric data, RoHS data, cross references, pcns, military data, and more. Please note that due to their age, these files do not always format correctly in modern browsers. Disclaimer. |
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| MAX3752/MAX3753 MAX3752/MAX3753 MAX3752/MAX3753 MAX3752/MAX3753 QuickView Data Sheet MAX3752/MAX3753 MAX3752/MAX3753 MAX3752/MAX3753 MAX3752/MAX3753 2.125Gbps/1.063Gbps, 3.3V Quad-Port Bypass with Repeater QuickView Data Sheet: CONTAINS KEY INFORMATION FROM THE DATA SHEET FRONT PAGE. For complete information, in -MAIL as a PDF attachment. General Description The MAX3752/MAX3753 MAX3752/MAX3753 MAX3752/MAX3753 MAX3752/MAX3753 quad-port bypass ICs are quad-port bypass circuit allows connection of up to four Fibre Channel L-Ports, which can each be www.datasheetarchive.com/files/maxim/0010/quick014.htm |
Maxim | 04/04/2001 | 6.48 Kb | HTM | quick014.htm |
| . Trademarks Email: webmaster@idt.com quad_port,8_bit_UTOPIA_2, PHY,25 www.datasheetarchive.com/files/idt/docs/rp0000a/rp00a2a.htm |
IDT | 06/10/2000 | 19.88 Kb | HTM | rp00a2a.htm |
| ////////////////////////////////////////////////////////////////////////////// // // Xilinx, Inc. 2002 www.xilinx.com // // XAPP 228 - Quad port RAM in Virtex devices // ////////////////////////////////////////////////////////////////////////////// // // File name : top_v2.v // // Description : Example top-level for quad-port memory in VirtexII // // Date - revision : 09/17/2002 - v 1.0 // // Author : NJS // // Contact : e-mail hotline file to instaniate a quad-port memory in a VirtexE // `timescale 1 ps / 1ps module top_v2 www.datasheetarchive.com/download/2461446-995937ZC/xapp228.zip (top_v2.v) |
Xilinx | 25/09/2002 | 29.02 Kb | ZIP | xapp228.zip |
| ////////////////////////////////////////////////////////////////////////////// // // Xilinx, Inc. 2002 www.xilinx.com // // XAPP 228 - Quad port RAM in Virtex devices // ////////////////////////////////////////////////////////////////////////////// // // File name : top_ve.v // // Description : Example top-level for quad-port memory in VirtexE // // Date - revision : 09/17/2002 - v 1.0 // // Author : NJS // // Contact : e-mail hotline file to instaniate a quad-port memory in a VirtexE // `timescale 1 ps / 1ps module top www.datasheetarchive.com/download/2461446-995937ZC/xapp228.zip (top_ve.v) |
Xilinx | 25/09/2002 | 29.02 Kb | ZIP | xapp228.zip |
| BL, POSIC, QuadPort, Quantum38K, RoboClock+, RoboClock II, Spread Aware, SST, TetraHub,Ultra37000, Ultra www.datasheetarchive.com/files/cypress/readme.txt |
Cypress | 29/07/2002 | 2.7 Kb | TXT | readme.txt |
| DALLAS (June 2, 1997) - Texas Instruments (TI) announces it is developing a 3.3V, quad-port, single www.datasheetarchive.com/files/texas-instruments/data/sc/docs/news/1997/97023.htm |
Texas Instruments | 08/02/1999 | 7.39 Kb | HTM | 97023.htm |
| - - - Xilinx, Inc. 2002 www.xilinx.com - - XAPP 228 - Quad port RAM in Virtex devices - - - - File name : top_ve.vhd - - Description : Example top-level for quad-port memory in VirtexE - - Date - revision : 09/17/2002 - v 1.0 - - Author : NJS - - Contact : e - - - Top level file to instaniate a quad-port memory in a VirtexE - library IEEE; use IEEE www.datasheetarchive.com/download/2461446-995937ZC/xapp228.zip (top_ve.vhd) |
Xilinx | 25/09/2002 | 29.02 Kb | ZIP | xapp228.zip |
| developing a 3.3V, quad-port, single-chip physical layer interface (PHY) device that can be used in Ethernet www.datasheetarchive.com/files/texas-instruments/data/www.ti.com/sc/docs/news/1997/97023.htm |
Texas Instruments | 18/01/2000 | 11.43 Kb | HTM | 97023.htm |
| developing a 3.3V, quad-port, single-chip physical layer interface (PHY) device that can be used in Ethernet www.datasheetarchive.com/files/texas-instruments/data/wwwti~1.com/sc/docs/news/1997/97023.htm |
Texas Instruments | 17/01/2000 | 11.43 Kb | HTM | 97023.htm |
| - - - Xilinx, Inc. 2002 www.xilinx.com - - XAPP 228 - Quad port RAM in Virtex devices - - - - File name : top_v2.vhd - - Description : Example top-level for quad-port memory in VirtexII - - Date - revision : 09/17/2002 - v 1.0 - - Author : NJS - - Contact file to instaniate a quad-port memory in a VirtexII - library IEEE; use IEEE.std_logic_1164.all www.datasheetarchive.com/download/2461446-995937ZC/xapp228.zip (top_v2.vhd) |
Xilinx | 25/09/2002 | 29.02 Kb | ZIP | xapp228.zip |