PCK953 |
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NXP Semiconductors
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Memory interfaces; Support logic for memory modules and other memory subsystems |
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PCK953 |
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Philips Semiconductors
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PCK953 50-125 MHz PECL input-9 CMOS output 3.3 V PLL clock driver |
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PCK953B |
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Philips Semiconductors
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50-125 MHz PECL input/9 CMOS output 3.3 V PLL clock driver |
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PCK953BD |
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NXP Semiconductors
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20 MHz to 125 MHz PECL input, 9 CMOS output, 3.3 V PLL clock driver |
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PCK953BD |
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Philips Semiconductors
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50-125 MHz PECL input/9 CMOS output 3.3 V PLL clock driver |
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PCK953BD |
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Philips Semiconductors
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20-125 MHz PECL Input/9 CMOS Output 3.3 V PLL Clock Driver |
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PCK953BD/01,118 |
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NXP Semiconductors
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PCK953BD/01 - 20 MHz to 125 MHz PECL input, 9 CMOS output, 3.3 V PLL clock driver, SOT358-1 Package, Standard Marking, Reel Pack, SMD, 13" |
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PCK953BD/01,128 |
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NXP Semiconductors
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PCK953BD/01 - 20 MHz to 125 MHz PECL input, 9 CMOS output, 3.3 V PLL clock driver, SOT358-1 Package, Standard Marking, Reel Pack, SMD, 13", Turned |
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PCK953BD/01,151 |
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NXP Semiconductors
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PCK953BD/01 - 20 MHz to 125 MHz PECL input, 9 CMOS output, 3.3 V PLL clock driver, SOT358-1 Package, Standard Marking, Tray Pack, Bakeable, Single |
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PCK953BD/01,157 |
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NXP Semiconductors
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PCK953BD/01 - 20 MHz to 125 MHz PECL input, 9 CMOS output, 3.3 V PLL clock driver, SOT358-1 Package, Standard Marking, Tray Pack, Bakeable, Multiple |
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PCK953BD,118 |
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NXP Semiconductors
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20-125 MHz PECL input/ 9 CMOS output 3.3 V PLL clock driver - Application: High-performance clock tree design, NG-DIMMs ; Inputs: 1 x Differential PECL ; Jitter (pk-pk): 55 ps; Operating temperature: 0~+70 Cel; Other features: output disable, bypass, 1:18 effective fan-out ; Output frequency range: 50~125 MHz; Output skew: 100 ps; Outputs: 9 x LVCMOS ; Phase offset: 60 ps; Programmability: Pin select ; Supply voltage: 3.3 V; Package: SOT358-1 (LQFP32); Container: Reel Pack, SMD, 13" |
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PCK953BD,128 |
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NXP Semiconductors
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20-125 MHz PECL input/ 9 CMOS output 3.3 V PLL clock driver - Application: High-performance clock tree design, NG-DIMMs ; Inputs: 1 x Differential PECL ; Jitter (pk-pk): 55 ps; Operating temperature: 0~+70 Cel; Other features: output disable, bypass, 1:18 effective fan-out ; Output frequency range: 50~125 MHz; Output skew: 100 ps; Outputs: 9 x LVCMOS ; Phase offset: 60 ps; Programmability: Pin select ; Supply voltage: 3.3 V; Package: SOT358-1 (LQFP32); Container: Reel Pack, SMD, 13", Turned |
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PCK953BD,151 |
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NXP Semiconductors
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20-125 MHz PECL input/ 9 CMOS output 3.3 V PLL clock driver - Application: High-performance clock tree design, NG-DIMMs ; Inputs: 1 x Differential PECL ; Jitter (pk-pk): 55 ps; Operating temperature: 0~+70 Cel; Other features: output disable, bypass, 1:18 effective fan-out ; Output frequency range: 50~125 MHz; Output skew: 100 ps; Outputs: 9 x LVCMOS ; Phase offset: 60 ps; Programmability: Pin select ; Supply voltage: 3.3 V; Package: SOT358-1 (LQFP32); Container: Tray Pack, Bakeable, Single |
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PCK953BD,157 |
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NXP Semiconductors
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20-125 MHz PECL input/ 9 CMOS output 3.3 V PLL clock driver - Application: High-performance clock tree design, NG-DIMMs ; Inputs: 1 x Differential PECL ; Jitter (pk-pk): 55 ps; Operating temperature: 0~+70 Cel; Other features: output disable, bypass, 1:18 effective fan-out ; Output frequency range: 50~125 MHz; Output skew: 100 ps; Outputs: 9 x LVCMOS ; Phase offset: 60 ps; Programmability: Pin select ; Supply voltage: 3.3 V; Package: SOT358-1 (LQFP32); Container: Tray Pack, Bakeable, Multiple |
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PCK953BD/G |
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NXP Semiconductors
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20 MHz to 125 MHz PECL input, 9 CMOS output, 3.3 V PLL clock driver |
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PCK953BD/G,128 |
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NXP Semiconductors
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20 MHz to 125 MHz PECL input, 9 CMOS output, 3.3 V PLL clock driver; Package: SOT358-1 (LQFP32); Container: Reel Pack, SMD, 13", Turned |
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PCK953BD/G-F |
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NXP Semiconductors
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20-125 MHz PECL input/ 9 CMOS output 3.3 V PLL clock driver - Application: High-performance clock tree design, NG-DIMMs ; Inputs: 1 x Differential PECL ; Jitter (pk-pk): 55 ps; Operating temperature: 0~+70 Cel; Other features: output disable, bypass, 1:18 effective fan-out ; Output frequency range: 50~125 MHz; Output skew: 100 ps; Outputs: 9 x LVCMOS ; Phase offset: 60 ps; Programmability: Pin select ; Supply voltage: 3.3 V |
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PCK953BD-T |
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NXP Semiconductors
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20-125 MHz PECL input/ 9 CMOS output 3.3 V PLL clock driver - Application: High-performance clock tree design, NG-DIMMs ; Inputs: 1 x Differential PECL ; Jitter (pk-pk): 55 ps; Operating temperature: 0~+70 Cel; Other features: output disable, bypass, 1:18 effective fan-out ; Output frequency range: 50~125 MHz; Output skew: 100 ps; Outputs: 9 x LVCMOS ; Phase offset: 60 ps; Programmability: Pin select ; Supply voltage: 3.3 V |
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PCK953BD-T |
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Philips Semiconductors
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20-125 MHz PECL input / 9 CMOS output 3.3 V PLL clock driver |
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