NEW DATABASE - 350 MILLION DATASHEETS FROM 8500 MANUFACTURERS
NEW DATABASE - 350 MILLION DATASHEETS FROM 8500 MANUFACTURERS
| Catalog Datasheet Results | Type | Document Tags |
| Abstract: PR63A PT57A ;pb38a lrc_sq_vccrx2 pb64a;pb76b;pb65a 7 , pb76b;pb65a;pb71a;pb71b ; pb63b;pb59b ulc_sq_vccrx3 , llc_sq_vccrx3 pb34a pb37a;pb34b lrc_sq_vccrx3 pb94b;pb74a;pb80a;pb80b pb76b;pb69a;pb60a;pb73a ... | Original |
9 pages, |
PT98A PR62A PT49B pt95a PT65A FPBGA900 2V PB60B PL34A PR41B pr64a ECP2M PR14B PR57A PL34B PR34A TN1159 TN1159 abstract |
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| Abstract: PB59B PB59B PB60A PB60B PB60B PB61A PB61A PB61B PB61B PB62A PB62A PB62B PB62B PB63A PB63A PB63B PB63B PB64A PB64A PB64B PB64B PB65A PB65A PB65B PB65B PB66A PB66A PB66B PB66B ... | Original |
6 pages, |
PR65A CY7C68013A-100AXC 47uf 3528 100uH PB07A PL46A PL05 PL04A PB09B PT46A PR09A PR30A Mictor 3528 pins 20 PL08A datasheet abstract |
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| Abstract: LatticeECP2/M Family Data Sheet DS1006 DS1006 Version 03.9, January 2012 LatticeECP2/M Family Data Sheet Introduction January 2012 Data Sheet DS1006 DS1006 Features High Logic Density for System Integration · 6K to 95K LUTs · 90 to 583 I/Os Pre-Engineered Source Synchronous I/O · DDR registers in I/O cells · Dedicated gearing logic · Source synchronous standards support SPI4.2, SFI4 (DDR Mode), XGMII High Speed ADC/DAC devices · Dedicated DDR and DDR2 memory support DDR1: 400 (200MHz) / ... | Original |
389 pages, |
16x4 sram DS1006 DS1006 abstract |
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| Abstract: LatticeECP2/M Family Data Sheet DS1006 DS1006 Version 03.6, March 2010 LatticeECP2/M Family Data Sheet Introduction June 2008 Data Sheet DS1006 DS1006 Pre-Engineered Source Synchronous I/O Features · DDR registers in I/O cells · Dedicated gearing logic · Source synchronous standards support SPI4.2, SFI4 (DDR Mode), XGMII High Speed ADC/DAC devices · Dedicated DDR and DDR2 memory support DDR1: 400 (200MHz) / DDR2: 533 (266MHz) · Dedicated DQS support High Logic Density for ... | Original |
393 pages, |
c 4161 DS1006 DS1006 abstract |
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| Abstract: LatticeECP2/M Family Data Sheet DS1006 DS1006 Version 03.3, August 2008 LatticeECP2/M Family Data Sheet Introduction June 2008 Data Sheet DS1006 DS1006 Pre-Engineered Source Synchronous I/O Features · DDR registers in I/O cells · Dedicated gearing logic · Source synchronous standards support SPI4.2, SFI4 (DDR Mode), XGMII High Speed ADC/DAC devices · Dedicated DDR and DDR2 memory support DDR1: 400 (200MHz) / DDR2: 533 (266MHz) · Dedicated DQS support High Logic Density for ... | Original |
386 pages, |
socket 1156 pinout pr77a PR68A CEI 23-50 socket am3 socket pinout CEI 23-50 226 35K capacitor datasheet L33 thermal fuse LFE2M50 marking l33 LFE2M20SE-5FN484C M33 thermal fuse PB58 DS1006 DS1006 DS1006 abstract |
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| Abstract: LatticeECP2/M Family Data Sheet DS1006 DS1006 Version 03.7, July 2010 LatticeECP2/M Family Data Sheet Introduction July 2010 Data Sheet DS1006 DS1006 Pre-Engineered Source Synchronous I/O Features · DDR registers in I/O cells · Dedicated gearing logic · Source synchronous standards support SPI4.2, SFI4 (DDR Mode), XGMII High Speed ADC/DAC devices · Dedicated DDR and DDR2 memory support DDR1: 400 (200MHz) / DDR2: 533 (266MHz) · Dedicated DQS support High Logic Density for S ... | Original |
393 pages, |
PR68A LFE2M20E-5FN484i LFE2M50E-5FN484C LFE2M50e lfe2m35se LFE2M50 DS1006 DS1006 abstract |
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| Abstract: LatticeECP2/M Family Data Sheet DS1006 DS1006 Version 03.5, November 2009 LatticeECP2/M Family Data Sheet Introduction June 2008 Data Sheet DS1006 DS1006 Features Pre-Engineered Source Synchronous I/O · DDR registers in I/O cells · Dedicated gearing logic · Source synchronous standards support SPI4.2, SFI4 (DDR Mode), XGMII High Speed ADC/DAC devices · Dedicated DDR and DDR2 memory support DDR1: 400 (200MHz) / DDR2: 533 (266MHz) · Dedicated DQS support High Logic Density for S ... | Original |
389 pages, |
sgmii switch DS1006 DS1006 abstract |
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| Abstract: LatticeECP2/M Family Data Sheet DS1006 DS1006 Version 03.8, April 2011 LatticeECP2/M Family Data Sheet Introduction July 2010 Data Sheet DS1006 DS1006 Pre-Engineered Source Synchronous I/O Features · DDR registers in I/O cells · Dedicated gearing logic · Source synchronous standards support SPI4.2, SFI4 (DDR Mode), XGMII High Speed ADC/DAC devices · Dedicated DDR and DDR2 memory support DDR1: 400 (200MHz) / DDR2: 533 (266MHz) · Dedicated DQS support High Logic Density for ... | Original |
389 pages, |
DS1006 DS1006 abstract |
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| Abstract: LatticeECP2/M Family Data Sheet DS1006 DS1006 Version 03.0, February 2008 LatticeECP2/M Family Data Sheet Introduction August 2007 Data Sheet DS1006 DS1006 Pre-Engineered Source Synchronous I/O Features · DDR registers in I/O cells · Dedicated gearing logic · Source synchronous standards support SPI4.2, SFI4 (DDR Mode), XGMII High Speed ADC/DAC devices · Dedicated DDR and DDR2 memory support DDR1: 400 (200MHz) / DDR2: 533 (266MHz) · Dedicated DQS support High Logic Density ... | Original |
385 pages, |
DS1006 DS1006 abstract |
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| Abstract: DVB-C ks PT81A LatticeECP2M-50 1152-fpBGA IDT DATECODE MARKINGS LatticeECP2/M Family Handbook HB1003 HB1003 Version 04.3, March 2009 LatticeECP2/M Family Handbook Table of Contents March 2009 Section I. LatticeECP2/M Family Data Sheet Introduction Features . 1-1 Introduction . ... | Original |
732 pages, |
VHDL code for ADC and DAC SPI with FPGA CHN 816 cml T9 LED diode din 4147 DIODE sm dda st r12 KS 21604 L21 PICMG 2.0 PI top 245p PB51A ocs ctc application LVCMOS25 LFE2M20E-5FN484C HB1003 HB1003 abstract |
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| Abstract: LatticeSC PCI Express x4 Evaluation Board User's Guide September 2009 Revision: EB31_01.2 LatticeSC PCI Express x4 Evaluation Board User's Guide Lattice Semiconductor Introduction This user's guide describes the LatticeSC PCI Express x4 Evaluation Board featuring the LatticeSC LFSCM3GA80EP1-6FC1152C LFSCM3GA80EP1-6FC1152C FPGA device. This stand-alone evaluation PCB provides a functional platform for development and rapid prototyping of applications that require high-speed SERDES interfaces an ... | Original |
25 pages, |
PR55D PR68A Y5 sot23 CY2304 C458 PR50D PR85A C497 PR80C 47H16M16BG fairchild aa11 PR81A 22HP037 PL80B PR78A datasheet abstract |
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