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MIPS32 application

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Abstract: Logic offers FlexCore MIPS32 4KEc processor cores available on both our GflxTM 0.11 micron (drawn) and , customer needs. · Up to 200 MHz performance on LSI By choosing a FlexCore MIPS32 4KEc processor core , has decided on the optimal processor configuration for a particular application, a design simulation , dissipation as low as 0.35 ® TM TM The MIPS32 4KEc is a 32-bit, five-stage pipeline, Harvard cache , MIPS32 4KEc core includes a complete memory subsystem comprising separate instruction and data caches ... LSI Logic
Original
datasheet

2 pages,
25.14 Kb

MIPS64 MIPS32 memory interface MIPS32 instruction set MIPS32 application Mips MIPS32 4KEC MIPS32 cache MIPS32TM TEXT
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Abstract: 1. MIPS-Based PLD PLL UART SRAM SRAM SRAM MIPS32 4Kc DPRAM DPRAM DPRAM , MIPS-Based Embedded Processor Device Overview Data Sheet 2. MIPS-Based SDRAM MIPS32 4Kc + + MMU , MIPS-based 3 AHB PLD MIPS-based MIPS-based 0.18 um CMOS MIPS32 4Kc ASIC 32 MIPS RISC MIPS , MIPS-Based Embedded Processor Device Overview Data Sheet MIPS-Based 3 MIPS32 4Kc 3. MIPS32 4Kc , Translation Lookaside Buffer TLB 16 KB MIPS32 4Kc MIPS32 5 Harvard 1 4 I I I I ... Altera
Original
datasheet

16 pages,
820.42 Kb

R4000 R3000 MIPS32 application EPXM10 4kc mips MIPS32 TEXT
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Abstract: . · The BCM1112 BCM1112 Integrates: · 150-MHz MIPS32 CPU (165 DMIPS) with 8K I-cache and 4K D-cache · , 802.1Q VLAN support allows for segmenting physical networks into multiple logical networks · MIPS32 CPU not burdened by data packet processing, leaving more cycles for application program · Enables , network, preventing any restriction on number of hops 150-MHz MIPS32 CPU and 108 MHz DSP Support · · , Watchdog Timer MIPS32 CPU + 8K I-Cache + 4K D-Cache Timers Analog Processor Module CODEC ... Broadcom
Original
datasheet

2 pages,
87.8 Kb

VOCODERS voip MIPS32 application MIPS32 cable gateway reference design BCM1112 BCM1101 "Power over Ethernet" voip TEXT
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Abstract: reducing the need for external filtering. High-performance MIPS32 CPU supports advanced application , High-performance MIPS32 ® CPU with MMU and TLB support Hardware ATM SAR for enhanced ATM VC management, traffic , design complexity · · · · · · · Complete protocol and application software support , SLIC/SLAC I-Cache MIPS32 ADSL2+ AFE BCM6301 BCM6301 LD ADSL2+ Xcvr D-Cache ATM SAR USB , with a high-performance MIPS32 CPU, two 10/100-Mbps Ethernet interfaces, USB (host/device) transceiver ... Broadcom
Original
datasheet

2 pages,
176.3 Kb

afe 1000 broadcom adsl adsl2 modem diagram Broadcom BCM6505 Broadcom usb wifi voip ethernet single chip modem ADSL2 broadcom BCM6348 diagram of adsl modem bcm6348-based ethernet chipsets MIPS32 wifi transceiver BCM6348 BCM6348 Broadcom 6348 BCM6348 BCM6348 bcm6301 line driver BCM6348 BCM6348 rj11 to usb connection diagram BCM6348 BCM6348 BCM6505 BCM6348 BCM6348 BCM6348 BCM6348 BCM6348 BCM6301 Broadcom BCM6301 TEXT
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Abstract: support for Annex A, B C, M, and L · Highly optimized MIPS32® CPU with MMU and TLB support · · · , BCM6314 BCM6314 VDSL2 Transceiver DCache UTOPIA Bus VIPERTM (MIPS32) Core DDR Controller DDRAM , BCM6358 BCM6358 combines an ADSL2+ transceiver and AFE with a highperformance VIPER MIPS32 CPU, hardware ATM SAR , . Powered by the VIPER MIPS32 CPU and supplied software, the ADSL2+ modem performs wire speed bridging and routing between the WAN and the various LAN interfaces, and supports custom application development with ... Broadcom
Original
datasheet

2 pages,
200.7 Kb

Broadcom vdsl2 BCM6345 BCM6335 BCM6348 BCM5325 MIPS32 Viper cores VDSL2 Modem circuit diagram broadcom bcm43xx connection diagram BCM6358 viper mips32 broadcom 6358 rj11 to usb connection diagram ADSL2 Modem circuit diagram BCM6358 BCM6358 BCM6314 BCM6358 BCM6358 BCM6338 BCM6358 BCM6358 BCM43xx BCM6358 BCM6358 Broadcom BCM6301 BCM6358 BCM6358 Broadcom BCM6358 BCM6358 BCM6358 bcm6301 BCM6358 BCM6358 BCM6358 BCM6358 BCM6358 TEXT
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Abstract: 150-MHz MIPS32® CPU (165 DMIPS) with 8K I-cache and 4K D-cache. · Superscalar 108-MHz ZSP DSP with , segmenting physical networks into multiple logical networks. · MIPS32 CPU not burdened by data packet processing, leaving more cycles for application program. · Enables wire-speed non-blocking operation. · , restriction on number of hops. · 150-MHz MIPS32 CPU and 108-MHz DSP Support. · VxWorks® operating system , ] External Interrupt Controller IPB Bridge Peripheral Bus Watchdog Timer MIPS32 CPU + 8K ... Broadcom
Original
datasheet

2 pages,
143.7 Kb

VOCODERS voip MIPS32 BCM91101 BCM1101 "Power over Ethernet" TEXT
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Abstract: €¢ 150 MHz MIPS32 CPU (165 DMIPS) with 8K I-cache and 4K D-cache • Superscalar 108 MHz ZSP DSP with , VLAN support allows for segmenting physical networks into multiple logical networks • MIPS32 CPU not burdened by data packet processing, leaving more cycles for application program • Enables , €¢ Segments network, preventing any restriction on number of hops • 150 MHz MIPS32 CPU and 108 MHz DSP , Controller [or 18 GPIOs] IPB Bridge Peripheral Bus Watchdog Timer MIPS32 CPU + 8K I-Cache + ... Broadcom
Original
datasheet

2 pages,
108.42 Kb

BCM1101 TEXT
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Abstract: Support feature enhanced Voice over IP enterprise phones · The BCM1101 BCM1101 Integrates: · 150 MHz MIPS32 , allows for segmenting physical networks into multiple logical networks · MIPS32 CPU not burdened by data packet processing, leaving more cycles for application program · Enables wire-speed non-blocking , restriction on number of hops · 150 MHz MIPS32 CPU and 108 MHz DSP Support · VxWorks/WinCE Operating , MIPS32 CPU + 8K I-Cache + 4K D-Cache Timers ZSP JTAG High Speed Serial Port 2 48 KB of ... Broadcom
Original
datasheet

2 pages,
94.42 Kb

VOCODERS voip MIPS32 g.723.1 codec chip BCM91101SP BCM91101 BCM1101 "Power over Ethernet" TEXT
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Abstract: Application Specific Extensions and is based on the proven MIPS32® 74KTM 74KTM CPU. Multi-CPU coherence is managed , MIPS Verified MIPS32® 1074KTM 1074KTM Coherent Processing System Datasheet TM June 03, 2011 The MIPS32® 1074KTM 1074KTM Coherent Processing System (CPS) from MIPS Technologies is a high-performance coherent multiprocessor cluster of one to six MIPS32® 1074KTM 1074KTM CPUs and an optional coherent I/O port. The , Coherent I/O Devices Fixed Optional OCP2.1 Main Memory Non-coherent I/O MIPS32® 1074KTM 1074KTM ... Original
datasheet

32 pages,
173.01 Kb

MIPS 24k processor MIPS 24KC 64 MB l2 cache controller mips ocp mips 34kf MIPS M14K mips32 1004k 1074KTM 1074K MIPS32 74Kc MIPS16E mips 74KC mips32 24k MIPS 1074K MIPS32 1074KTM 74KTM MIPS32 1074KTM MIPS 24KC MIPS32 1074KTM MIPS32 MIPS32 1074KTM TEXT
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Abstract: minimizes latency · MIPS32 CPU not burdened by data packet processing, leaving more cycles for application , Ethernet residential gateway applications S U M M A R Y · 100 MHz MIPS32 CPU support · H.323, H.248/Megaco, SIP, MGCP V1.0 and PacketCable NCS · Application program · 140 MHz DSP support · In IP , Integrates: · 100-MHz MIPS32 CPU (110 DMIPS) with 8K I-cache and 4K D-cache · Superscalar 140 MHz ZSP , Peripheral Bus Watchdog Timer MIPS32 CPU + 8K I-Cache + 4K D-Cache Timers High Speed Serial ... Broadcom
Original
datasheet

2 pages,
33.57 Kb

VOCODERS voip IP PHONE BCM91101 BCM1101 MIPS32 7231 broadcom TEXT
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Archived Files

Abstract Saved from Date Saved File Size Type Download
Powerful MIPS32 and TriMedia processor cores work together with on-chip units to efficiently handle media processing functions in hardware and software. The MIPS32 PR4450 PR4450 core controls and balances all on-chip , and MHP/OCAP applications. Add an H.32x codec for videoconferencing For PNX8550 PNX8550 application MIPS32 CPU and dual 240-MHz TriMedia TM media processing cores Descrambles and PID filters multiple
/datasheets/files/philips/pip/pip_18.html
Philips 06/06/2005 6.48 Kb HTML pip_18.html
demanding system level integration (SLI) business, it must have at its disposal advanced application methodology and architecture that allows both processor-based ASICs and Application Specific Standard Products tools and application software offer complete support for all design needs. In addition to offering new MIPS32™ and MIPS64 MIPS64™ instruction set architectures. TImeBuilder's comprehensive processor Corporation MIPS is a registered trademark of MIPS Technologies Incorporated MIPS32 and MIPS64 MIPS64 are
/datasheets/files/texas-instruments/data/www.ti.com/sc/docs/news/1999/99041b.htm
Texas Instruments 18/01/2000 17.06 Kb HTM 99041b.htm
demanding system level integration (SLI) business, it must have at its disposal advanced application methodology and architecture that allows both processor-based ASICs and Application Specific Standard Products tools and application software offer complete support for all design needs. In addition to offering new MIPS32™ and MIPS64 MIPS64™ instruction set architectures. TImeBuilder's comprehensive processor Corporation MIPS is a registered trademark of MIPS Technologies Incorporated MIPS32 and MIPS64 MIPS64 are
/datasheets/files/texas-instruments/data/wwwti~1.com/sc/docs/news/1999/99041b.htm
Texas Instruments 17/01/2000 17.06 Kb HTM 99041b.htm
Memory Controller, MIPS32 ISA, In-circuit Emulator I/F Sample: Now Production: July , PCI Satellite Mode Application Note 130 KB 07/13/2000
/datasheets/files/idt/docs/rp00006/rp006de.htm
IDT 06/10/2000 26.12 Kb HTM rp006de.htm
, MIPS32 ISA, In-circuit Emulator I/F Sample: Now Production: July Related Documents AN-08 AN-08, PCI Satellite Mode Application Note 07/13/2000 TN-45 TN-45, Software Configuration of
/datasheets/files/idt/docs/rp00014/rp014a8.htm
IDT 06/10/2000 21.52 Kb HTM rp014a8.htm
No abstract text available
/download/42652172-393173ZC/mplabalc30v2_05.tgz
Microchip 09/11/2006 11568.47 Kb TGZ mplabalc30v2_05.tgz
No abstract text available
/download/49104857-995987ZC/xapp542.zip ()
Xilinx 11/11/2004 9180.01 Kb ZIP xapp542.zip
No abstract text available
/download/79262054-393174ZC/mplabc30v2_05.tgz
Microchip 09/11/2006 27045.95 Kb TGZ mplabc30v2_05.tgz
No abstract text available
/download/46713865-484035ZC/gnu_tsc.bz2
Motorola 16/02/2000 22032.79 Kb BZ2 gnu_tsc.bz2