NEW DATABASE - 350 MILLION DATASHEETS FROM 8500 MANUFACTURERS
NEW DATABASE - 350 MILLION DATASHEETS FROM 8500 MANUFACTURERS
| Catalog Datasheet Results | Type | Document Tags |
| Abstract: based upon the MIPS32 architecture and can run unmodified MIPS32 application code. · Well supported , cores, a broad range of peripherals and application specific IP, reference designs, platforms, rapid , assume any responsibility or liability arising out of the application or use of any product or service ... | Original |
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MIPS32 application MIPS32 cache architecture for MIPS 1 MIPS64 MIPS64TM MIPS64TM abstract |
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| Abstract: Software vendor network Nexperia PNX8950 PNX8950 The highly integrated PNX8950 PNX8950 combines a MIPS32 application , supply key software components (middleware, application software) giving manufacturers a fast route to , product names are trademarks or registered trademarks of their respective owners. Linux Application , I/O Microsoft Windows CE 5.0 Application Middleware DirectShow DirectDraw Direct Input ... | Original |
4 pages, |
ide sata hard disk philips NXP video evaluation board kit mips nxp flash kit with power supply DVB-T Schematic Philips NXP can tuner nxp AES DSP application 80206 MIPS32 application MULTI2 PNX8*50 STB810 PNX8950 STB810 abstract |
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| Abstract: processing, the PNX8336 PNX8336 combines a MIPS32 application processor with a dedicated audio processor and , powerful 320MHz MIPS application processor  video decoding: H264/VC-1 H264/VC-1 1080p @ 24 fps: MPEG4 AVC , , DVB and ATSC middleware stacks, web browsers, VoIP and much more. APPLICATION MIDDLEWARE , Software architecture: Linux APPLICATION MIDDLEWARE DVB DIRECT SOUND DIRECT SHOW AV ... | Original |
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hdmi to s-video ic Linux Devices mips nxp MIPS32 nxp 555 tda9983 TDA8024 h264 hd DVR soc NXP Interface and Connectivity NXP Interface and Connectivity stb236 MIPS32 application STB222 abstract on hdmi STB236 STB236 STB236 abstract |
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| Abstract: processing, the highly integrated PNX8932 PNX8932 SoC combines MIPS32 application processor with dedicated audio , 64MB RAM (application dependant) Ã' omplete, easy-to-use hardware development platform C with , both platforms. APPLICATION MIDDLEWARE FRONTEND DEMUX LINUX DVB DVR ALSA CA PCM , multimedia functions through DirectShowTM. APPLICATION MIDDLEWARE DVB DIRECT SOUND DIRECT SHOW ... | Original |
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MIPS32 nxp 555 NXP Interface and Connectivity mips nxp linux PNX8x32 ic usb av hdmi to s-video ic TDA8024 tda9983 linux os h264 wifi to i2c schematic 80206 H264/ STB222 H264/ abstract |
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| Abstract: PNX8935 PNX8935 SoC combines MIPS32 application processor with dedicated audio processor and powerful , APPLICATION MIDDLEWARE FRONTEND DEMUX LINUX DVB DVR ALSA CA PCM LINUX 2.6 DIRECT FB , I/O bra869 Software architecture: Linux APPLICATION MIDDLEWARE DVB DIRECT SOUND ... | Original |
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wifi to i2c schematic h264 Linux mips nxp MIPS32 MPEG4 schematic nxp 555 80206 TDA9983 TDA8024 NXP PNX8935 HD MIPS32 application Linux Devices PNX8x35 STB225 STB225 STB225 abstract |
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| Abstract: Logic offers FlexCore MIPS32 4KEc processor cores available on both our GflxTM 0.11 micron (drawn) and , customer needs. · Up to 200 MHz performance on LSI By choosing a FlexCore MIPS32 4KEc processor core , has decided on the optimal processor configuration for a particular application, a design simulation , dissipation as low as 0.35 ® TM TM The MIPS32 4KEc is a 32-bit, five-stage pipeline, Harvard cache , MIPS32 4KEc core includes a complete memory subsystem comprising separate instruction and data caches ... | Original |
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MIPS64 MIPS32 memory interface MIPS32 application MIPS32 Mips MIPS32 cache MIPS32TM G12TM MIPS32TM abstract |
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| Abstract: DOCSIS/EuroDOCSIS 1.0/1.1 MAC · High-performance, 140-MHz MIPS-32 CPU · Advanced QAMLink, downstream , DOCSIS/EuroDOCSIS 1.0/1.1 MAC is compatible with existing Cable Modem application code, resulting in minimum time to market. 140-MHz MIPS-32 CPU provides 66% improvement in packet throughput over prior , existing MIPS32 development tools, improving software development and testing. High-Performance ... | Original |
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BCM3345 MIPS32 qam transceiver rf singlechip ejtag demodulator docsis 4 QAM modulator demodulator modem 256 QAM modulator demodulator modem 8 QAM modulator demodulator modem BCM3345 abstract |
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| Abstract: reducing the need for external filtering. High-performance MIPS32 CPU supports advanced application , High-performance MIPS32 ® CPU with MMU and TLB support Hardware ATM SAR for enhanced ATM VC management, traffic , design complexity · · · · · · · Complete protocol and application software support , SLIC/SLAC I-Cache MIPS32 ADSL2+ AFE BCM6301 BCM6301 LD ADSL2+ Xcvr D-Cache ATM SAR USB , with a high-performance MIPS32 CPU, two 10/100-Mbps Ethernet interfaces, USB (host/device) transceiver ... | Original |
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AC97 MIPS32 G992.5 G992 Broadcom WIFI Broadcom usb wifi adsl2 modem diagram bcm6348-based modem ADSL2 Broadcom 6348 Broadcom BCM6301 BCM6505 BCM6348 BCM6301 BCM6348 abstract |
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| Abstract: PLL UART SRAM SRAM SRAM MIPS32 4Kc DPRAM DPRAM DPRAM JTAG EJTAG EPXM1 , Processor Device Overview Data Sheet 2. MIPS-Based SDRAM MIPS32 4Kc + + MMU ROM SDRAM , AHB PLD MIPS-based MIPS-based 0.18 um CMOS MIPS32 4Kc ASIC 32 MIPS RISC MIPS , MIPS-Based Embedded Processor Device Overview Data Sheet MIPS-Based 3 MIPS32 4Kc 3. MIPS32 4Kc , Translation Lookaside Buffer TLB 16 KB MIPS32 4Kc MIPS32 5 Harvard 1 4 I I I I ... | Original |
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R4000 R3000 MIPS32 EPXM10 datasheet abstract |
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| Abstract: Residential Gateway applications. · The BCM1100 BCM1100 Integrates: · 100 MHz MIPS32 CPU (110 DMIPS) with 4K , Ethernet Switch with 802.1p Support · Ensures QoS for voice packets and minimizes latency · MIPS32 CPU not burdened by data packet processing, leaving more cycles for application program · Enables , network, preventing any restriction on number of hops · 100 MHz MIPS32 CPU Supporting: · H.323, H.248/Megaco and SIP · Application program · 140 MHz DSP Supporting: · · · · · G.711, G.726, G.729A ... | Original |
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MIPS32 G.711 BCM1100 sip voip subwoofer 1000 watts amplifier BCM91100 BCM1100 abstract |
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| Abstract | Saved from | Date Saved | File Size | Type | Download |
| Over 1.1 million files (1986-2013): html articles, reference designs, gerber files, chemical content, spice models, programs, code, pricing, images, circuits, parametric data, RoHS data, cross references, pcns, military data, and more. Please note that due to their age, these files do not always format correctly in modern browsers. Disclaimer. |
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| Nexperia Home architecture enables support for basic and advanced TV applications and product configurations. Powerful MIPS32 and TriMedia processor cores work together with on-chip units to efficiently handle media processing functions in hardware and software. The MIPS32 PR4450 PR4450 PR4450 PR4450 core controls and balances . Features Multicore design includes a 266-MHz MIPS32 CPU and dual 240-MHz TriMedia TM media also enables support for double window applications such as picture-in- picture and side www.datasheetarchive.com/files/philips/pip/pip_18.html |
Philips | 06/06/2005 | 6.48 Kb | HTML | pip_18.html |
| ISA levels I through V, MIPS32, and MIPS64 MIPS64 MIPS64 MIPS64. For information about the @sc{mips} instruction set, see architecture options @item -mips1 @itemx -mips2 @itemx -mips3 @itemx -mips4 @itemx -mips5 @itemx -mips32 @itemx -mips32r2 @itemx -mips64 Generate code for a particular MIPS Instruction Set Architecture level } processors. @samp{-mips5}, @samp{-mips32}, @samp{-mips32r2}, and @samp{-mips64} correspond to generic @sc{MIPS V}, @sc{MIPS32}, @sc{MIPS32 Release 2}, and @sc{MIPS64 MIPS64 MIPS64 MIPS64} ISA processors, respectively. You can www.datasheetarchive.com/download/42652172-393173ZC/mplabalc30v2_05.tgz |
Microchip | 09/11/2006 | 11568.47 Kb | TGZ | mplabalc30v2_05.tgz |
| Controller, MIPS32 ISA, In-circuit Emulator I/F Sample: Now Production: July /22/2000 79RC32334 79RC32334 79RC32334 79RC32334 BSDL File Misc 04/24/2000 AN-08 AN-08 AN-08 AN-08, PCI Satellite Mode Application Note 07 www.datasheetarchive.com/files/idt/docs/rp00014/rp014a8.htm |
IDT | 06/10/2000 | 21.52 Kb | HTM | rp014a8.htm |
| configuration. In addition, TI is the first ASIC vendor with licenses for the 150MHz MIPS® 32-bit Jade, Jade Lite and 64-bit Opal cores, supporting the new MIPS32™ and MIPS64 MIPS64 MIPS64 MIPS64™ instruction set architectures Corporation MIPS is a registered trademark of MIPS Technologies Incorporated MIPS32 and MIPS64 MIPS64 MIPS64 MIPS64 are have at its disposal advanced application specific integrated circuit (ASIC) technology, a rich Application Specific Standard Products (ASSPs) to be designed, verified and tested in a matter of a few months www.datasheetarchive.com/files/texas-instruments/data/www.ti.com/sc/docs/news/1999/99041b.htm |
Texas Instruments | 18/01/2000 | 17.06 Kb | HTM | 99041b.htm |
| configuration. In addition, TI is the first ASIC vendor with licenses for the 150MHz MIPS® 32-bit Jade, Jade Lite and 64-bit Opal cores, supporting the new MIPS32™ and MIPS64 MIPS64 MIPS64 MIPS64™ instruction set architectures Corporation MIPS is a registered trademark of MIPS Technologies Incorporated MIPS32 and MIPS64 MIPS64 MIPS64 MIPS64 are have at its disposal advanced application specific integrated circuit (ASIC) technology, a rich Application Specific Standard Products (ASSPs) to be designed, verified and tested in a matter of a few months www.datasheetarchive.com/files/texas-instruments/data/wwwti~1.com/sc/docs/news/1999/99041b.htm |
Texas Instruments | 17/01/2000 | 17.06 Kb | HTM | 99041b.htm |
| 3.3V 10KB cache, PCI Bridge, 256MB 256MB 256MB 256MB SDRAM Memory Controller, MIPS32 ISA, In /24/2000 79RC32334 79RC32334 79RC32334 79RC32334_AN_15138.pdf AN-08 AN-08 AN-08 AN-08, PCI Satellite Mode Application Note www.datasheetarchive.com/files/idt/docs/rp00006/rp006de.htm |
IDT | 06/10/2000 | 26.12 Kb | HTM | rp006de.htm |
| ) 74-ns Instruction Cycle Time 148.5 MOPS, 27 MFLOPS, 13.5 MIPS 32-Bit High-Performance CPU 16 -purpose applications are greatly enhanced by the large address space, multiprocessor interface, internally and -interrupt structure. The TMS320C3x supports a wide variety of system applications from host processor to dedicated www.datasheetarchive.com/files/texas-instruments/data/html/sprs035a.htm |
Texas Instruments | 26/06/1997 | 4.8 Kb | HTM | sprs035a.htm |
| 320C30-27 320C30-27 320C30-27 320C30-27 (5V) 74-ns Instruction Cycle Time 148.5 MOPS, 27 MFLOPS, 13.5 MIPS 32-Bit High ease of use are results of these features. General-purpose applications are enhanced greatly by the supports a wide variety of system applications from host processor to dedicated coprocessor. High www.datasheetarchive.com/files/texas-instruments/data/html/sprs032a.htm |
Texas Instruments | 26/06/1997 | 4.61 Kb | HTM | sprs032a.htm |
| MFLOPS, 20 MIPS 32-Bit High-Performance CPU 16-/32-Bit Integer and 32-/40-Bit Floating-Point Operations of use are results of these features. General-purpose applications are greatly enhanced by the large variety of system applications from host processor to dedicated coprocessor. High-level-language support www.datasheetarchive.com/files/texas-instruments/sc/psheets/abstract/datasht/sgus026.htm |
Texas Instruments | 01/06/1998 | 8.55 Kb | HTM | sgus026.htm |
| Cycle Time 148.5 MOPS, 27 MFLOPS, 13.5 MIPS 32-Bit High-Performance CPU 16-/32-Bit Integer and 32 . General-purpose applications are enhanced greatly by the large address space, multiprocessor interface multiple interrupt structure. The TMS320C30 TMS320C30 TMS320C30 TMS320C30 supports a wide variety of system applications from host www.datasheetarchive.com/files/texas-instruments/sc/psheets/abstract/datasht/sprs032a.htm |
Texas Instruments | 01/06/1998 | 8.86 Kb | HTM | sprs032a.htm |