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XOMAP3515CCBB Texas Instruments Applications Processor 515-POP-FCBGA visit Texas Instruments
XOMAP3503CCBB Texas Instruments Applications Processor 515-POP-FCBGA visit Texas Instruments
XOMAP3503CCBC Texas Instruments Applications Processor 515-POP-FCBGA visit Texas Instruments
XOMAP3515CCBC Texas Instruments Applications Processor 515-POP-FCBGA visit Texas Instruments
OMAP3530ECBBAR Texas Instruments Applications Processor 515-POP-FCBGA visit Texas Instruments
XDM3730ACBP Texas Instruments Digital Media Processor 515-POP-FCBGA visit Texas Instruments

LPDDR2 PoP

Catalog Datasheet MFG & Type PDF Document Tags

LPDDR2 PoP

Abstract: LPDDR2 ­40°C to +85°C ­40°C to +85°C Mobile LPDDR2 PoP Density Bus Width RoHS Voltage Clock , 1.2V 1.2V 1.2V 1.2V 333­400 MHz 333­533 MHz 333­400 MHz 333­400 MHz 136-ball PoP 168-ball PoP 168-, 200-, 216-ball PoP 216-ball PoP ­40°C to +85°C ­40°C to +85°C ­40°C to +85°C ­40°C to +85°C Mobile LPDDR PoP Density Bus Width RoHS Voltage Clock Rate Package , MHz 167­200 MHz 152-ball PoP 152-, 168-ball PoP 152-, 168-ball PoP ­0°C to +70°C, ­40°C to
Micron Technology
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TC358764

Abstract: PMIC - LED Drivers -SDRAM (U1, PoP Memory) .43 1.6.2NAND Flash Memory (U4 , PMIC Power management IC PoE Power over Ethernet PoP Package on Package POR , optimized through the use of POP (package-on-package) memory. This generation of processors lets you , Instruments OMAP44xx microcontroller (BGA547 packaging and package-onpackage (PoP) memory) â'¢ Improved , '¢ PoP memory device with 512 MB (up to 1 GB) LP DDR2 SDRAM1 â'¢ 4 kB (up to 32 kB) I2C EEPROM1
PHYTEC
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TC358764 PMIC - LED Drivers CORE-OMAP44 L-760 PCM-049- PCM-959 PCM-959/ COREOMAP44

Micron Technology

Abstract: low power, mobile or wireless DRAM (LPDDR, LPDDR2, LPDDR3). Also defined by JEDEC standard , Feature Comparison Type LPDDR(1) LPDDR2 LPDDR3 DDR2 DDR3/DDR3L DDR4 Die Density , /ODT Package Options No/No POP, MCP, discrete No/No POP, MCP, discrete No/Yes POP, MCP , 128-512Mb 45-50ns 150-230mW LPDDR2 333-400 X16, x32 2.1 GB/s 667-1066Mb/s 2-8Gb , . | 19 Block Diagram Comparison DDR2, DDR3, LPDDR2, LPDDR3 August 27, 2013 ©2012 Micron
Micron Technology
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Micron Technology TN-00-20 TN-04-56 TN-41-02 TN-41-04 TN-41-13

W25R128FV

Abstract: W25Q128JV PoP (SAC305) 333 / 400 MHz -40~85c / -40~105c 134 BGA (SAC305) 512Mb LPDDR2 (PKG) Part No , LPDDR 128Mb - 1Gb LPDDR2 256Mb - 2Gb X16 / X32 PSRAM 64Mb- 256Mb X16 Type , 60 BGA 8x9 JEDEC standard X32 90 BGA 8x13 JEDEC standard 168 PoP , _54BGA DDRx16_60BGA SDR/DDRx32_90BGA 9 mm 13 mm 8 mm 8 mm 9 mm 8 mm LPDDR2_168WFBGA LPDDR2_134 VFBGA 11.5 mm 10 mm 12 mm 12 mm Remark æ""當 å‰µæ° ç¾¤æ•
Winbond Electronics
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W25R128FV W25Q128JV W25R128F W25Q128FV W25Q80BVSSIG W978H6KB

Marvell PXA2128

Abstract: ARMv7 independent memory controllers (LPDDR2 or DDR3/DDR3L). â'¢ Multiple power islands, dynamic voltage/frequency , supports a full complement of peripherals in discrete and PoP packages, including standard items such as , DIAGRAM Dual-channel 2x 32b LPDDR2 or DDR3 HDMI+PHY 1.3c+3D HDCP 2x MIPI DSI Gen 2 EPD , Peripherals Yes, Yes No, No 19x19 discrete, 0.65 mm pitch 12x12 PoP, 0.4 mm pitch 16x16 , $ USB3.0 Ss Device DDR3, LPDDR2 8x8 Matrix Keyboard 4x PWM Ethernet (10/100), USB3 OWSI
MARVELL
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Marvell PXA2128 ARMv7 h.264 Marvell android MIPI Marvell PXA2128 C-001

Avastar 88W8787

Abstract: Marvell PXA2128 '¢ Dual-channel independent memory controllers (LPDDR2 or DDR3/DDR3L). â'¢ Multiple power islands, dynamic , ARMADA PXA2128 supports a full complement of peripherals in discrete and PoP packages, including , COMPARISON BLOCK DIAGRAM Dual-channel 2x 32b LPDDR2 or DDR3 HDMI+PHY 1.3c+3D HDCP 2x MIPI DSI , 12x12 PoP, 0.4 mm pitch 16x16 discrete, Packages Software Enhancements for Hybrid-SMP, new , 466 Mtri/sec 1.4 Gpix/sec Graphics Video 32KB/32KB D$/I$ USB3.0 Ss Device DDR3, LPDDR2
MARVELL
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Avastar 88W8787 marvell wtm 3

lpddr2

Abstract: micron lpddr2 life. 2. High Performance The industry's fastest Mobile LPDDR2 delivers max clock speeds of up to , (LPSDR) 128Mb to 8Gb (LPDDR) 512Mb to 4Gb (LPDDR2) Provides flexibility for a variety of application designs Configurations x16, x32 (LPSDR and LPDDR) x32, x64 (LPDDR2) Enables the use of fewer components to support wide-bus architectures Voltage 1.8V (LPSDR and LPDDR) 1.2V (LPDDR2) Helps , (LPSDR) Up to 200 MHz (LPDDR) Up to 533 MHz (LPDDR2) Provides performance comparable to SDR, DDR
Micron Technology
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lpddr2 micron lpddr2 lpddr2 datasheet lpddr2 mcp LPDDR2 SDRAM micron LPDDR 8Gb

ELPIDA mobile dram LPDDR2

Abstract: Elpida LPDDR2 Memory DRAM 1Gb1.8V Mobile RAM 2.5V Mobile RAM DRAM Mobile RAM 1Gb 512Mb/ 1.8V SDRAM SDRAM Mobile RAM 256Mb/128Mb/64Mb 1.2V 533Mbps DDR2 Mobile RAM 1.2V512MDDR2 Mobile RAM DDR Mobile RAM533Mbps DDR2 Mobile RAMJEDEC LPDDR2 Mobile RAM LPDDR2DDR2 Mobile RAM DDR1.8VDRAM1.2V 70nm1.2V ECC1.2V DDR2533Mbps , SiP/MCP/PoP SiP/MCP Mobile RAM Mobile RAM PoP /Mobile RAMSiP/MCP PoP
Elpida Memory
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J0566E80 ELPIDA mobile dram LPDDR2 Elpida LPDDR2 Memory LPDDR2 PoP LPDDR2 1Gb Memory DDR1 Ram ELPIDA mobile DDR RAM533M DDR2533M 16/32I/O
Abstract: Product Brief â'" 121-Ball LPDDR2-PCM and LPDDR2 MCP Features Product Brief LPDDR2-PCM and Mobile LPDDR2 121-Ball MCP MT66R7072A10AB5ZZW.ZCA, MT66R7072A10ACUXZW.ZCA MT66R5072A10ACUXZW.ZFA Features Figure 1: MCP Block Diagram Micron® LPDDR2-PCM and LPDDR2 components RoHS-compliant, â'greenâ' package Shared LPDDR2-PCM and LPDDR2 interfaces Space-saving multichip package Ultra , Interface LPDDR2-PCM Specific Features LPDDR2 Power â'¢ Memory interface â'" 16-bit data bus width Micron Technology
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121-B 128KB 10MB/

MCIMX535

Abstract: MCIMX535DVV Plastic Package Case TEPBGA-2 19 x 19 mm, 0.8 mm pitch Case FC-PBGA 12 x 12 mm PoP, 0.4 mm pitch , high as 1.2 GHz and interfaces with DDR2/LVDDR2-800, LPDDR2-800, or DDR3-800 DRAM memories. This device , Map . . . . . . . . . . . . . 166 6.3. 12 x 12 mm Package on Package (PoP) Information 170 Revision , memory devices, including DDR2, low voltage DDR2, LPDDR2, DDR3, NOR Flash, PSRAM, cellular RAM, NAND , -2 12 x 12 mm PoP, 0.4 mm pitch BGA Case FC-PBGA Part numbers with a PC prefix indicate non
Freescale Semiconductor
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IMX53CEC MCIMX535 MCIMX535DVV MCIMX535DVV1C H.263 MCIMX53 LPDDR2-800

eMMC "thermal impedance"

Abstract: PCIMX535DVV1C Case TEPBGA-2 19 x 19 mm, 0.8 mm pitch Case FC-PBGA PoP 12 x 12 mm Ordering Information See Table 1 , -800, LPDDR2-800, or DDR3-800 DRAM memories. This device is suitable for applications such as the following: · , Map . . . . . . . . . . . . . 169 6.3. PoP 12 x 12 mm Package on Package (PoP) Information . . . . . . , DDR2, LPDDR2, DDR3, NOR Flash, PSRAM, cellular RAM, NAND Flash (MLC and SLC), OneNANDTM, and managed , Case TEPBGA-2 12 x 12 mm PoP 12 x 12 mm PoP Part numbers with a PC prefix indicate non production
Freescale Semiconductor
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eMMC "thermal impedance" PCIMX535DVV1C emmc Card connector 4.712 062N Samsung eMMC 4.41

SCIMX538DZK1C

Abstract: samsung eMMC 4.5 Plastic Package Case TEPBGA-2 19 x 19 mm, 0.8 mm pitch Case FC-PBGA 12 x 12 mm PoP, 0.4 mm pitch , high as 1.2 GHz and interfaces with DDR2/LVDDR2-800, LPDDR2-800, or DDR3-800 DRAM memories. This device , Map . . . . . . . . . . . . . 166 6.3. 12 x 12 mm Package on Package (PoP) Information 170 Revision , memory devices, including DDR2, low voltage DDR2, LPDDR2, DDR3, NOR Flash, PSRAM, cellular RAM, NAND , -2 12 x 12 mm PoP, 0.4 mm pitch BGA Case FC-PBGA Case TEPBGA-2 and FC-PBGA are RoHS compliant
Freescale Semiconductor
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SCIMX538DZK1C samsung eMMC 4.5 emmc pcb layout lpddr2 pcb layout samsung* lpddr2* pop package N7U2

pin vga CRT pinout

Abstract: samsung* lpddr2 Plastic Package Case TEPBGA-2 19 x 19 mm, 0.8 mm pitch Case FC-PBGA PoP 12 x 12 mm Ordering , with DDR2/LVDDR2-800, LPDDR2-800, or DDR3-800 DRAM memories. This device is suitable for , . . . . . . 150 6.2. 19 x 19 mm, 0.8 Pitch Ball Map . . . . . . . . . . . . . 169 6.3. PoP 12 x 12 mm Package on Package (PoP) Information . . . . . . . . . . . . . . . . . . . . . . . . . . . . . , types of external memory devices, including DDR2, low voltage DDR2, LPDDR2, DDR3, NOR Flash, PSRAM
Freescale Semiconductor
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pin vga CRT pinout samsung* lpddr2 i.MX53 emmc DDR pcb layout JESD209-2 eMMC 4.4

SCIMX

Abstract: Plastic Package Case TEPBGA-2 19 x 19 mm, 0.8 mm pitch Case FC-PBGA 12 x 12 mm PoP, 0.4 mm pitch , speeds as high as 1.2 GHz and interfaces with DDR2/LVDDR2-800, LPDDR2-800, or DDR3-800 DRAM memories , . . . . . . . 166 6.3. 12 x 12 mm Package on Package (PoP) Information 170 Revision History . . . , many types of external memory devices, including DDR2, low voltage DDR2, LPDDR2, DDR3, NOR Flash , set -20 to +85 12 x 12 mm PoP, 0.4 mm pitch BGA Case FC-PBGA 1 Case TEPBGA-2 and FC-PBGA
Freescale Semiconductor
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SCIMX

NT6TL128M32AQ-G1

Abstract: NT6TL256T32 0.65mm pitch -168-Ball PoP 12mm x 12mm 0.5mm pitch -216-Ball PoP 12mm x 12mm 0.4mm pitch -220-Ball PoP 14mm x 14mm 0.5mml pitch -240-Ball PoP 14mm x 14 mm 0.5mm pitch Timing ­ cycle time -1.875ns @ RL , NT6TL128T64A5-G0 NT6TL128T64A5-G1 NT6TL128T64A5-G2 220-Ball PoP 14mm x 14mm 0.5mml pitch 240-Ball PoP 8Gb 256M x 64 , NT6TL128T64AR-G2I 216-Ball PoP 12mm x 12mm 0.4mm pitch 1.875 2.5 3.0 1.875 1.875 2.5 3.0 168-Ball PoP 12mm x 12mm 0.5mm pitch 168-Ball PoP 12mm x 12mm 0.5mm pitch 216-Ball PoP 12mm x 12mm 0.4mm pitch 216-Ball PoP 12mm
Nanya Technology
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NT6TL128M32AQ-G1 NT6TL256T32 NT6TL256T32AQ-G1 NT6TL128M32AQ-G0 NT6TL128M32 hynix lpddr2 NT6TL128M32AI NT6TL256T32AS/NT6TL128T64AR R0-R13

OMAP4430

Abstract: ELPIDA mobile dram LPDDR2 Processor and its POP LPDDR2 memory, the input clock circuitry, the TWL6030 Power Companion IC, and the , Connector (J18) HS-USB (USBA0) POP ­ LPDDR2 8 Gb/1GB Composite Video Header (J12) CLK32KG , processor supports two LPDDR2 channels, accessible only via a POP memory device soldered on the 216 , . An 8Gb/1GB POP LPDDR2 DRAM device (Elpida P/N EDB8064B1PB-8D-F) is provided on the PandaBoard. The , listing of the PandaBoard features. Feature Processor POP Memory PMIC Debug Support PCB Indicators HS
PandaBoard
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OMAP4430 LPDDR2 SDRAM memory OMAP4 Texas Instruments Pandaboard lpddr2 pcb design OMAP44 DOC-21010 595-PANDABOARD UEVM4430G-01-00-00

EDB8064B1PB-8D-F

Abstract: OMAP4430 (Phoenix) Power Management Companion Device TWL6040 (Phoenix) Audio Companion Device POP Mobile LPDDR2 , OMAP4430 Processor and its POP LPDDR2 memory, the input clock circuitry, the TWL6030 Power Companion IC , ) Mini-AB USB Connector (J18) SDMMC1 HS-USB (USBA0) Composite Video Header (J12) POP ­ LPDDR2 , feedthroughs to the top POP footprint on the OMAP package, where they directly connect to the LPDDR2 VDD2 , OMAP4430 processor supports two LPDDR2 channels, accessible only via a POP memory device soldered on the
PandaBoard
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smps repair circuit smps repair EDB8064 usb3320c elpida lpddr2 ivahd

K4X2G323PD8GD8

Abstract: K9HFGY8S5A-HCK0 ES   1CH x32 LPDDR2 K4P8G304EC-AG(2) 168-FBGA, 12x12 PoP, DDP, 128x16*4 1.2V ES  , '¢ eMMC + LPDDR2 â'¢ eMMC + MDDR storage Pages 18â'"19 samsung.com/greenmemory â'¢ Solid , , 2CKE) K4X4G303PD-AGD8 168-FBGA, 12x12 PoP, DDP . 800MHz 1.8V Now 2Gb 1CH x32 K4P2G324ED-AG(1) 168-FBGA, 12x12 PoP, MONO, 1.2V Now 1CH x32 K4P4G324EB-AG(1,2) 168-FBGA, 12x12 PoP, MONO, 128Mx32 1.2V Now 1CH x32 K4P4G324EC-AG(2) 168-FBGA, 12x12 PoP, MONO
Samsung Semiconductor
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K4X2G323PD8GD8 K9HFGY8S5A-HCK0 K4H511638JLCCC KLMBG4GE2A-A001 K9K8G08U0D-SIB0 samsung eMMC 5.0 BR-12-ALL-001

JESD209-2E

Abstract: MSO UPGRADE PACKAGE MSO72004 with DPOJET Jitter and Eye Diagram Analysis (Opt. DJA) LPDDR2 BGA and PoP Interposers , , BGA interposers and MSO interposers LPDDR, LPDDR2, LPDDR3 GDDR3, GDDR5 Datasheet DDRA , -4 LPDDR JESD209A LPDDR2 JESD209-2E LPDDR3 JESD209-3 Memory interface analysis in DPOJET , . P7500 Trimode Probeing System with accessories LPDDR2 component package on package interposer 4 , and PoP Interposers GDDR5 Solder Down and Socketed Interposers Tektronix is registered to ISO
Tektronix
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MSO UPGRADE PACKAGE MSO5000 MSO70000 DSO/MSO5000 DPO7000 DPO/DSA/MSO70000

MCIMX535

Abstract: emmc DDR3 pcb layout Information Plastic Package Case TEPBGA-2 19 x 19 mm, 0.8 mm pitch Case FC-PBGA 12 x 12 mm PoP, 0.4 mm pitch , , which operates at clock speeds as high as 1.2 GHz. It provides DDR2/LVDDR2-800, LPDDR2-800, or DDR3 , (PoP) Information . . . . . . . . . . . . . . . . . . . . . . . . . . . . 172 Revision History . . . . , , low voltage DDR2, LPDDR2, DDR3, NOR Flash, PSRAM, cellular RAM, NAND Flash (MLC and SLC), OneNANDTM , , Video IP Phone, Connected TV, Telehealth, Digital Signage 1­1.2 GHz ARM CortexTM-A8 2 GB, x32 LPDDR2
Freescale Semiconductor
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emmc DDR3 pcb layout emmc Pin assignment eMMC rja rjc samsung NAND Flash DIE
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