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LC1-D09 Schneider Electric TeSys contactors
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LC1-D09 Telemecanique Contactors and protection relays
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LC1-D115 Schneider Electric TeSys contactors
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LC1-D115 Telemecanique Contactors and Protection Relays
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LC1-D12 Schneider Electric TeSys contactors
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LC1-D12 Telemecanique Contactors and Protection Relays
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LC1-D12 Telemecanique Contactors and protection relays
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LC1-D150 Schneider Electric TeSys contactors
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LC1-D150 Telemecanique Contactors and Protection Relays
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Abstract: according to Table 13. When MODE[2:0] are 001, these pins are the LC1 [D:A] pins. LINKLED[D:A] I/O Link , [D:A] LC1[D:A] LINKLED[D:A] LC0[D:A] Table 16. Link Control (LC) and Link Status (LS) Descriptions , Descriptions Table 1. Mil Data Pins* Pin Name Type^ Description COL[D:A] O Collision Detect. This signal , , and is an asynchronous output. CRS[D:A] O Carrier Sense. When CRS_SEL is low, this signal is asserted , Mil management interface- RX_CLK[D:A] O Receive Clock. 25 MHz clock with 45/55 duty cycle that ... OCR Scan
datasheet

18 pages,
697.1 Kb

LUC3X14 LUC3X04 LUC3X14 abstract
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Abstract: GV2-ME10 GV2ME22 LJ7K06Q706 VCD02 VCF4GE GVAD1010 circuit-breaker + switch Unit type GV2 ME + GV AX + GV2 MC + GV2 K LG7 K LG7 D LG1 K LG1 D ... Original
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46 pages,
2706.52 Kb

GV2 LE AND GV2 L Selector switch 12 position AD1001 dol motor starter wiring diagram tesys d-9 contactors GV2 ME05 GV2 ME20 gv2 me10 GV2 AN11 LC1 D12 wiring diagram wiring diagram dol starter S-N25 Magnetic Contactor datasheet abstract
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Abstract: P PC PRODUCTS CORP 5SE D â-  bfiSbni GOODfiflb fl â-  fi I ) 2-ANPN Power ^"xT"^ Transistor Chips I , CONDITIONS 2C2880 2C2880 UNITS MIN MAX BVCBO" Collector-Base Voltage lc=10 /iAdc, Cond. D 110 - Vdc BVceo* Collector-Emitter Voltage (Note 1) lc=0.1 Adc, Cond. D 80 - Vdc BVEBO* Emitter-Base Voltage |E=10 jiAdc, Cond. D 8 - Vdc ICEO" Collector-Emitter Cutoff Current VCE=60 Vdc, Cond. D - 100 /lAdc ICEX' , Cutoff Current Veb=6 Vdc, Cond. D - 0.4 iiAdc hFE" DC Current Gain (Note 1) ic=50 mAdc, Vce=5 Vdc ic=1 ... OCR Scan
datasheet

1 pages,
51.72 Kb

2C2880 2C2880 abstract
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Abstract: used as battery low detection. And the 7-bit current-type D/A converter and PWM device provide the , LC1 LV3 LC1 C4 LC1 C4 0.1uF C4 0.1uF LC2 0.1uF LC2 LC2 No External , C7 0.1uF FXI PRTD[7:0] GND LC1 External Fast Clock: Crystal osc. SXO SXO SW1 PRTC[3:0] 20P 2MHZ 20P FXO LC1 LC2 LV1 COM[3:0] SEG[11:0] PRT14 PRT14[7:0]/SEG[19:12 ... Original
datasheet

2 pages,
29.5 Kb

VOICE RECORDER IC lcd watch ic HE83115 AN022 digital watch lcd circuit HE80000 HE83115 abstract
datasheet frame
Abstract: (lightvoicetemperaturehumility) sensor and used as battery low detection. And the 7-bit current-type D/A converter and PWM , Voltage=LV3=VDD VDD VDD LV1 VDD LV2 LC1 LV3 LC1 C4 LC1 C4 0.1uF C4 0.1uF LC2 , GND LC1 LC2 C5 0.1uF C6 0.1uF C7 0.1uF External Fast Clock: Crystal osc. FXO SXI FXI 20P SXO 2MHZ PRTD[7:0] 20P FXO PRTC[7:0] LC1 External Fast Clock: RC osc. ... Original
datasheet

2 pages,
29.73 Kb

HE83116 AN022 digital watch lcd circuit digital calendar clock ic HE80000 HE83116 abstract
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Abstract: TeSys contactors References TeSys D contactors for motor control up to 75 kW at 400 V, in , in AC-3 440 V 220 V 380 V 415 V 440 V 500 V 660 V 1000 V up to 230 V 400 V 690 V LC1 D09pp , LC1 D09pp 0.320 3 5.5 5.5 5.5 7.5 7.5 ­ 12 1 1 LC1 D12pp 0.325 4 7.5 9 9 10 10 ­ 18 1 1 LC1 D18pp 0.330 5.5 11 11 11 15 15 ­ 25 1 1 LC1 D25pp 0.370 7.5 15 15 15 18.5 18.5 ­ ... Original
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9 pages,
568.01 Kb

LC1 D12 10 LC1 D32 magnetic Contactor lc1 d LC1 D18 P7 LC1 DT40 LC1 D95 BD tesys d contactors LC1 D09 BL LC1 D09 10 LC1 D32 wiring LC1 D12 P7 datasheet abstract
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Abstract: P P C PRODUCTS CORP _25E D WM bastili DODDflflb & m till 2-ANPN Power ^fTT , * Collector-Base Voltage lc = 10 /iAdc, Cond. D 110 - Vdc BVceo* Collector-Emitter Voltage (Note 1) IC = 0.1 Adc, Cond. D 80 - Vdc BVEBO* Emitter-Base Voltage |e= 10 ¿iAdc, Cond. D 8 - Vdc ICEO" Collector-Emitter Cutoff Current VCE=60 Vdc, Cond. D - 100 /lAdc ICEX' Collector-Emitter Cutoff Current Vce = 110 Vdc , Cutoff Current Vcb=80 Vdc, Cond.D - 0.4 /lAdc Iebo* Emitter-Base Cutoff Current Veb = 6 Vdc, Cond. D - ... OCR Scan
datasheet

1 pages,
52.2 Kb

2C2880 2C2880 abstract
datasheet frame
Abstract: SAMSUNG SEMICONDUCTOR INC . 14E D | 71b4142 0007575 A J| MMBT5087 MMBT5087 PNP EPITAXIAL SILICON TRANSISTOR LOW NOISE TRANSISTOR ABSOLUTE MAXIMUM RATINGS (Ta=25°C) Characteristic Symbol Rating Unit , Collector-Emitter Breakdown Voltage BVceo lc=1 OmA. In=0 50 V Collector Cutoff Current tcBO Vcb=35V, Ie=0 50 nA DC Current Gain hfE Vcl = 5V. I^IOOyA 250 800 VCÊ=5V. Ic= 1.0mA 250 Vce=5V, lc=1 OmA 250 , Rs=10K0 f=10Hz to 15.7KHz Vce=5V, lc=1 OOfjA 2 dB Rs=3KiJ, f=1KHz Marking _EL 2 Q ... OCR Scan
datasheet

1 pages,
29.74 Kb

MMBT5087 MMBT5086 MMBT5087 abstract
datasheet frame
Abstract: humility sensor or used to detect the battery low. The 7-bit current-type D/A converter and PWM drive , Charge Pump is selected LCD Max. Voltage=LV3=VDD LC1 VDD LC2 LV3 LV1 Floating LC1 , 20P SXO External Fast Clock: RC osc. PRT17 PRT17[7:0] LC1 COM[15:0] LC2 FXI PRTD[7:0] GND LC1 SXI VDD LCD PANEL SEG[31:0] LC2 R > 8.2 KOhm LV1 FXI C: Please ... Original
datasheet

2 pages,
184.38 Kb

HE83750S HE83139 AN022 HE80000 HE83139 abstract
datasheet frame
Abstract: (lightvoicetemperaturehumility) sensor etc. The 7-bit current-type D/A converter and PWM device provide. The 64K ROM Size can , LCD Max. Voltage=LV3=3/2*VDD LC1 C6 VDD LV3 0.1uF LV1 LC2 Floating LC1 C7 0.1uF , SXI RSTP_N 0.1uF 100uF C3 0.1uF SXO SW1 RESET LC1 LC2 LV1 FXI SXI 2MHZ FXO External Fast Clock: RC osc. PRTC[3:0] LC1 VDD LC2 COM[15:0] LV1 C1 0.1uF LV3 < 9 ... Original
datasheet

2 pages,
29.28 Kb

HE83135 AN022 HE80000 HE83135 abstract
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Extended Electronics Archive (Experimental)

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DIGITAL-LOGIC AG SHARP LQ10D345 1 Sharp LQ10D367 Model LQ10D367 Filename LC_1D367.XXX Manufacturer Sharp Bios code B2 Resolution 640x480 Bios/Table version V1.0/V1.0 Number of Colors 262'000 Used Controller 69000 Technology TFT-Color Date of adaption 5.00 Interface Digital Size 10,4" Notes LCD signal LCD connector pin Controller signal 24bit CK 2 CLK ENAB 27 M HSYNC 3 LP VSYNC 4 FLM VCC 28,29,30 EVDD GND 5,12,19,26,31 GND Red 5 11 P23 Red 4 10 P22 Red 3 9 P21 Red 2 8 P20 Red 1 7 P19 Red 0 6 P18 Green 5 18 P15 Green 4
www.datasheetarchive.com/download/16108483-80313ZC/tft.zip (lc_1d367.pdf)
Digital Logic 15/11/2006 1313.8 Kb ZIP tft.zip
LC0_F_O LC0.F LC1_F_O LC1.F LC2_F_O LC2.F LC3_F_O LC3.F LC0_FD_Q LC0.Q LC1_FD_Q LC1.Q LC2_FD_Q LC2.Q LC2_F_1 LC2.F1 LC2_F_2 LC2.F2 LC2_F_3 LC2.F3 LC2_F_4 LC2.F4 LC1_F_1 LC1.F1 LC1_F_2 LC1.F2 LC1_F_3 LC1.F3 LC1_F_4 LC1.F4 LC0_F_1 LC0.F1 LC0_F_2 LC0.F2 LC0_F_3 LC0.F3 LC0_F_4 LC0.F4 LC0_M LC0.XBI LC1_M LC1.XBI LC2_M LC2.XBI LC3_M LC3.XBI LC0_DI LC0.DI LC1_DI LC1.DI LC2_DI LC2.DI LC3_DI LC3.DI OBUFT0_I F5_3 C F5_4 D F5_5 E C1 C1 C2 C2 C3 C3 C4 C4 A A B B C C D D E
www.datasheetarchive.com/download/70089650-986475ZC/wcd022ff.zip (pic2lca.dat)
Xilinx 13/07/1998 1903.63 Kb ZIP wcd022ff.zip
LC0_F_O LC0.F LC1_F_O LC1.F LC2_F_O LC2.F LC3_F_O LC3.F LC0_FD_Q LC0.Q LC1_FD_Q LC1.Q LC2_FD_Q LC2.Q LC2_F_1 LC2.F1 LC2_F_2 LC2.F2 LC2_F_3 LC2.F3 LC2_F_4 LC2.F4 LC1_F_1 LC1.F1 LC1_F_2 LC1.F2 LC1_F_3 LC1.F3 LC1_F_4 LC1.F4 LC0_F_1 LC0.F1 LC0_F_2 LC0.F2 LC0_F_3 LC0.F3 LC0_F_4 LC0.F4 LC0_M LC0.XBI LC1_M LC1.XBI LC2_M LC2.XBI LC3_M LC3.XBI LC0_DI LC0.DI LC1_DI LC1.DI LC2_DI LC2.DI LC3_DI LC3.DI OBUFT0_I F5_3 C F5_4 D F5_5 E C1 C1 C2 C2 C3 C3 C4 C4 A A B B C C D D E
www.datasheetarchive.com/download/83416831-986477ZC/wcd02301.z
Xilinx 13/07/1998 2879.94 Kb Z wcd02301.z
LC0_F_O LC0.F LC1_F_O LC1.F LC2_F_O LC2.F LC3_F_O LC3.F LC0_FD_Q LC0.Q LC1_FD_Q LC1.Q LC2_FD_Q LC2.Q LC2_F_1 LC2.F1 LC2_F_2 LC2.F2 LC2_F_3 LC2.F3 LC2_F_4 LC2.F4 LC1_F_1 LC1.F1 LC1_F_2 LC1.F2 LC1_F_3 LC1.F3 LC1_F_4 LC1.F4 LC0_F_1 LC0.F1 LC0_F_2 LC0.F2 LC0_F_3 LC0.F3 LC0_F_4 LC0.F4 LC0_M LC0.XBI LC1_M LC1.XBI LC2_M LC2.XBI LC3_M LC3.XBI LC0_DI LC0.DI LC1_DI LC1.DI LC2_DI LC2.DI LC3_DI LC3.DI OBUFT0_I F5_3 C F5_4 D F5_5 E C1 C1 C2 C2 C3 C3 C4 C4 A A B B C C D D E
www.datasheetarchive.com/download/29960019-986478ZC/wcd02302.z
Xilinx 13/07/1998 3033.65 Kb Z wcd02302.z
LC0_F_O LC0.F LC1_F_O LC1.F LC2_F_O LC2.F LC3_F_O LC3.F LC0_FD_Q LC0.Q LC1_FD_Q LC1.Q LC2_FD_Q LC2.Q LC2_F_1 LC2.F1 LC2_F_2 LC2.F2 LC2_F_3 LC2.F3 LC2_F_4 LC2.F4 LC1_F_1 LC1.F1 LC1_F_2 LC1.F2 LC1_F_3 LC1.F3 LC1_F_4 LC1.F4 LC0_F_1 LC0.F1 LC0_F_2 LC0.F2 LC0_F_3 LC0.F3 LC0_F_4 LC0.F4 LC0_M LC0.XBI LC1_M LC1.XBI LC2_M LC2.XBI LC3_M LC3.XBI LC0_DI LC0.DI LC1_DI LC1.DI LC2_DI LC2.DI LC3_DI LC3.DI OBUFT0_I F5_3 C F5_4 D F5_5 E C1 C1 C2 C2 C3 C3 C4 C4 A A B B C C D D E
www.datasheetarchive.com/download/94870060-986592ZC/wcd02569.zip (pic2lca.dat)
Xilinx 12/02/1999 1903.63 Kb ZIP wcd02569.zip
) (Includes an external input margin of 0.0ns.) Pad "CLEAR" (P69) to LC1_FF Setup (D) at "N455.LC1.F1" Target LC1_FFX drives output net "N470" Clock to Pad : 30.2ns (1 block _REG_REG/Q_OUT" to LC1_FF Setup (D) at "N455.LC1.F1" Target LC1_FFX drives output net "N470" Clock to (CE) at "CLB3.CE" Target LC0_FFX drives output net "C_OUT309 OUT309" Target LC1_FFX drives output
www.datasheetarchive.com/download/16518039-958264ZC/synopsys.tar
Xilinx 24/09/1996 10168 Kb TAR synopsys.tar
LC0_M LC0_FD_D (is_din_dly), LC0_F_O LC0_FD_D, LC1_M LC1_FD_D (is_din_dly), LC1_F_O LC1_FD_D the end # of the previous set. Example the first set ends before the bel 'LC1_F'. _BELS # First _GEN_SLOT LC1_F (is_gnd_src is_vcc_src), 5200_DFF_SLOT LC1_FD, 5200_CARRY_SLOT LC1_CYMUX, # Third _gnd_src), ; # Additional node definitions _NODES # Input bel nodes LC0_DI, LC0_F1, LC0_F2, LC0_F3, LC0_F4, LC1_DI, LC1_F1, LC1_F2, LC1_F3, LC1_F4, LC2_DI, LC2_F1, LC2_F2, LC2_F3, LC2_F4, LC3_DI, LC3_F1, LC3_F2, LC3_F3, LC3_F
www.datasheetarchive.com/download/70089650-986475ZC/wcd022ff.zip (52ct.bel)
Xilinx 13/07/1998 1903.63 Kb ZIP wcd022ff.zip
LC0_M LC0_FD_D (is_din_dly), LC0_F_O LC0_FD_D, LC1_M LC1_FD_D (is_din_dly), LC1_F_O LC1_FD_D the end # of the previous set. Example the first set ends before the bel 'LC1_F'. _BELS # First _GEN_SLOT LC1_F (is_gnd_src is_vcc_src), 5200_DFF_SLOT LC1_FD, 5200_CARRY_SLOT LC1_CYMUX, # Third _gnd_src), ; # Additional node definitions _NODES # Input bel nodes LC0_DI, LC0_F1, LC0_F2, LC0_F3, LC0_F4, LC1_DI, LC1_F1, LC1_F2, LC1_F3, LC1_F4, LC2_DI, LC2_F1, LC2_F2, LC2_F3, LC2_F4, LC3_DI, LC3_F1, LC3_F2, LC3_F3, LC3_F
www.datasheetarchive.com/download/83416831-986477ZC/wcd02301.z
Xilinx 13/07/1998 2879.94 Kb Z wcd02301.z
LC0_M LC0_FD_D (is_din_dly), LC0_F_O LC0_FD_D, LC1_M LC1_FD_D (is_din_dly), LC1_F_O LC1_FD_D the end # of the previous set. Example the first set ends before the bel 'LC1_F'. _BELS # First _GEN_SLOT LC1_F (is_gnd_src is_vcc_src), 5200_DFF_SLOT LC1_FD, 5200_CARRY_SLOT LC1_CYMUX, # Third _gnd_src), ; # Additional node definitions _NODES # Input bel nodes LC0_DI, LC0_F1, LC0_F2, LC0_F3, LC0_F4, LC1_DI, LC1_F1, LC1_F2, LC1_F3, LC1_F4, LC2_DI, LC2_F1, LC2_F2, LC2_F3, LC2_F4, LC3_DI, LC3_F1, LC3_F2, LC3_F3, LC3_F
www.datasheetarchive.com/download/29960019-986478ZC/wcd02302.z
Xilinx 13/07/1998 3033.65 Kb Z wcd02302.z
LC0_M LC0_FD_D (is_din_dly), LC0_F_O LC0_FD_D, LC1_M LC1_FD_D (is_din_dly), LC1_F_O LC1_FD_D the end # of the previous set. Example the first set ends before the bel 'LC1_F'. _BELS # First _GEN_SLOT LC1_F (is_gnd_src is_vcc_src), 5200_DFF_SLOT LC1_FD, 5200_CARRY_SLOT LC1_CYMUX, # Third _gnd_src), ; # Additional node definitions _NODES # Input bel nodes LC0_DI, LC0_F1, LC0_F2, LC0_F3, LC0_F4, LC1_DI, LC1_F1, LC1_F2, LC1_F3, LC1_F4, LC2_DI, LC2_F1, LC2_F2, LC2_F3, LC2_F4, LC3_DI, LC3_F1, LC3_F2, LC3_F3, LC3_F
www.datasheetarchive.com/download/94870060-986592ZC/wcd02569.zip (52ct.bel)
Xilinx 12/02/1999 1903.63 Kb ZIP wcd02569.zip