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Part : BACC10JP18A Supplier : Glenair Manufacturer : Avnet Stock : - Best Price : - Price Each : -
Part : BACC10JP18B Supplier : Glenair Manufacturer : Avnet Stock : - Best Price : - Price Each : -
Part : ECE-S1JP183EA Supplier : Panasonic Electronic Components Manufacturer : Avnet Stock : - Best Price : $5.6470 Price Each : $6.4326
Part : ECOS1JP182BA Supplier : Panasonic Electronic Components Manufacturer : Avnet Stock : - Best Price : $1.1560 Price Each : $1.3168
Part : MT41J128M8JP-187E:F Supplier : Micron Technology Manufacturer : Avnet Stock : - Best Price : - Price Each : -
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Part : MCPRM07WJP184B00 Supplier : SPC Multicomp Manufacturer : Newark element14 Stock : - Best Price : $0.2820 Price Each : $1.06
Part : P-JP18 Supplier : Pentair Equipment Protection - Hoffman Manufacturer : Newark element14 Stock : 3 Best Price : $156.83 Price Each : $194.31
Part : P-JP18G Supplier : Pentair Equipment Protection - Hoffman Manufacturer : Newark element14 Stock : 4 Best Price : $221.45 Price Each : $268.69
Part : PJP18G Supplier : Pentair Equipment Protection - Hoffman Manufacturer : Carlton-Bates Company Stock : - Best Price : $253.0100 Price Each : $253.0100
Part : MT41J128M8JP-187EIT:F Supplier : Micron Technology Manufacturer : America II Electronics Stock : 1,631 Best Price : - Price Each : -
Part : BACC10JP18A Supplier : Glenair Manufacturer : Powell Electronics Stock : 42 Best Price : $55.56 Price Each : $106.39
Part : BACC10JP18B Supplier : Glenair Manufacturer : Powell Electronics Stock : 4 Best Price : $55.56 Price Each : $106.39
Part : PRM05WJP182B00 Supplier : Royal Electronic Factory (Thailand) Manufacturer : TME Electronic Components Stock : 781 Best Price : $0.0580 Price Each : $0.1490
Part : PRW05WJP181B00 Supplier : Royal Electronic Factory (Thailand) Manufacturer : TME Electronic Components Stock : 84 Best Price : $0.0469 Price Each : $0.1290
Part : PRW05WJP182B00 Supplier : Royal Electronic Factory (Thailand) Manufacturer : TME Electronic Components Stock : 1 Best Price : $0.0469 Price Each : $0.1290
Part : PRW05WJP183B00 Supplier : Royal Electronic Factory (Thailand) Manufacturer : TME Electronic Components Stock : 700 Best Price : $0.0469 Price Each : $0.1290
Part : MCPRM07WJP184B00 Supplier : SPC Multicomp Manufacturer : Farnell element14 Stock : - Best Price : £0.3120 Price Each : £0.8480
Part : ECE-T1JP183EA Supplier : Panasonic Electronic Components Manufacturer : Master Electronics Stock : 150 Best Price : $6.62 Price Each : $15.86
Part : MT41J128M8JP-187E:F Supplier : Micron Technology Manufacturer : New Advantage Stock : 2,000 Best Price : - Price Each : -
Part : 350JP182U050C Supplier : Cornell Dubilier Manufacturer : Sager Stock : - Best Price : - Price Each : -
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JP18

Catalog Datasheet MFG & Type PDF Document Tags
Abstract: ASAHI KASEI # Master clock 1. Master clock = XI S e t JP 19, JP14, JP18 and JP13 as Figure 7. JP19 · · , , JP14, JP18 and JP13 as Figure 8. Figure 8. Jumper set up (MCLK=X2) 3. Master clock = BNC S e t JP 19, JP14, JP18 and JP13 as Figure 9._ JP19 · · · · · · X JP 14 · · IN T £ XTE JP18 · · DIR · BN , clock = X I S e t JP19, JP14, JP18 and JP13 as Figure 11._ JP 19 · · -i · · 2 XTS * i X JP 14 [* · * | INT · E XT JP18 3? · · X TE Q 6 2 E X T _M C L K JP 13 · · · · 7: M C LK a -
OCR Scan
AK4526 ahi 1015 cs8402 IC ATA 2388 AKD4526 K4526 SSAKD4526 KM057904
Abstract: (EXT2), PORT7(DSP2) MCLKAK4122A JP18(MCLK2)"DIR" JP15 SDTIO JP16 BICK2 DIR JP17 LRCK2 EXT DIR EXT JP18 MCLK2 DIR EXT · SW3(Table 3,Table 4,Table 5) ON"H", OFF"L" SW3 , JP18 MCLK2 EXT DIR EXT · J2(EXT2)MCLKBICKJP4(DIV2)JP5(CLK2)MCLK Table 6JP6(BCFS)BICK , DIR JP17 LRCK2 EXT DIR EXT JP18 MCLK2 DIR EXT (2-2) MCLK AK4114(U13)DIR PORT6(DIR2) J2(EXT2), PORT7(DSP2) MCLKAK4122A JP18(MCLK2)"DIR" JP15 SDTIO JP16 BICK2 DIR Asahi Kasei Microdevices
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AKD4122A-A 74HC14 wak4 74hc14 1g 74hc142 U15B AK4122AR AK4122A KM099400 HSU119
Abstract: terminal emulation software like PROCOMM or QLFAX ). XILINX Core FPGA Signal Socket Pins JP18 , EPROM CAE USB Evaluation Board Version 1.0 JP1 M37690 Internal EPROM JP18 8951 Microcontroller active JP18 M37690 Microcontroller active JP 21 High Speed JP21 Low Speed Figure 1. Block diagram Xilinx
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XC4000E 8951 Microcontroller pin diagram of microcontroller at89c52 atmel 8951 8951 Microcontroller- MICROCONTROLLER AT89C52 pin diagram JP18- AT89C51/AT89C52 RS232 888-CAE-TECH
Abstract: JP5 JP16 JP18 JP20 JP13 TP2 JP19 P1 TP_VP Figure 2. ADS5294EVM Basic Configuration 1 , , respectively. 4. JP13: Enable onboard CMOS clock. 5. JP16, JP18, JP19, JP20: ADC clock source selection , clock as the default option. JP16 JP18 JP15 J5 JP17 JP20 JP13 JP19 J16 J8 J4 , , JP18 JP13 (1-2), JP20 (2-3), JP19 (1-2), JP16 (2-3), JP18 (2-3) Dia. 1 (Default Option) External CMOS Clock Generator J8, JP19, JP20, JP16, JP20 (2-3), JP19 (2-3), JP16 (2-3), JP18 (2-3 Texas Instruments
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SLAU355 ADS5294 ADS529
Abstract: be connected to J2 (EXT2) and PORT7 (DSP2). Set JP18 (MCLK2) to the "DIR" when MCLK is supplied to the AK4122A. JP15 SDTIO JP16 BICK2 DIR JP17 LRCK2 EXT DIR JP18 MCLK2 EXT , supplied from UPD. Set JP18 (MCLK2) to the "EXT" when MCLK is supplied to the AK4122A. JP15 SDTIO JP16 BICK2 DIR JP17 LRCK2 EXT DIR JP18 MCLK2 EXT DIR EXT · Clock Setting MCLK , . JP15 SDTIO JP16 BICK2 DIR JP17 LRCK2 EXT DIR JP18 MCLK2 DIR EXT EXT Asahi Kasei Microdevices
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74HC143 U15C KA4122 JP13 U17E 74HC4040 74AC74 74AC163 74LVC541 TA48M33F
Abstract: 2-3 PS200 2 LED X O PS200 2 PHost CLK O X O = X = · JP18- PS200 , JBat 2.4 - PS200 OVP JP18 PS2070 OVP VIN JBat , C7 C8 LOOPIN 1.27K 1 2 JP18 VREF CTRLOUT CTRLIN VSS VDD 20.0K FDBK , 100 mil AMP JP2 JP18 JP19 OVP VIN 25 mil 15 382811-6 5 J3 5.08 mm x 12A/250V , mil/145 mil 25 mil 10 3M 929665-09-36-I 1 JP2 JP18 JP19 PCB 36 100 mil 235 Microchip Technology
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PS051 PS052 PS020 4404 mosfet UV 471 1757019 PS2070EV DS21927A JP18----
Abstract: JP18 MKFS JP21 MCLK_SEL XTL DIR EXT 256fs 512fs 1024fs MCKO (1-2) BICK BICK (16fs/32fs/64fs , JP18 MKFS JP21 MCLK_SEL XTL DIR EXT 256fs 512fs 1024fs MCKO (2-2) BICK JP20 BICK INV , JP21(MCLK_SEL)(74VHC4040) BICK, FCK 256fs512fs1024fs JP18 MKFS JP18 MKFS JP18 MKFS 256fs , MCLK_SEL JP18 MKFS XTL DIR EXT JP6 MCKI 256fs 512fs 1024fs JP29 BICK_INV JP19 , MCKI JP17 XTE JP21 MCLK_SEL JP18 MKFS XTL DIR EXT 256fs 512fs 1024fs (5-2) BICK -
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AKD4633-A AK4633 AK4633VN 36v MIC zener diode 74HC14 B1 4633 AKD4633-AMIC/SPK16CODECAK4633VN KM079406 AK4114AK4633VN
Abstract: PORT7 (DSP2). Set JP18 (MCLK2) to the "DIR" when MCLK is supplied to the AK4122. JP15 SDTIO JP16 BICK2 DIR JP17 LRCK2 EXT DIR EXT JP18 MCLK2 DIR EXT · SW3 setting (See , this evaluation board and the LRCK and SDTI are supplied from UPD. Set JP18 (MCLK2) to the "EXT" when MCLK is supplied to the AK4122. JP15 SDTIO JP16 BICK2 DIR JP17 LRCK2 EXT DIR JP18 , JP17 LRCK2 EXT DIR EXT JP18 MCLK2 DIR EXT (2-2) Master mode MCLK must be Asahi Kasei Microsystems
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AKD4122 74HC14 input and output circuit diagram rx2 1116 dsp-329 KM071100
Abstract: .21 3.10 MODE/BOOT-Funktion: JP17, JP18 und JP19 .22 4 Jumperplanskizzen , 21 Basisplatine für CAN- / mini- / microMODULe 3.10 MODE/BOOT-Funktion: JP17, JP18 und JP19 Mit Jumper JP17, JP18 und JP19 wird die MODE / BOOT-Funktion der verschiedenen Module aktiviert. Mit geschlossenen Jumpern JP17 und JP18 werden die Modulpins fest auf GND gelegt, bei offenen Jumpern sind diese , (zweireihige Stiftleiste) X1B = PIN 35 (zweireihige Stiftleiste) JP18 geschlossen /BOOT 166 = 0 offen PHYTEC
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Funkamateur JP15 phytec Basisplatine RS-232 RS-485 L-084 D-55135 L-084-06
Abstract: 64fs 32fs 16fs DIT BCLK (32fs/64fs)AK5701BCKO1-0 bit JP12 (1-3) LRCK JP18 JP13 LRCK_SEL , EXTBCLK/ BCLK/ EXT BCLK DIT 64fs 32fs 16fs DIT (2-3) LRCK JP18 JP13 LRCK_SEL , JP19 MCLK_SEL EXT JP11 MKFS 4114 EXT 256fs 512fs 1024fs MCKO LRCK JP18 JP13 , BCLK DIT DIT (3-3) LRCK JP18 JP13 LRCK_SEL LRCK EXT EXT 2fs 1fs EXTLRCK , BCLK EXT EXTBCLK/ BCLK/ BCLK DIT 64fs 32fs 16fs DIT (4-3) LRCK JP18 JP13 -
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AKD5701-A AK5701 24pin-4 JP16 AK5701R AKD5701-AMIC16A/DAK5701 KM076904 AK4114AK5701
Abstract: 64fs 32fs 16fs DIT BCLK (32fs/64fs)AK5700BCKO1-0 bit JP12 (1-3) LRCK JP18 JP13 LRCK_SEL , EXTBCLK/ BCLK/ EXT BCLK DIT 64fs 32fs 16fs DIT (2-3) LRCK JP18 JP13 LRCK_SEL , JP19 MCLK_SEL EXT JP11 MKFS 4114 EXT 256fs 512fs 1024fs MCKO LRCK JP18 JP13 , BCLK DIT DIT (3-3) LRCK JP18 JP13 LRCK_SEL LRCK EXT EXT 2fs 1fs EXTLRCK , BCLK EXT EXTBCLK/ BCLK/ BCLK DIT 64fs 32fs 16fs DIT (4-3) LRCK JP18 JP13 -
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AKD5700-A AK5700 R2-210ka AK5700R AKD5700-AMIC16A/DAK5700 KM087000 AK4114AK5700
Abstract: connection diagram for shunt connection. B JP5 SK1A JP18 R19 SK2A R20 JP17 SK1B R21 , R22 C16 R17 JP4 TP2 V1P C17 a. Attenuation Using Trim Pot (R15) JP18 R19 , PRELIMINARY TECHNICAL DATA EVAL-ADE7757EB JP5 OUTPUT FREQUENCY SELECTION A JP18 R19 SK2A , JP5 SK2A R19 JP18 JP17 R20 R21 SK2B The logic output CF can be directly connected to , A,B JP16 = P JP17 = A JP18 = CLOSED R21 = REMOVED 0.9776 Hz 100 imp/kWhr FREQUENCY Analog Devices
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IEC1036 74HC08 H11L1 energy meter using ade7757 cw15c philips cw20c modified energy meter using ade7757 ade7757 energy meter Philips X7R capacitors cw20c ADE7757 AD780
Abstract: set to the following. JP15 MCLK JP18 BICK_SEL JP21 LRCK_SEL JP19 PHASE JP22 4114 , be set to the following. JP15 MCLK JP18 BICK_SEL JP21 LRCK_SEL JP24 SDTI_SEL JP19 , (DSP). The jumper pins should be set to the following. JP15 MCLK JP18 BICK_SEL JP21 , be set as the following. JP14 EXT JP15 MCLK JP18 BICK_SEL JP21 LRCK_SEL JP24 , the following. JP15 MCLK JP18 BICK_SEL JP21 LRCK_SEL JP19 PHASE JP22 4114 Asahi Kasei Microdevices
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AKD4673-A AK4673 AKD4673 usb optical mouse hp HP 4371 DATASHEET OF pll 4040 KM086000 74AVC8T245 74LVC07
Abstract: Configuration 2 www.ti.com Default Configuration USB1 JP4 JP6 JP5 JP16 JP18 JP20 JP13 , CMOS clock. 5. JP16, JP18, JP19, JP20: ADC clock source selection jumpers. 3 Software , default option. JP16 JP18 JP15 J5 JP17 JP20 JP13 JP19 J16 J8 J4 Figure 12 , Designator Jumper Setting Diagram Onboard CMOS Oscillator JP13, JP19, JP20, JP16, JP18 JP13 (1-2), JP20 (2-3), JP19 (1-2), JP16 (2-3), JP18 (2-3) Dia. 1 (Default Option) External CMOS Texas Instruments
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SLAU377 ADS5292 ISO/TS16949
Abstract: DIT DIT c) Set up jumper pins of LRCK clock JP18 JP13 LRCK_SEL LRCK EXT EXT 2fs , / BCLK/ BCLK DIT 64fs 32fs 16fs DIT c) Set up jumper pins of LRCK clock JP18 JP13 , clock JP18 LRCK_SEL EXT EXT JP13 LRCK EXTLRCK/ LRCK/ LRCK DIT 2fs 1fs DIT Set up , ) Set up jumper pins of LRCK clock JP18 JP13 LRCK_SEL LRCK EXT EXT 2fs 1fs EXTLRCK , up jumper pins of LRCK clock JP18 JP13 LRCK_SEL LRCK EXT EXT 2fs 1fs EXTLRCK/ LRCK Asahi Kasei Microsystems
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74LVC07ANS 2006S
Abstract: .20 3.10 MODE/BOOT-Funktion: JP17, JP18 und JP19 .21 4 , GmbH 2002 L-084d_9 Jumperbelegung 3.10 MODE/BOOT-Funktion: JP17, JP18 und JP19 Mit Jumper JP17, JP18 und JP19 wird die MODE / BOOT-Funktion der verschiedenen Module aktiviert. Mit geschlossenen Jumpern JP17 und JP18 werden die Modulpins fest auf GND gelegt, bei offenen Jumpern sind diese , 35 (zweireihige Stiftleiste) JP18 geschlossen /BOOT 166 = 0 offen (Modul interner Pull-up = 1 PHYTEC
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G100 L084D
Abstract: 8 are GND JP7 - JP18 Jumpers JP7 through JP18 set various functions of the LAN9303. They can , the LED1 low. To illuminated LED2, the LAN9303 will drive the anode of the LED2 high. The JP7 - JP18 , JP17 JP12 & JP18 The following subsections detail the jumper pair settings, their associated strap , PHY Port Address Jumpers Table 2.5 Jumpers - PHY Port Address JUMPER PAIR JP12, JP18 Standard MicroSystems
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EVB9303 male mii connector BHR 10 8- position DIP switch JP8-JP14
Abstract: .21 3.10 MODE/BOOT Function: JP17, JP18 and JP19 .22 4 Jumper Settings for , : JP17, JP18 and JP19 Jumper JP17, JP18 and JP19 activate the MODE/BOOT function of the different module mounted on the Development Board. Closing Jumpers JP17 and JP18 renders GND polarization of the , (dual row connector) JP18 closed /BOOT 166 = 0 open (module internal pull up = 1) module pin , to section MODE/BOOT Function: JP17, JP18 and JP19 for details about MODE configuration © PHYTEC PHYTEC
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D-55129
Abstract: .21 3.10 MODE/BOOT function: JP17, JP18 and JP19 .21 4 Jumper Settings for the , function: JP17, JP18 and JP19 Jumper JP17, JP18 and JP19 activate the MODE/BOOT function of the different module mounted on the Development Board. Closing Jumpers JP17 and JP18 renders GND polarization of the , -084e_9 JP17 closed MODE 16X = 0 open (module internal pull-up = 1) JP18 closed /BOOT 166 = 0 open , MODE/BOOT function: JP17, JP18 and JP19 for details about MODE configuration © PHYTEC Meßtechnik GmbH PHYTEC
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Infineon* bootloader RS485 INTERFACE WITH 8051 DB9 connector pin details miniMODUL 535
Abstract: CMOS clock. 5. JP16, JP18, JP19, JP20: ADC clock source selection jumpers. 3 Software , clock as the default option. JP16 JP18 JP15 J5 JP17 JP20 JP13 JP19 J16 J8 J4 , , JP18 JP13 (1-2), JP20 (2-3), JP19 (1-2), JP16 (2-3), JP18 (2-3) Dia. 1 (Default Option) External CMOS Clock Generator J8, JP19, JP20, JP16, JP20 (2-3), JP19 (2-3), JP16 (2-3), JP18 (2-3) JP18 and Connect CMOS clock generator output at SMA connector J8. Clock Type Single Ended Texas Instruments
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SLAU355A
Abstract: DIT c) Set up jumper pins of LRCK clock JP18 JP13 LRCK_SEL LRCK EXT EXT 2fs 1fs , / BCLK DIT 64fs 32fs 16fs DIT c) Set up jumper pins of LRCK clock JP18 JP13 LRCK_SEL , clock JP18 LRCK_SEL EXT EXT JP13 LRCK EXTLRCK/ LRCK/ LRCK DIT 2fs 1fs DIT Set up , ) Set up jumper pins of LRCK clock JP18 JP13 LRCK_SEL LRCK EXT EXT 2fs 1fs EXTLRCK , c) Set up jumper pins of LRCK clock JP18 JP13 LRCK_SEL LRCK EXT EXT 2fs 1fs Asahi Kasei Microsystems
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rx2 27Mhz J546
Abstract: 2.0 1-2 O X Legend: O = open, X = connect · JP18 ­ Jumper to disconnect the overvoltage , protection. This circuit can be disabled by leaving all OVP jumper positions open. JP18 should still be , PS200 DUT CP1 10 nF C7 C8 LOOPIN 1.27K 1 2 JP18 VREF CTRLOUT CTRLIN VSS , , Schottky, 200 mA/30V, SOT-23 Zetex BAT54TA 1 JP2, JP18, JP19, OVP, VIN Connnector, shorting , , JP18, JP19 Connector, break apart PCB header, straight, 36-pin, 100 mil spacing, 235 mil/100 mil Microchip Technology
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PIC lead acid battery charger lead acid battery charger schematic pic metal film fused resistor 47 NDS9435A ps-207 MBRS340 DS21927A-
Abstract: DIT c) Set up jumper pins of LRCK clock JP18 JP13 LRCK_SEL LRCK EXT EXT 2fs 1fs , / BCLK DIT 64fs 32fs 16fs DIT c) Set up jumper pins of LRCK clock JP18 JP13 LRCK_SEL , clock JP18 LRCK_SEL EXT EXT JP13 LRCK EXTLRCK/ LRCK/ LRCK DIT 2fs 1fs DIT Set up , of LRCK clock JP18 JP13 LRCK_SEL LRCK EXT EXT 2fs 1fs EXTLRCK/ LRCK/ LRCK DIT , pins of LRCK clock JP18 JP13 LRCK_SEL LRCK EXT EXT 2fs 1fs EXTLRCK/ LRCK/ LRCK Asahi Kasei Microsystems
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1AK5 KM07 KM076903
Abstract: pins should be set as follows. JP15 MCLK JP18 BICK_SEL DIR EXT DIR JP19 PHASE 4040 , JP18 BICK_SEL DIR EXT DIR 4040 JP19 PHASE THR INV JP21 LRCK_SEL JP24 , JP18 BICK_SEL DIR EXT DIR 4040 JP19 PHASE THR INV JP21 LRCK_SEL JP24 , set as follows. JP14 EXT JP15 MCLK JP18 BICK_SEL DIR EXT DIR 4040 JP19 PHASE , as follows. JP14 EXT JP15 MCLK JP18 BICK_SEL DIR EXT DIR 4040 JP19 PHASE THR Asahi Kasei Microdevices
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AKD4953-A AK4953 4953b mas 6 rca r38104 AK4118 AK4118A KM101802
Abstract: : · Media type ­ Coaxial/Dipulse (JP4 installed / JP5 ­ JP18 ­ open) · 32K RAM at 0000-7FFFhex , INSTALLED INSTALLED NOT INSTALLED Coaxial Interface JP4 JP5 ­ JP18 JP11 JP9 ­ JP23 Twisted Pair JP4, JP13, JP14 JP5 ­ JP12, JP15 JP11, JP16 ­ JP17 JP9 ­ JP15 Interface (Dipulse) ­ JP18 JP18 ­ JP23 Direct RS-485 JP5, JP9, JP10 JP4, JP6 ­ JP8, JP9, JP12 ­ JP13 JP10 ­ JP11, JP11 ­ JP18 JP14 ­ JP23 Isolated RS-485 JP6, JP11, JP12 JP4 ­ JP5, JP7 ­ JP10, JP14, JP15 JP9, JP11 ­ JP13, JP10, JP13 ­ JP18 Standard MicroSystems
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EVB-20051 COM20051 rj11 to db9 pinout 75als176b 75als176 SW20051 RJ11 to RS-485 pinout data
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