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ADS42JB49SEK Texas Instruments ADS42JB49EVM plus JESD204B Translation card visit Texas Instruments
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ISLA224S25IR1Z Intersil Corporation Dual 14-Bit, 250MSPS JESD204B High Speed Serial Output ADC; QFN48; Temp Range: -40° to 85°C visit Intersil Buy
ISLA216S25IR1Z Intersil Corporation 16-Bit, 250MSPS JESD204B High Speed Serial Output ADC; QFN48; Temp Range: -40° to 85°C visit Intersil Buy
ISLA216S20IR1Z Intersil Corporation 16-Bit, 200MSPS JESD204B High Speed Serial Output ADC; QFN48; Temp Range: -40° to 85°C visit Intersil Buy
ISLA224S20IR1Z Intersil Corporation Dual 14-Bit, 200MSPS JESD204B High Speed Serial Output ADC; QFN48; Temp Range: -40° to 85°C visit Intersil Buy

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Part : JESD-204A-E3-U Supplier : Lattice Semiconductor Manufacturer : Symmetry Electronics Stock : - Best Price : $1,057.0900 Price Each : $1,057.0900
Part : JESD-204A-E3-UT Supplier : Lattice Semiconductor Manufacturer : Symmetry Electronics Stock : - Best Price : $3,170.0501 Price Each : $3,170.0501
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JESD204A/JESD204B

Catalog Datasheet MFG & Type PDF Document Tags

HLQFN56R

Abstract: 0819H JESD204A/JESD204B standard specifies that both the receiver and the transmitter must be provided by the , 100 RECEIVER CMLAN/CLMBN + 12 mA to 26 mA OGND Fig 35. JESD204A/JESD204B serial output - , mA Fig 36. JESD204A/JESD204B serial output - AC-coupled 11.3.2 JESD204A/JESD204B serializer 11.3.2.1 Digital JESD204A/JESD204B formatter The block placed after the ADC1443D cores is used to implement all functionalities of the JESD204A/JESD204B standard. This ensures signal integrity and guarantees
Integrated Device Technology
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HLQFN56R 0819H sot935 JESD204B- JESD204A/B
Abstract: -bit Analog-to-Digital Converter (ADC) with JESD204B interface (which is backward compatible with the JESD204A interface , outputs 11.3 Digital outputs 11.3.1 Digital output buffers The JESD204A/JESD204B standard specifies , + 12 mA to 26 mA OGND Fig 38. JESD204A/JESD204B serial output - DC-coupled VDDO 50 Ω CMLAP/CLMBP 10 nF CMLAN/CLMBN 10 nF + 12 mA to 26 mA Fig 39. JESD204A/JESD204B serial output - AC-coupled 11.3.2 JESD204A/JESD204B serializer 11.3.2.1 Digital JESD204A/JESD204B formatter Integrated Device Technology
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Abstract: -bit ADC; 125, 160 or 200 Msps; JESD204A/B serial outputs  Two JESD204B serial output lanes, up to 5 , JESD204A/JESD204B standard specifies that both the receiver and the transmitter must be provided by the , CMLNA/CLMNB - + 12 mA to 26 mA OGND aaa-000420 Fig 33. JESD204A/JESD204B serial output - , mA aaa-000421 Fig 34. JESD204A/JESD204B serial output - AC-coupled 11.3.2 JESD204A/JESD204B serializer 11.3.2.1 Digital JESD204A/JESD204B formatter The block placed after the ADC cores is used to NXP Semiconductors
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JESD204A/JESD204B

adc1443d160

Abstract: HLQFN56 -bit Analog-to-Digital Converter (ADC) with JESD204B interface (backward compatible JESD204A) optimized for high dynamic , Digital output buffers The JESD204A/JESD204B standard specifies that both the receiver and the , $ DDD Fig 36. JESD204A/JESD204B serial output - AC-coupled 11.3.2 JESD204A/JESD204B serializer 11.3.2.1 Digital JESD204A/JESD204B formatter The block placed after the ADC cores is used to implement all functionalities of the JESD204A/JESD204B standard. This ensures signal integrity and guarantees the clock and the
Integrated Device Technology
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adc1443d160 HLQFN56
Abstract: -bit Analog-to-Digital Converter (ADC) with JESD204B interface (which is backward compatible with the JESD204A interface , JESD204A/JESD204B standard specifies that both the receiver and the transmitter must share the same supply , Ω RECEIVER CMLAN/CLMBN - + 12 mA to 26 mA OGND Fig 38. JESD204A/JESD204B serial , Fig 39. JESD204A/JESD204B serial output - AC-coupled 11.3.2 JESD204A/JESD204B serializer 11.3.2.1 Digital JESD204A/JESD204B formatter The block placed after the ADC1443D cores implements all the JESD204A Integrated Device Technology
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SD204A/JESD204B
Abstract: -bit Analog-to-Digital Converter (ADC) with JESD204B interface (which is backward compatible with the JESD204A interface , buffers The JESD204A/JESD204B standard specifies that both the receiver and the transmitter must be , RECEIVER 100 RECEIVER CMLAN/CLMBN - + 12 mA to 26 mA OGND Fig 39. JESD204A/JESD204B , mA Fig 40. JESD204A/JESD204B serial output - AC-coupled 11.3.2 JESD204A/JESD204B serializer 11.3.2.1 Digital JESD204A/JESD204B formatter The block placed after the ADC1443D cores is used to Integrated Device Technology
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JESD204

adc1443d160

Abstract: ADC1443D200 11.3 Digital outputs 11.3.1 Digital output buffers The JESD204A/JESD204B standard specifies that both , -000420 Fig 33. JESD204A/JESD204B serial output - DC-coupled VDDO 50 CMLPA/CLMPB 10 nF CMLNA/CLMNB 10 nF 100 RECEIVER + 12 mA to 26 mA aaa-000421 Fig 34. JESD204A/JESD204B serial output - AC-coupled 11.3.2 JESD204A/JESD204B serializer 11.3.2.1 Digital JESD204A/JESD204B , Mx(N'xS) bits Fig 35. General overview of the JESD204A/JESD204B serializer ADC_MODE[1:0
NXP Semiconductors
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ADC1443D200
Abstract: Digital outputs 11.3.1 Digital output buffers The JESD204A/JESD204B standard specifies that both the , mA to 26 mA OGND Fig 35. JESD204A/JESD204B serial output - DC-coupled VDDO 50 CMLAP/CLMBP 10 nF CMLAN/CLMBN 10 nF + 12 mA to 26 mA Fig 36. JESD204A/JESD204B serial output - AC-coupled 11.3.2 JESD204A/JESD204B serializer 11.3.2.1 Digital JESD204A/JESD204B formatter The block placed after the ADC1443D cores is used to implement all functionalities of the JESD204A/JESD204B Integrated Device Technology
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Abstract: JESD204A/JESD204B standard specifies that both the receiver and the transmitter must be provided by the , © RECEIVER CMLNA/CLMNB - + 12 mA to 26 mA OGND aaa-000420 Fig 33. JESD204A/JESD204B serial , + 12 mA to 26 mA aaa-000421 Fig 34. JESD204A/JESD204B serial output - AC-coupled 11.3.2 JESD204A/JESD204B serializer 11.3.2.1 Digital JESD204A/JESD204B formatter The block placed after the ADC cores is used to implement all functionalities of the JESD204A/JESD204B standard. This ensures NXP Semiconductors
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Abstract: JESD204 JESD204A JESD204B JEDEC specification release (year) 2006 2008 2011 Maximum , JESD204A JESD204B Support for multi-device synchronization? no yes yes Support for , Merits of JESD204B for medical imaging systems Rev. 1 â'" 27 October 2011 White paper , aaa-001195 Merits of JESD204B NXP Semiconductors for medical imaging systems 1. Introduction This white paper focuses on the merits of the JEDEC JESD204B digital interface for medical image NXP Semiconductors
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Abstract: FPGA â'¢ LVDS DDR, LVCMOS, JESD204A, JESD204B digital interfaces DAC1201D125 , DAC1658D1G5 â'¢ LVDS DDR, LVCMOS, JESD204A, JESD204B digital interfaces DAC1405D650-DB , theJEDEC JESD204A and JESD204B digital interfaces, both of which are based on high-speed SerDes , Available with three different data interfaces (including JESD204A/JESD204B), our high-speed ADC/DAC , ADC/DAC Selection Guide The commercial and technical merits of JESD204A and JESD204B high-speed Integrated Device Technology
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DAC1001D125 DAC1001D125-DB DAC1003D160 DAC1003D160-DB DAC1005D650-DB DAC1005D650
Abstract: different data interfaces (including JESD204A/JESD204B), our high-speed ADC/DAC solutions deliver , } #7; ptional input buffer O } #7; VDS DDR, LVCMOS, JESD204A, JESD204B digital interfaces L } #7; ow , : 125 Msps to 1.25 Gsps S } #7; upply voltages: 1.8 / 3.3 V S } #7; VDS DDR, LVCMOS, JESD204A, JESD204B , variety of digital interfaces, including JESD204A compliant CGVâ"¢ and JESD204B compliant CGVxpressâ , the JEDEC JESD204A and JESD204B digital interfaces, both of which are based on highspeed SerDes NXP Semiconductors
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HSDC-EXTMOD01/DB HSDC-EXTMOD02A/DB DAC1627D DAC1617D DAC1427D ADC1X43D

how dsp is used in radar

Abstract: JESD204 JESD204A JESD204B[1] JEDEC specification release 2006 2008 2011 Maximum lane rate (Gbit/s , JESD204A for wireless base station and radar systems November 2010 Maury Wood- NXP Semiconductors , . JESD204A for wireless base station and radar systems 2.0 Trends in FPGAs and high speed data converters (SERDES-based interfaces, JESD204A) The current generation of FPGAs offer enormous DSP performance, far beyond , . 3.0 Merits of JESD204A in beam steering system designs ­ rate, reach, interoperability Fortunately
NXP Semiconductors
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how dsp is used in radar Application of dsp in radar nxp proximity antenna design beam steering Altera Stratix V DAC1408D

JESD204B

Abstract: JESD204 (2006) versus JESD204A (2008) A third revision of the specification, JESD204B, has been , JESD204 JESD204A JESD204B JEDEC specification release 2006 2008 2011 Maximum lane , . Like JESD204A, 8B/10B is the coding scheme for JESD204B. Generally speaking, more efficient coders , JEDEC JESD204B An early look at the third-generation high speed serial interface for data , ) Maury Wood â'" NXP Semiconductors, JEDEC JESD204B task group Chairman, Caen, France; Luc Giovacchini â
NXP Semiconductors
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I-5-01 I5-01 OIF-CEI-02
Abstract: . Like JESD204A, 8B/10B is the coding scheme for JESD204B. Generally speaking, more efficient coders , JESD204B PHY Layer Compliance Test Rev. 1 â'" 31 May 2012 White paper Document information , Applications Engineer, Agilent Technologies JESD204B PHY Layer Compliance Test NXP Semiconductors and , with 10 Gbps JESD204B serial interfaces will be introduced to the market. 10 Gbps per differential lane is nearly twice the bandwidth of the legacy LVDS DDR parallel interface that JESD204B makes NXP Semiconductors
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TR-35-2004 R2009
Abstract: , Inc. IDEA IN BRIEF The JESD204A/JESD204B industry standard for serial interfaces was developed to , Using JESD204A/JESD204B Interfacing (Source: Xilinx) THE APPLICATIONS DRIVING THE NEED FOR JESD204B , . Figure 1 shows typical high speed converter-to-FPGA interconnect configurations using JESD204A/JESD204B , 2006 JESD204A 2008 JESD204B 2011 1.0 Gbps No No 3.125 Gbps No No 3.125 Gbps , products that combine our cutting edge data converter technology along with the JESD204A/JESD204B Analog Devices
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MS-2374 MS-2304 MS-2442 MS-2448 MS-2433 MS-2447
Abstract: ™ºç"しますã'' JESD204A と JESD204B ã'µãƒã'¯ãƒ©ã'¹ 0 のã'·ã'¹ãƒãƒ ã§ã¯ã'å¤‰å'•é 延はè'ƒæ , JESD204B のã'µãƒã'¯ãƒ©ã'¹ (ãƒ' ーム1): JESD204B ã'µãƒã'¯ãƒ© ã'¹ã¨ãƒ‡ã'¿ãƒ¼ãƒãƒ'ã'¹ãƒã'£ãƒƒã'¯ãƒ» レーãƒãƒ³ã'·ãƒ¼ã®ç´¹ä»' 2 æ¦'要 JESD204B 規格ではã'ãƒ‡ã'¿ãƒ¼ãƒãƒ'ã'¹ãƒã'£ãƒƒã'¯ãƒ»ãƒ¬ãƒ¼ãƒãƒ³ã'·ã , ®æ¦'念はã'Œãƒ‡ã'¿ãƒ¼ãƒãƒ'ã'¹ãƒã'£ãƒƒã'¯ãƒ»ãƒ¬ãƒ¼ãƒ ンã'·ãƒ¼Deterministic Latencyã'とå'¼ã°ã'Œã'ã"の要æ±'に対すã''規定 ã'' JESD204B , •ã'Œã¾ã—ãã''ã'µãƒã'¯ãƒ©ã'¹ 0 は JESD204A 規格との 後æ¹äº'換æ'§ã''目çš"としãã''ã Analog Devices
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MS-2672

JESD204

Abstract: JESD204B ® LogiCORETM IP JESD204 core implements a JESD204A or JESD204B interface supporting a line rate of up to 6.25 , 0 0 0 0 Features · · · · · · · · · · · Designed to JEDEC JESD204A [Ref 1] and JESD204B [Ref 2 , JEDEC JESD204A Specification 2008 [Ref 1]and the JEDEC JESD204B Specification 2011 [Ref 2]. Figure 1 and , in Xilinx documentation, see: www.xilinx.com/company/terms.htm. 1. 2. 3. JEDEC JESD204A April, 2008 JEDEC JESD204B July, 2011 Xilinx AXI Reference Guide (UG761) DS814 April 24, 2012 Product
Xilinx
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ARM1176JZ-S axi wrapper LogiCore JESD-204B RAM36

axi wrapper

Abstract: JESD204B Xilinx® LogiCORETM IP JESD204 core implements a JESD204A or JESD204B interface supporting a line rate of , Resources Features · · · · · · · · · · Designed to JEDEC JESD204A [Ref 1] and JESD204B [Ref 3] Supports , , go to http://www.jedec.org 1. 2. 3. JEDEC JESD204A April, 2008 Xilinx AXI User Guide JEDEC JESD204B , logic devices. The JESD204 interface is specified in the JEDEC JESD204A Specification 2008 [Ref 1]and the JEDEC JESD204B Specification 2011 available from www.jedec.com [Ref 3]. Applications X-Ref
Xilinx
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xilinx kintex
Abstract: converters with the JEDEC JESD204A and JESD204B compliant digital interfaces, both of which are based on , implementation of JESD204A as Convertisseur Grande Vitesse (CGV), and denotes its implementation of JESD204B as , NXPâ'™s CGVxpressâ"¢ implementation of the JEDEC JESD204B digital interface provides higher bandwidth , revision of this interface standard JESD204A, released in 2008. LVDS DDR. This portfolio brings , Chairman) to the latest revision JESD204B standard, released in 2011. JESD204B includes three major NXP Semiconductors
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ADC1443D160WO/DB ADC1443D125WO/DB ADC1443D125 ADC1443D200W1/DB ADC1443D160W1/DB ADC1443D125W1/DB
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