NEW DATABASE - 350 MILLION DATASHEETS FROM 8500 MANUFACTURERS
NEW DATABASE - 350 MILLION DATASHEETS FROM 8500 MANUFACTURERS
| Part | Manufacturer | Description | Type | Ordering |
| IMP16C550 | IMP, Inc. | FIFO UART |
2 pages, |
Original |  |
|
|||||
| IMP16C550AD | International Microelectronic Products | UART,CMOS,DIP,40PIN,PLASTIC |
27 pages, |
Scan | |
|
|||||
| IMP16C550AP | International Microelectronic Products | UART,CMOS,LDCC,44PIN,PLASTIC |
27 pages, |
Scan | |
|
|||||
| Catalog Datasheet Results | Type | Document Tags |
| Abstract: IMP16C550 Data Communications Universal Asynchronous Receiver/Transmitter (UART)with 16-BYTE 16-BYTE , IMP16C550 Universal Asynchronous Receiver Transmitter (UART) is a CMOS-VLSI communication device in a , start bit detection Complete status reporting capabilities 40-PIN 40-PIN DIP 1 N.C. IMP16C550 MR , 28 A0 IMP16C550 44-PIN 44-PIN PLCC 408-432-9100/www.impweb.com 21 22 23 N.C. DDIS · , 48-PIN 48-PIN TQFP © 2002 IMP, Inc. IMP16C550 Description The IMP16C550 is an enhanced version of the ... | Original |
33 pages, |
IMP16C550 IMP16C450 imp dms the av 48-PIN 44-PIN 16-BYTE IMP16C550 abstract |
|
|||
| Abstract: IMP16C550 Data Communications Universal Asynchronous Receiver/Transmitter (UART)with 16-BYTE 16-BYTE , IMP16C550 Universal Asynchronous Receiver Transmitter (UART) is a CMOS-VLSI communication device in a , start bit detection Complete status reporting capabilities 40-PIN 40-PIN DIP 1 N.C. IMP16C550 MR , 28 A0 IMP16C550 44-PIN 44-PIN PLCC www.ds-imp.com.cn 21 22 23 N.C. DDIS · TXRDY , 48-PIN 48-PIN TQFP Daily Silver IMP IMP16C550 Description The IMP16C550 is an enhanced version of the ... | Original |
33 pages, |
sim 300 modem datasheet IMP16C450 80284 48-PIN 44-PIN 16-BYTE IMP16C550 IMP16C550 abstract |
|
|||
| Abstract: clock rates from 50Hz to 1.5MHz. The IMP16C554 IMP16C554 is an improved version of the IMP16C550 UART with , : When IMP16C554 IMP16C554 is in IMP16C550 mode (FCR bit-0=1,FCR bit-3=1) the TXRDY* pin will become high , empty. Receive operation in mode "0": When IMP16C554 IMP16C554 is in IMP16C550 mode (FCR bit-0=1,FCR bit-3=1 ... | Original |
21 pages, |
uart WITH FIFO 68pin IMP16C554 IMP16C550 IMP16C450 68-PIN 16C554 460.8kHz IMP16C554 abstract |
|
|||
| Abstract: clock rates from 50Hz to 1.5MHz. The IMP16C554 IMP16C554 is an improved version of the IMP16C550 UART with , receiver. Transmit operation in mode "1": When IMP16C554 IMP16C554 is in IMP16C550 mode (FCR bit-0=1,FCR bit-3=1 , IMP16C550 mode (FCR bit-0=1,FCR bit-3=1) and the trigger level or the timeout has been reached, the RXRDY ... | Original |
20 pages, |
uart WITH FIFO 68pin IMP16C554 IMP16C450 68-PIN 16C554 IMP16C550 IMP16C554 abstract |
|
|||
| Abstract: : UARTS IMP Part # IMP16C450-CP40 IMP16C450-CP40 IMP16C450-CJ44 IMP16C450-CJ44 IMP16C550-CJ44 IMP16C550-A48 IMP16C552-CJ68 IMP16C552-CJ68 ... | Original |
7 pages, |
15uA UC38C43D tps2041 sot23 TPS2041 Cross Reference TI Cross Reference Search ST16C552 MCP130-450 maxim cross reference LP2985 MAX708CSA T imp707esa IMP16C450 ADM809RAR datasheet abstract |
|
|||
| Abstract: IMP16C550A Universal Asynchronous Receiver/Transmitter with FIFOs General Description The IMP16C550A UART , transfer between a parallel CPU and a serial peripheral device (MODEM). The IMP16C550A provides this , powerup, the IMP16C550A supports a FIFO mode which provides access to 16 bytes of data Storage in internai , IMP16C550A has a 16x internai clock to syn-chronize transmitter logie and the receiver logie. The clock is , density CMOS process to provide high performance with low power requirements. The IMP16C550A is available ... | OCR Scan |
27 pages, |
F75-37 IMP16C550A IMP16450 F75-37 abstract |
|
|||
| Abstract: The IMP16C552 IMP16C552 is an enhanced dual channel version of the IMP16C550A Universal 2 Asynchronous ... | Original |
35 pages, |
sim 300 modem datasheet marking code CJ6 IMP16C450 80MHZ 16C552 16-BYTE IMP16C552 IMP16C552 abstract |
|
|||
| Abstract: 80MHZ 80MHZ General Description The IMP16C552 IMP16C552 is an enhanced dual channel version of the IMP16C550A ... | Original |
34 pages, |
IMP16C552 IMP16C450 80MHZ 16-BYTE 16C552 IMP16C552 abstract |
|
|||
| Abstract: IMP16C550A Universal Asynchronous Receiver/Transmitter with FIFOs General Description The IMP16C550A UART , transfer between a parallel CPU and a serial peripheral device (MODEM). The IMP16C550A provides this , powerup, the IMP16C550A supports a FIFO mode which provides access to 16 bytes of data storage in internal , IMP16C550A has a 16x internal clock to synchronize transmitter logic and the receiver logic. The clock is , high density CMOS process to provide high performance with low power requirements. The IMP16C550A is ... | OCR Scan |
27 pages, |
NS32016 16450 UART X55X dp74038 d5148 NS32201 7S-57-05 IMP16C550A IMP16450 7S-57-05 abstract |
|
|||
| Part | Manufacturer | Description | Shortform Datasheet | Ordering |
| IMP16C550AD | International Microelectronic Products | UART-USART Circuit - UART W/16-Byte On Chip FIFO | |
|
| IMP16C550AP | International Microelectronic Products | UART-USART Circuit - UART W/16-Byte On Chip FIFO | |