NEW DATABASE - 350 MILLION DATASHEETS FROM 8500 MANUFACTURERS
NEW DATABASE - 350 MILLION DATASHEETS FROM 8500 MANUFACTURERS
| Catalog Datasheet Results | Type | Document Tags |
| Abstract: AD111 CIP 8D Decoder INSTALLATION 2.5 IBM USB POS 2.6 2 WEDGE CONNECTION 5 2 6 GRYPHONTM Dx30/Mx30 , later) Mac OS 8.0 (and later) IBM POS for Windows 4690 Operating System USB Start-up As with , . 4 IBM USB POS. 5 WEDGE Connection , . 46 Caps Lock Auto-Recognition (IBM AT compatible only). 46 Num ... | Original |
197 pages, |
PDF417 MX30 M130 D130 "USB connector" datalogic datasheet abstract |
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| Abstract: , delivered at wire speed The IBM PowerNPTM NP4GS3 network processor is an advanced, robust, programmable, high-performance solution for the most demanding routing applications. A new high-end member of the IBM PowerNP , advantage of the IBM NP4GS3 in their product designs can benefit from leadership semiconductor technologies and proven network experience. IBM offers a rich suite of hardware and software enablement , aggregate processing capability · Embedded IBM PowerPC ® processor providing additional design ... | Original |
2 pages, |
NP4GS3-based IBM processor datasheet IBM processor IBM POS 8B/10B 8B/10B abstract |
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| Abstract: of his design: Board I.D., Chip Select Ranges, POS register control for address remapping, and POS I , program the EPB2001 EPB2001. RECOMMENDED HARDWARE CONFIGURATION IBM PC-XT/AT (or Compatible) EGA, CGA or , Documentation. Chip Select. Chip Select controls POS I/O connections Design Design JEDEC file Figure 3. POS I/O Connections I POS Ni: AUG | Fffi 17654321 lb 6 'I I I I I I I l'i I POS rat: SIM I POS BT I POS S IK! I 1 «h 6 5 J 3 Z I »I -POSto 2 -POSIo 3 >Sio 1 â- Sto 9 -postola -Postoli ... | OCR Scan |
1 pages, |
IBM POS Hercules Graphics Card EPB2001 hercules EPB2001 abstract |
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| Abstract: interrupt sharing controller, Programmable Option Select Logic, an IBM compatible timer, and glue logic into , performance Model 50/60 compatible system. Features 100% hardware and software compatible with IBM PS/2 Model 50/60 100% implementation of Programmable Option Select (POS) logic 100% implementation of Model 50/60 compatible system control registers Two IBM compatible interrupt controllers IBM compatible ... | OCR Scan |
2 pages, |
CS8042 buffer 74LS245 74LS245 8042 8042 "Keyboard Controller" address 8042 controller IBM POS 80287 "Keyboard Controller" 74LS245 buffer 8042 keyboard 8042 Keyboard Controller logic diagram of 74LS245 datasheet abstract |
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| Abstract: sharing controller, Programmable Option Select Logic, an IBM compatible timer, and glue logic into a , Model 50/60 compatible system. Features 100% hardware and software compatible with IBM PS/2 Model 50/60 100% implementation of Programmable Option Select (POS) logic 100% implementation of Model 50/60 compatible system control registers Two IBM compatible interrupt controllers IBM compatible system timer ... | OCR Scan |
2 pages, |
74LS245 8042 keyboard 8042 "Keyboard Controller" 8042 Keyboard Controller datasheet abstract |
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| Abstract: IBM. Both chips are available in either a 68-pin plastic leadless chip carrier or an 80-pin plastic flat package. Features • Implements 100% IBM PS/2 compatible Micro Channel Adapters • 82C611 82C611 , DMA slave arbitration functions • Programmable option Select (POS) support including: o Adapter ID support o Flexible I/O and memory relocation support O POS Port decode logic and handshaking • Full , 82C611 82C611 and 82C612 82C612 MicroCHIPS Micro Channel Interface • Meets all IBM specified timing and drive ... | OCR Scan |
2 pages, |
IBM block diagram 82C612 82C611 82C611 abstract |
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| Abstract: IBM. Both chips are available in either a 68-pin plastic leadless chip carrier or an 80-pin plastic flat package. Features • Implements 100% IBM PS/2 compatible Micro Channel Adapters • 82C611 82C611 , DMA slave arbitration functions • Programmable option Select (POS) support including: o Adapter ID support o Flexible I/O and memory relocation support O POS Port decode logic and handshaking • Full , Channel Interface • Meets all IBM specified timing and drive specifications • Simplifies migration of XT ... | OCR Scan |
2 pages, |
IBM POS 82C612 82C611 82C611 abstract |
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| Abstract: Pos. 512-5800. 231648-1. 4 and 6 Pos. Line Cord EACH 27.74 1-24 25-99 100-499 . 512-5805. 231649-1. 4 Pos , .EACH 103.09 512-5812. 2-231652-8. Hand Tool with 4-6 Pos. Die-Line.EACH 129.18 512-5821. 2-231652-1. Hand Tool with 8 Pos. Die-Line .EACH 129.18 Modular T 512-5822. 2-231652-3. Hand Tool with 4 Pos. Die-Handset EACH 129.18 elephone Keystone Jacks ... | Original |
1 pages, |
ibm blade 5-554170-3 2-231652-8 2-231652-0 flat cable connector 18 pos Receptacle TSB-40A TSB-40A abstract |
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| Abstract: GPIB Interfaces for IBM Computers and Workstations MC-GPIB, GPIB-RS/6000 GPIB-RS/6000 MC-GPIB and GPIB-RS/6000 GPIB-RS/6000 Features NAT4882 NAT4882 ASIC Completely IEEE 488.2 compatible Compatible with NEC uPD7210 uPD7210 , and unpacking in hardware Transfer rate More than 1 Mbytes/s PS/2 POS circuitry for automatic , Channel, IBM RS/6000 RS/6000 Micro Channel Intel x86, Power RISC Overview NI-488 NI-488.2 Software Windows 3.1 , high-performance IEEE 488 interfaces for IBM PS/2 and compatible computers and IBM RISC System/6000 workstations ... | Original |
1 pages, |
PD7210 NAT4882 gp-ib cable GPIB-RS/6000 GPIB-RS/6000 abstract |
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| Abstract: GPIB Interfaces for IBM Computers and Workstations MC-GPIB, GPIB-RS/6000 GPIB-RS/6000 MC-GPIB, GPIB-RS/6000 GPIB-RS/6000 NAT4882 NAT4882 ASIC Completely IEEE 488.2 compatible Compatible with NEC uPD7210 uPD7210 controller chip Additional , Transfer rate More than 1 Mbytes/s PS/2 POS circuitry for automatic selection of I/O address, interrupt , IBM PS/2 and compatible computers and IBM RISC System/6000 workstations that have 16-bit Micro , Instrument Control Computer/Bus PS/2 Micro Channel, IBM RS/6000 RS/6000 Micro Channel NI-488 NI-488.2M Software ... | Original |
1 pages, |
PD7210 NI-488 NAT4882 gp-ib cable GPIB-RS/6000 GPIB-RS/6000 abstract |
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| Abstract | Saved from | Date Saved | File Size | Type | Download |
| Over 1.1 million files (1986-2013): html articles, reference designs, gerber files, chemical content, spice models, programs, code, pricing, images, circuits, parametric data, RoHS data, cross references, pcns, military data, and more. Please note that due to their age, these files do not always format correctly in modern browsers. Disclaimer. |
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| # Makefile for OS/2. Assumes IBM's compiler, static linking, and a single thread. # Adding " /Fegctest test.obj gc.lib cord\cordbscs.obj: cord\cordbscs.c include\cord.h include\private\cord_pos \cord.h include\private\cord_pos.h include\ec.h $(CC) $(CFLAGS) /C /Focord\cordxtra cord\cordxtra.c cord\cordprnt.obj: cord\cordprnt.c include\cord.h include\private\cord_pos.h include\ec.h $(CC) $(CFLAGS) /C /Focord\cordprnt cord\cordprnt.c cord\cordtest.exe: cord\cordtest.c include\cord.h include\private\cord_pos www.datasheetarchive.com/download/79262054-393174ZC/mplabc30v2_05.tgz |
Microchip | 09/11/2006 | 27045.95 Kb | TGZ | mplabc30v2_05.tgz |
| ) { // TODO: Optimize this in the case in.hasArray() / out.hasArray() int inPos = 0; try Result.OVERFLOW; out.put (char) b1); inPos+; break .put (c); inPos += 2; break; case 0x ); out.put (c); inPos += 3; break; default to the value it already has. in.position (inPos); } } private static www.datasheetarchive.com/download/79262054-393174ZC/mplabc30v2_05.tgz |
Microchip | 09/11/2006 | 27045.95 Kb | TGZ | mplabc30v2_05.tgz |
| + (COBOL_Character'Pos (K) - COBOL_Character'Pos (COBOL + (COBOL_Character'Pos (K) - COBOL_Character'Pos (COBOL + (COBOL_Character'Pos (K) - COBOL_Character'Pos (COBOL ; case Packed_Representation is when IBM => for J in Item'First . Item'Last - 1 _Character'Val (COBOL_Character'Pos (COBOL_Digits'First) + Integer www.datasheetarchive.com/download/79262054-393174ZC/mplabc30v2_05.tgz |
Microchip | 09/11/2006 | 27045.95 Kb | TGZ | mplabc30v2_05.tgz |
| */ /*-+ */ /* * This source code has been made available to you by IBM on an AS-IS * basis. Anyone receiving this source is licensed under IBM * copyrights to use it in any way he or she deems fit, including * copying license under IBM patents or * patent applications is to be implied by the copyright license. * * Any user of this software should understand that IBM cannot provide * technical support for this software person who transfers this source code or any derivative work * must include the IBM copyright notice www.datasheetarchive.com/download/49104857-995987ZC/xapp542.zip (serial.c) |
Xilinx | 11/11/2004 | 9180.01 Kb | ZIP | xapp542.zip |
| Micro Industries AMD 486DX5-133 486DX5-133 486DX5-133 486DX5-133 with 16K L1 Cache Compact Size POS51 Unicorn-Computer ZIF Socket for Intel Pentium CPU, MMX; AMD K5/K6/K6-2; IDT C6; IBM/Cyrix 6x86 -Computer ZIF Socket for Intel Pentium CPU, MMX;AMD K5/K6 /K6-2/K6-3;IDT C6; IBM/CYRIX 6x86 Compatible CPUs , AMD K6™-2 and AMD K6™ Cyrix/IBM/SGS 6x86 CPUs, IDT C6 and C6+ CPUs Full Size AP SBC-597 SBC-597 SBC-597 SBC-597 Maxan Intel Pentium MMX 166'266MHz, AMD K6-2 266'350MHz, Cyrix/IBM 6X86MX-PR166 6X86MX-PR166 6X86MX-PR166 6X86MX-PR166 www.datasheetarchive.com/files/digital-logic/drivers/flashdisk/doc2000/manuals/compatibility_list/doccompatibility.asp |
Digital Logic | 23/05/2001 | 186.99 Kb | ASP | doccompatibility.asp |
| save_msr; static CARD8 save_pos102; static CARD8 save_vse; static CARD8 save_46e8; console Console 46e8); save_pos102 = inb(0x102); signal(2,sig_handler); signal(11,sig_handler); outb(0x3C2 ); outb(0x102, ~(CARD8)0x01 & save_pos102); pciVideoDisable(); while (CurrentPci) { CARD16 CARD16 CARD16 CARD16 ax (0x102, save_pos102); outb(0x46e8, save_46e8); outb(0x3C3, save_vse); outb(0x3C2, save .ConfigActiveDevice) { pciVideoDisable(); outb(0x102, save_pos102); outb(0x46e8, save_46e8); outb(0x3C3, save www.datasheetarchive.com/download/49104857-995987ZC/xapp542.zip (main.c) |
Xilinx | 11/11/2004 | 9180.01 Kb | ZIP | xapp542.zip |
| ATM, HDLC, POS, IMA, UTOPIA, and bridges NewLogic GmbH www.newlogic.com Cores for wireless www.datasheetarchive.com/files/xilinx/files/xcell journal articles/yellow/xc_allcore.htm |
Xilinx | 26/04/2004 | 13.17 Kb | HTM | xc_allcore.htm |
| ATM, HDLC, POS, IMA, UTOPIA, and bridges NewLogic GmbH www.newlogic.com Cores for wireless www.datasheetarchive.com/files/xilinx/files/xcell journal articles/xcell_49/xc_allcore.htm |
Xilinx | 19/04/2004 | 13.17 Kb | HTM | xc_allcore.htm |
| . * * = * * Language: ANSI C * Environment: IBM PC (OS/2) * * Description: OS/2 implementation for the Sci _EVT_setMousePos(x,y) www.datasheetarchive.com/download/49104857-995987ZC/xapp542.zip (event.c) |
Xilinx | 11/11/2004 | 9180.01 Kb | ZIP | xapp542.zip |
| for the PC, as described below. This routine uses the IBM-PC standard Parallel port, along with _mask, unsigned char *buff, int data_length) { int i, pos, col, in_pos, in_col, ues_length; unsigned char curch, xch; pos = in_pos = 0; col = in_col = 8; ues ; pos+; } if (ues_mask[pos] >> col) & 0x01) { -in_col; if (in www.datasheetarchive.com/files/lattice/ispcode/source/ispcode3.c |
Lattice | 20/06/1996 | 60.75 Kb | C | ispcode3.c |