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Part Manufacturer Description Datasheet BUY
GLF-466-256-511-D I/O Interconnect ASSEMBLY 6 POSITION 6 CONTACT visit Digikey Buy
GLF-488-258-502-D I/O Interconnect CABLE ASSY 8 POSITION 8 CONTACT visit Digikey Buy
GLF-488-108-501-D I/O Interconnect CORD COIL REVERSED 8-8 BLACK 10' visit Digikey Buy
GLF-444-054-511-D I/O Interconnect CORD COIL DBL END 4-4 BLACK 5' visit Digikey Buy
GLF-464-144-510-D I/O Interconnect ASSEMBLY 6 POSITION 4 CONTACT visit Digikey Buy
GLF-464-144-515-D I/O Interconnect CORD COIL DBL END 6-4 WHITE 14' visit Digikey Buy

I/O0-I/O14

Catalog Datasheet MFG & Type PDF Document Tags
Abstract: A0­A17 I/O0­I/O14 Address Inputs Data Input/Output Data Input/Output, Word Mode (LSB Address Input, Byte , to byte mode I/O0-I/O14 Data Output (I/O0-I/O14) Data Output (I/O0-I/O7) I/O15(A-1) I/O15 Output tFLQZ tELFH Address Input BYTE BYTE Switching from byte to word mode I/O0-I/O14 Data Output (I/O0-I/O7) Address Input tFHQV Data Output (I/O0-I/O14) I/O15 Output I/O15(A-1) BYTE , 51400-02 A16 BYTE GND I/O15(A-1) I/O7 I/O14 I/O6 I/O13 I/O5 I/O12 I/O4 VCC I/O11 I/O3 I/O10 I/O2 I/O9 I Mosel Vitelic
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Abstract: byte mode I/O0­I/O14 Data Output (I/O0­I/O14) Data Output (I/O0­I/O7) I/O15 I/O15 Output tFLQZ tELFH Address Input BYTE BYTE Switching from byte to word mode I/O0­I/O14 Data Output (I/O0­I/O7) Address Input tFHQV Data Output (I/O0­I/O14) I/O15 Output I/O15 BYTE Timings for , 26 25 51002-04 Pin Names A16 BYTE GND I/O15 I/O7 I/O14 I/O6 I/O13 I/O5 I/O12 I/O4 VCC I/O11 I/O3 , detected by DATA Polling of I/O7 or by the Toggle Bit I/O6. The V29C51400T/V29C51400B features a sector Mosel Vitelic
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BIT/524 V29C51400T V29C51400B

kb 3910

Abstract: V29C51400B : 70ns 90: 90ns 12: 120ns T = TSOP 51400-01 Pin Configurations Pin Names A0­A17 I/O0­I/O14 , Data Output (I/O0-I/O7) Data Output (I/O0-I/O14) I/O0-I/O14 Address Input I/O15 Output I/O15(A-1) tFLQZ tELFH BYTE BYTE Switching from byte to word mode I/O0-I/O14 I/O15(A-1) Data Output (I/O0-I/O14) Data Output (I/O0-I/O7) Address Input I/O15 Output , 31 30 29 28 27 26 25 A16 BYTE GND I/O15(A-1) I/O7 I/O14 I/O6 I/O13 I/O5 I/O12 I/O4
Mosel Vitelic
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kb 3910

MC-222253AF9-B85X-BT3

Abstract: MC-222253A-X CIOf tELFL I/O0I/O14 Hi-Z I/O0-I/O14 I/O0-I/O7 Hi-Z tACC I/O15A-1 Hi-Z I/O15 A-1 tFLQZ 18 /CEf tCEf CIOf tELFH I/O0I/O14 I/O15A-1 Hi-Z I/O0-I/O7 A-1 tFHQV 26 M15285JJ2V0DS I/O0-I/O14 Hi-Z I/O15 Hi-Z MC , K A15 NC NC A16 CIOf VSS A11 A12 A13 A14 SA I/O15, A-1 I/O7 I/O14 6 A8 A19 A9 A10 I/O6 5 /WE CE2s A20 8 B C NC NC NC
NEC
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MC-222253A-X MC-222253AF9-B85X-BT3 FBGA12 M15285JJ2V0DS00 I/O15 I/O14
Abstract: /O0-I/O14 Data Out I/O0-I/O14 Data Out I/O0-I/O7 I/O15 (A-1) tBF I/O15 Output Valid , -1) I/O7 I/O14 I/O6 I/O13 I/O5 I/O12 I/O4 VCC A0 to A18 I/O0 to I/O15 /CE /WE /OE /RESET /BYTE VCC , 34 33 32 31 30 29 28 27 26 25 A16 /BYTE GND I/O15 (A-1) I/O7 I/O14 I/O6 I/O13 I/O5 I/O12 I/O4 VCC I , ) (Reverse bent) mPD29F800LGZ-xxxT-MKH mPD29F800LGZ-xxxB-MKH A16 /BYTE GND I/O15 (A-1) I/O7 I/O14 I/O6 I , mPD29F800L is packed in 44-pin SOP and 48-pin TSOP (I) (12 ´ 20 mm). Features · 1,048,576 words by 8 bit NEC
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PD29F800L 16-BIT

PPD29F800L

Abstract: Read Operation /CE /OE /BYTE tCBL/tCBH I/O0-I/O14 Data Out I/O0-I/O14 Data Out I/O0-I , A14 A15 A16 /BYTE GND I/O15 (A-1) I/O7 I/O14 I/O6 I/O13 I/O5 I/O12 I/O4 VCC A0 to A18 I/O0 to I/O15 , A16 /BYTE GND I/O15 (A-1) I/O7 I/O14 I/O6 I/O13 I/O5 I/O12 I/O4 VCC I/O11 I/O3 I/O10 I/O2 I/O9 I/O1 I , ) PPD29F800LGZ-xxxT-MKH PPD29F800LGZ-xxxB-MKH A16 /BYTE GND I/O15 (A-1) I/O7 I/O14 I/O6 I/O13 I/O5 I/O12 I/O4 VCC I/O11 I , PPD29F800L is packed in 44-pin SOP and 48-pin TSOP (I) (12 u 20 mm). Features · 1,048,576 words by 8 bit
NEC
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DL162

Abstract: DL163 G5 A9 A8 A10 A11 I/O7 I/O14 I/O13 A4 B4 C4 D4 E4 F4 G4 , Address Inputs I/O0 - I/O14 I/O15 I/O15 (A-1) 20 Data Inputs/Outputs A-1 A0-A19 Data , controlled by CE and OE . I/O8-I/O14 are tri-stated, and I/O15 pin is used as an input for the LSB(A , bytes of 8 bits each. Word mode data appears on I/O0­I/O15; byte mode data appears on I/O0­I/O7. The , bits: RY/ BY pin, I/O7 ( Data Polling) and I/O6/I/O2 (toggle bits). After a program or erase cycle
AMIC Technology
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DL162 DL163 A29DL16 48TFBGA
Abstract: D5 E5 F5 G5 A9 A8 A10 A11 I/O7 I/O14 I/O13 A4 B4 C4 D4 , . Description A0 â'" A19 Address Inputs I/O0 - I/O14 Data Inputs/Outputs I/O15 I/O15 (A-1) A , controlled by CE and OE . I/O8-I/O14 are tri-stated, and I/O15 pin is used as an input for the LSB(A , Update figure 23 May 17, 2005 0.2 Change speed range (only 70ns), and package type (-I, -U and , ,576 words of 16 bits each or 2,097,152 bytes of 8 bits each. Word mode data appears on I/O0â'"I/O15 AMIC Technology
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Abstract: G5 A9 A8 A10 A11 I/O7 I/O14 I/O13 A4 B4 C4 D4 E4 F4 G4 , '" A19 Address Inputs I/O0 - I/O14 Data Inputs/Outputs I/O15 I/O15 (A-1) A-1 20 , only I/O0-I/O7 are active and controlled by CE and OE . I/O8-I/O14 are tri-stated, and I/O15 pin is , package type (-I, -U and Pb-Free) November 22, 2005 0.3 Change write-pulse spec. (Page 1, 33, 42 , each. Word mode data appears on I/O0â'"I/O15; byte mode data appears on I/O0â'"I/O7. The device is AMIC Technology
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29DL16
Abstract: A11 D4 I/O7 E4 I/O14 F4 I/O13 G4 I/O6 H4 WE A3 RESET B3 NC C3 A19 D3 , /O0 - I/O14 I/O15 I/O15 (A-1) A-1 Description Address Inputs Data Inputs/Outputs Data Input/Output , controlled by CE and OE . I/O8-I/O14 are tri-stated, and I/O15 pin is used as an input for the LSB(A , 16 bits each or 2,097,152 bytes of 8 bits each. Word mode data appears on I/O0­I/O15; byte mode data appears on I/O0­I/O7. The device is designed to be programmed in-system with the standard 3.0 volt VCC AMIC Technology
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Abstract: A29L160AM 1 A18 RESET 32 VSS 31 I/O15 (A-1) 15 30 I/O7 16 29 I/O14 , 22 23 A29L160AV A16 BYTE VSS I/O15 (A-1) I/O7 I/O14 I/O6 I/O13 I/O5 I/O12 I/O4 , E5 F5 G5 H5 A9 A8 A10 A11 I/O 7 I/O14 I/O13 I/O 6 A4 B4 C4 , A19 Address Inputs I/O0 - I/O14 Data Inputs/Outputs I/O15 I/O15 (A-1) A-1 Data , /O8-I/O14 are tri-stated, and I/O15 pin is used as an input for the LSB(A-1) address function AMIC Technology
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A29L160A A29L160AT GB-70

A29L160AUV-70UF

Abstract: A1103-5 /O15 (A-1) 15 30 I/O7 16 29 I/O14 I/O1 17 28 I/O6 I/O9 18 27 , I/O14 I/O6 I/O13 I/O5 I/O12 I/O4 VCC I/O11 I/O3 I/O10 I/O2 I/O9 I/O1 I/O8 I/O0 OE , A11 I/O7 I/O14 I/O13 I/O6 A4 B4 C4 D4 E4 F4 G4 H4 WE RESET , Pin Descriptions Pin No. Description A0 - A19 Address Inputs I/O0 - I/O14 Data Inputs , device is in byte configuration, and only I/O0-I/O7 are active and controlled by CE and OE . I/O8-I/O14
AMIC Technology
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A29L160AUV-70UF A1103-5 29f016 A29L160ATG-70UF A29L160AUG-70
Abstract: I/O7 I/O8 16 29 I/O14 I/O1 17 28 I/O6 I/O9 18 27 I/O13 I/O2 , (A-1) I/O7 I/O14 I/O6 I/O13 I/O5 I/O12 I/O4 VCC I/O11 I/O3 I/O10 I/O2 I/O9 I/O1 I/O8 , -1) VSS A5 B5 C5 D5 E5 F5 G5 H5 A9 A8 A10 A11 I/O 7 I/O14 I , Descriptions Pin No. Description A0 - A19 Address Inputs I/O0 - I/O14 Data Inputs/Outputs I , /O8-I/O14 are tri-stated, and I/O15 pin is used as an input for the LSB(A-1) address function AMIC Technology
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A29L160ATV-70F

Abstract: -1) I/O7 I/O14 I/O6 I/O13 I/O5 I/O12 I/O4 VCC A15 A14 A13 A12 A11 A10 A9 A8 A19 NC WE RESET NC NC RY/BY , 45 44 43 42 41 40 39 38 37 36 35 34 33 32 31 30 29 28 27 26 25 A16 BYTE VSS I/O15 (A-1) I/O7 I/O14 I , A11 D4 I/O 7 E4 I/O14 F4 I/O13 G4 I/O 6 H4 WE A3 RESET B3 NC C3 A19 , Descriptions Pin No. A0 - A19 I/O0 - I/O14 I/O15 I/O15 (A-1) A-1 Description Address Inputs Data Inputs , /O0-I/O7 are active and controlled by CE and OE . I/O8-I/O14 are tri-stated, and I/O15 pin is used as an
AMIC Technology
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A29L160ATV-70F
Abstract: 32 VSS 31 I/O15 (A-1) 15 30 I/O7 16 29 I/O14 I/O1 17 28 I/O6 , A16 BYTE VSS I/O15 (A-1) I/O7 I/O14 I/O6 I/O13 I/O5 I/O12 I/O4 VCC I/O11 I/O3 I/O10 I , A8 A10 A11 I/O 7 I/O14 I/O13 I/O 6 A4 B4 C4 D4 E4 F4 G4 H4 , Cell Matrix Pin Descriptions Pin No. Description A0 - A19 Address Inputs I/O0 - I/O14 , /O8-I/O14 are tri-stated, and I/O15 pin is used as an input for the LSB(A-1) address function AMIC Technology
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A29L160AUV-70F

Abstract: A29L160AUG-70F 16 29 I/O14 I/O1 17 28 I/O6 I/O9 18 27 I/O13 I/O2 19 26 20 25 21 24 22 23 A29L160AV A16 BYTE VSS I/O15 (A-1) I/O7 I/O14 I/O6 I/O13 I , B5 C5 D5 E5 F5 G5 H5 A9 A8 A10 A11 I/O 7 I/O14 I/O13 I/O 6 , . Description A0 - A19 Address Inputs I/O0 - I/O14 Data Inputs/Outputs I/O15 I/O15 (A-1) A , device is in byte configuration, and only I/O0-I/O7 are active and controlled by CE and OE . I/O8-I/O14
AMIC Technology
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A29L160AUV-70F A29L160AUG-70F A29L160AUV-60I
Abstract: /O15 (A-1) 15 30 I/O7 16 29 I/O14 I/O1 17 28 I/O6 I/O9 18 27 , I/O14 I/O6 I/O13 I/O5 I/O12 I/O4 VCC I/O11 I/O3 I/O10 I/O2 I/O9 I/O1 I/O8 I/O0 OE , A11 I/O7 I/O14 I/O13 I/O6 A4 B4 C4 D4 E4 F4 G4 H4 WE RESET , Pin Descriptions Pin No. Description A0 - A19 Address Inputs I/O0 - I/O14 Data Inputs , /O8-I/O14 are tri-stated, and I/O15 pin is used as an input for the LSB(A-1) address function AMIC Technology
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VCCIO11

Abstract: 43 42 41 40 39 38 37 WE A19 A8 A9 A10 A11 A12 A13 A14 A15 A16 BYTE VSS I/O15 (A-1) I/O7 I/O14 I/O6 I , 38 37 36 35 34 33 32 31 30 29 28 27 26 25 A16 BYTE VSS I/O15 (A-1) I/O7 I/O14 I/O6 I/O13 I/O5 I/O12 I , -1) G5 VSS H5 A9 A4 A8 B4 A10 C4 A11 D4 I/O7 E4 I/O14 F4 I/O13 G4 I/O6 , Pin Descriptions Pin No. A0 - A19 I/O0 - I/O14 I/O15 I/O15 (A-1) A-1 Description Address Inputs Data , OE . I/O8-I/O14 are tri-stated, and I/O15 pin is used as an input for the LSB(A-1) address function
AMIC Technology
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VCCIO11

A29160

Abstract: A29160UV 29 I/O14 I/O1 17 28 I/O6 I/O9 18 27 I/O13 I/O2 19 26 20 25 21 24 22 23 A16 BYTE VSS I/O15 (A-1) I/O7 I/O14 I/O6 I/O13 I/O5 I/O12 I/O4 VCC , Pin Descriptions Pin No. Description A0 - A19 Address Inputs I/O0 - I/O14 Data Inputs , device is in byte configuration, and only I/O0-I/O7 are active and controlled by CE and OE . I/O8-I/O14 , sector protection. Package options - 44-pin SOP or 48-pin TSOP (I) or 48-ball TFBGA - All Pb-free
AMIC Technology
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A29160 A29160UV A29160tV-70UF 70uF A29160TV A29160V

A29160TV-70UF

Abstract: A29160TV 42 41 40 39 38 37 WE A19 A8 A9 A10 A11 A12 A13 A14 A15 A16 BYTE VSS I/O15 (A-1) I/O7 I/O14 I/O6 I/O13 , 37 36 35 34 33 32 31 30 29 28 27 26 25 A16 BYTE VSS I/O15 (A-1) I/O7 I/O14 I/O6 I/O13 I/O5 I/O12 I/O4 , Matrix Pin Descriptions Pin No. A0 - A19 I/O0 - I/O14 I/O15 I/O15 (A-1) A-1 Description Address , /O0-I/O7 are active and controlled by CE and OE . I/O8-I/O14 are tri-stated, and I/O15 pin is used as an , (I) or 48-ball TFBGA - All Pb-free (Lead-free) products are RoHS compliant General Description
AMIC Technology
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