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HSTL15

Catalog Datasheet MFG & Type PDF Document Tags

LVCMOS25

Abstract: LVCMOS18 9-6 I/O (mA) HSTL15_I / HSTL15D_1 HSTL18_I / HSTL18D_I SSTL25_I / SSTL25D_I SSTL25_II , DRIVE DRIVE (mA) HSTL15_I / HSTL15D_1 4, 8 8 HSTL18_I / HSTL18D_I 8, 12 12 , HSTL15_I HSTL15D_I SSTL33_I, SSTL33_II SSTL33D_I, SSTL33D_II SSTL25_I, SSTL25_II SSTL25D_I, SSTL25D_II , HSTL18 Class I, II 0.9 - HSTL15 Class I 0.75 - SSTL3 Class I, II 1.5 - , SSTL2 Class I, II - - SSTL3 Class I, II - - HSTL15 Class I - -
Lattice Semiconductor
Original
TN1102 LVCMOS33 LVCMOS25 LVCMOS18 LVCMOS15 SSTL18D isplever VHDL LVDS25E DQS1618PIO1 TN1105 LVDSRSDSBLVDSLVPECLSSTLHSTL9-19-2L

SSTL-15 class I

Abstract: SSTL-15 JESD8-6 (2) (2) 1.8 1.8 2.5 0.90 0.90 HSTL-15 Class I JESD8-6 (2) (2) 1.5 1.5 2.5 0.75 0.75 HSTL-15 Class II JESD8-6 (2) (2) 1.5 - 2.5 , HSTL-15 Class I JESD8-6 (2) (2) 1.5 1.5 2.5 - 0.75 3.0-V PCI-X HardCopy , ) (Pre-Driver Voltage) (Input Ref Voltage) (Board Termination Voltage) Differential HSTL-15 Class , -15 class II, HSTL-15 Class II, HSTL-12 Class II, differential SSTL-15 Class II, differential HSTL-15 Class
Altera
Original
HIV51006-2 SSTL-15 class I JESD8 JESD815 JESD86 JESD8-6 EIA-644 HC4E25WF484N EP4SE230F29 HC4E25FF484N

JESD8-16A

Abstract: JESD8-15 HSTL-18 Class II JESD8-6 (2) (2) 1.8 1.8 2.5 0.90 0.90 HSTL-15 Class I JESD8-6 (2) (2) 1.5 1.5 2.5 0.75 0.75 HSTL-15 Class II (3) JESD8-6 (2 , Differential HSTL-15 Class I JESD8-6 (2) (2) 1.5 1.5 2.5 - 0.75 Differential HSTL-15 , -12 Class II output, HSTL-15 Class II output or SSTL-15 Class II output. (4) Column I/O supports PCI/PCI-X , 2C SSTL-15 class II, HSTL-15 Class II, HSTL-12 Class II, differential SSTL-15 Class II
Altera
Original
JESD8-16A JESD8-15 ccpd 33 CB EP3SE110F780 SSTL-18 HC325Ff78 HIII51006-3 EP3SL110--F780 EP3SL150--F780 EP3SE110--F780 EP3SL200--H780 EP3SE260--H780

LVCMOS33

Abstract: LVCMOS25 I, III HSTL15_I HSTL15_III HSTL 15 I, III HSTL15D_I HSTL15D_III SSTL 33 I, II , 1.5 1.7 HSTL15 I 1.425 1.5 1.575 0.68 0.75 0.9 HSTL15 III 1.425 1.5 , SSTL18 I SSTL25 I, II SSTL33 I, II SSTL18 I SSTL25 I, II SSTL33 I, II HSTL15 I, III HSTL18 I, II, III HSTL15 I, III HSTL18 I, II, III HSTL15 I, III HSTL18 I, II, III HSTL15 I, III , SSTL18D I, SSTL25D I, II SSTL33D I, II SSTL18D I, SSTL25D I, II SSTL33D I, II HSTL15D I, III
Lattice Semiconductor
Original
TN1050 TN1056 DQS16PIO1DDR TN1050L PR29C PR48B

mini-lvds source driver

Abstract: ep4cgx110 -2 Class I and II, SSTL-18 Class I and II, HSTL-18 Class I and II, HSTL-15 Class I and II, and HSTL , 25 25 25 - HSTL-15 Class I 8,10,12 8,10,12 50 50 50 50 - HSTL-15 , HSTL-15 (2), (7) 8,10,12 - 50 - 50 - - Differential HSTL-12 (2), (7) 8 , differential SSTL-18 and SSTL-2, differential HSTL-18, HSTL-15, and HSTL-12 I/O standards are supported only on , standards that supports slew rate option. (7) Differential SSTL-18, differential HSTL-18, HSTL-15, and HSTL
Altera
Original
mini-lvds source driver ep4cgx110 JEDEC FBGA ttl to mini-lvds EP4CE115 EP4CE55 CYIV-51006-2

LVCMOS18

Abstract: SSTL-15 HSTL15_I/ HSTL15D_I 4, 8 HSTL18_I/ HSTL18D_I 8, 12 SSTL25_I/ SSTL25D_I 8, 12 SSTL25_II , mA HSTL15_I/ HSTL15D_I 4, 8 8 HSTL18_I/ HSTL18D_I 8, 12 12 SSTL25_I/ SSTL25D_I , , HTSL18_II HSTL 18 Class I II HSTL18D_I HSTL18D_II HSTL 15 Class I HSTL15_I HSTL 15 Class I HSTL15D_I SSTL 33 Class I II SSTL33_I, SSTL33_II SSTL 33 Class I II SSTL33D_I SSTL3D_II , PCI33 - - HSTL18 Class I, II 0.9 - HSTL15 Class I 0.75 - SSTL33 Class I
Lattice Semiconductor
Original
TN1177 LVCMOS12 SSTL15 R40C45 LVCMOS33D SSTL15D TN1180 R40C47 R40C46

HSTL-12

Abstract: mini-lvds and II, HSTL-15 Class I and II, and HSTL-12 Class I and II standards have several levels of current , 12 12 HSTL-15 Class II 16 16 HSTL-18 Class I 8 8 10 10 12 12 HSTL , HSTL-15 Class I SSTL-18 Class II SSTL-2 Class I SSTL-2 Class II 8 8 12 12 16 , HSTL-18 Class I 50 50 HSTL-18 Class II 25 25 HSTL-15 Class I 50 50 HSTL-15 , 50 HSTL-18 Class II 25 25 HSTL-15 Class I 50 50 HSTL-15 Class II 25 25
Altera
Original
mini-lvds EQFP-144 EP3C10 EP3C120 EP3C16 EP3C25 CIII51007-1

EC1525

Abstract: ROM16x8 III 0.37 0.44 0.52 ns HSTL15_I HSTL_15 I 0.40 0.48 0.56 ns HSTL15_III HSTL_15 III 0.40 0.48 0.56 ns HSTL15D_I HSTL 15 I 0.37 0.44 0.51 ns HSTL15D_III HSTL 15 III 0.37 0.44 0.51 ns SSTL33_I SSTL_3 I 0.46 , HSTL_15 I -0.07 -0.08 -0.09 ns HSTL15_II HSTL_15 II 0.00 0.00 0.00 ns HSTL15_III HSTL_15 III -0.05 -0.06 -0.07 ns HSTL15D_I HSTL 15 I -0.07 -0.08
-
Original
DDR333 LFECP10 LFECP15 LFECP20 LFECP33 EC1525 ROM16x8 LFEC10 LFEC15 LFEC20 166MH SSTL18I HSTL15I 14PLL IEEE1149

LVCMOS33

Abstract: LVCMOS25 I/O 2mA 4mA 6mA8mA12mA16mA 20mA I/O bank 6 6. I/O mA HSTL15_I/ HSTL15D_I 4 , HSTL15_I/ HSTL15D_I 4, 8 8 HSTL18_I/ HSTL18D_I 8, 12 12 SSTL25_I/ SSTL25D_I 8, 12 8 , , HTSL18_II HSTL 18 Class I II HSTL18D_I, HSTL18D_II HSTL 15 Class I HSTL15_I HSTL 15 Class I HSTL15D_I SSTL 33 Class I II SSTL33_I, SSTL33_II SSTL 33 Class I II SSTL33D_I , HSTL15 Class I 0.75 - SSTL3 Class I, II 1.5 - SSTL2 Class I, II 1.25 -
Lattice Semiconductor
Original
ECP2M R1C7

EP4CE15

Abstract: EP4CE6 eqfp -2 Class I and II, SSTL-18 Class I and II, HSTL-18 Class I and II, HSTL-15 Class I and II, and HSTL , 25 25 25 - HSTL-15 Class I 8,10,12 8,10,12 50 50 50 50 - HSTL-15 , HSTL-15 (2), (7) 8,10,12 - 50 - 50 - - Differential HSTL-12 (2), (7) 8 , differential SSTL-18 and SSTL-2, differential HSTL-18, HSTL-15, and HSTL-12 I/O standards are supported only on , standards that supports slew rate option. (7) Differential SSTL-18, differential HSTL-18, HSTL-15, and HSTL
Altera
Original
EP4CE15 EP4CE6 eqfp DIODE CQ 618 EP4CE40 EP4CE75 EP4CE22

LVPECL25

Abstract: HSTL-18 , LVCMOS12, GTL, GTL+, HSTL15 Class I, HSTL15 Class III, HSTL18 Class I, HSTL18 Class II, HSTL18 Class III , , LVCMOS25, LVCMOS18, LVCMOS15, LVCMOS12, HSTL15 Class I, HSTL15 Class III, HSTL18 Class I, HSTL18 Class II
-
Original
XA2S200E XA3S1600E TQG144 LVPECL25 FGG484 RSDS25 MiniLVDS25 LVDS-25 CSG484 XA2S100E XA2S150E XA2S300E XA3S50 XA3S200

SSTL15

Abstract: SSTL-15 HSTL-18 Class I QDRII/RLDRAM II HSTL-18 CLass II QDRII/RLDRAM II HSTL-15 Class I QDRII/QDRII+/RLDRAM II HSTL-15 Class II QDRII/QDRII+/RLDRAM II HSTL-12 Class I Memory interface , Differential HSTL-15 Class I Clock interfaces Differential HSTL-15 Class II Clock interfaces , 0.90 0.90 HSTL-18 Class II JESD8-6 1.8 1.8 1.8 1.8 2.5 0.90 0.90 HSTL-15 Class I JESD8-6 1.5 1.5 1.5 1.5 2.5 0.75 0.75 HSTL-15 Class II JESD8
Altera
Original
DDR3 SSTL class EP3SE50 resistor bank SIII51007-1

resistor bank

Abstract: JESD8-15 and II QDRII/RLDRAM II HSTL-15 Class I and II QDRII/QDRII+/RLDRAM II HSTL-12 Class I and , -18 Class I and II Clock interfaces Differential HSTL-15 Class I and II Clock interfaces Stratix , ) HSTL-15 Class I JESD8-6 (2) (2) 1.5 1.5 2.5 0.75 0.75 HSTL-15 Class II , 1.8 2.5 - 0.90 Differential HSTL-15 Class I JESD8-6 (2) (2) 1.5 1.5 2.5 - 0.75 Differential HSTL-15 Class II JESD8-6 (2) (2) 1.5 - 2.5 -
Altera
Original
TI 7C SIV51006-3

ttl to mini-lvds

Abstract: point-to-point mini-lvds , HSTL-18 Class II, & HSTL-15 Class II I/O Standards I/O Bank 2 I/O Bank 1 Also Supports the 3.3 , SSTL-18 Class I HSTL-18 Class I HSTL-15 Class I Differential SSTL-2 (2) Differential SSTL-18 (2) Differential HSTL-18 (3) Differential HSTL-15 (3) I/O Bank 3 Also Supports the 3.3-V PCI & PCI-X I/O , II, HSTL-18 Class II, & HSTL-15 Class II I/O Standards Notes to Figure 11­1: (1) (2) (3 , -18 Class II, HSTL-18 Class II, & HSTL-15 Class II I/O Standards I/O Bank 3 I/O Bank 4 Individual
Altera
Original
CII51011-2 point-to-point mini-lvds mini-lvds connector cyclone ii EP2C50 mini-lvds receiver mini lvds TIA/EIA-644

EQFP-144

Abstract: mini-lvds source driver and II, HSTL-15 Class I and II, and HSTL-12 Class I and II standards have several levels of current , 12 12 HSTL-15 Class II 16 16 HSTL-18 Class I 8 8 10 10 12 12 HSTL , HSTL-15 Class I SSTL-18 Class II SSTL-2 Class I SSTL-2 Class II 8 8 12 12 16 , HSTL-18 Class I 50 50 HSTL-18 Class II 25 25 HSTL-15 Class I 50 50 HSTL-15 , 50 HSTL-18 Class II 25 25 HSTL-15 Class I 50 50 HSTL-15 Class II 25 25
Altera
Original
EP3C25 pin diagram altera cyclone III EP3C40 EP3C55

TWLA500

Abstract: Frequency Generator 1MHz , threshold accuracy 25 mV LVDS, PECL, LVPECL SSTL3, SSTL2, HSTL15, HSTL18 LVCMOS 3.3/2.5 , SSTL18 class I -0.3 VREF - 0.125 VREF + 0.125 3.6 HSTL15 class I -0.3 VREF - 0.1 VREF + 0.1 3.6 HSTL15 class III -0.3 VREF - 0.1 VREF + 0.1 3.6 HSTL18 class I
Siltrontech Electronics
Original
TWLA500 Frequency Generator 1MHz LA500 35VCC 65VCC

EP3C10

Abstract: EP3C16 . The LVTTL, LVCMOS, SSTL-2 Class I and II, SSTL-18 Class I and II, HSTL-18 Class I and II, HSTL-15 , -12 Class II 14 - HSTL-15 Class I 8, 10, 12 8, 10, 12 HSTL-15 Class II 16 16 , 50 50 50 HSTL-18 Class II 25 25 25 25 HSTL-15 Class I 50 50 50 50 HSTL-15 Class II 25 25 25 25 HSTL-12 Class I 50 50 50 50 HSTL-12 Class II , v v v HSTL-15 Class I, HSTL-15 Class II Voltage referenced JESD8-6 1.5 1.5
Altera
Original
FBGA-484 datasheet JTAG series termination resistors CIII51007-3

CCII APPLICATION

Abstract: AF27 6 and Figure 7 show the signal margin difference between HSTL15 CII 16 mA and HSTL18 CII 16 mA for , is similar for both HSTL15 CII 16 mA and HSTL18 CII 16 mA interfaces. The signal margin high for quiet high noise is greater for HSTL15 (52.7%) compared to the HSTL18 (45.2%) interface, though the noise numbers in absolute millivolts is higher for HSTL18 (190 mV) interface compared to HSTL15 (173 mV , Between HSTL18CII 16 mA and HSTL15 CII 16 mA Signal Margin Low Comparison between HSTL18 CII 16 mA Vs
Altera
Original
CCII APPLICATION AF27

SSTL-15

Abstract: EP3SL70 /RLDRAM II HSTL-15 Class I QDR II/QDR II+/RLDRAM II HSTL-15 Class II QDR II/QDR II+/RLDRAM II , -18 Class I Clock interfaces Differential HSTL-18 Class II Clock interfaces Differential HSTL-15 Class I Clock interfaces Differential HSTL-15 Class II Clock interfaces Differential HSTL , -18 Class II JESD8-6 (2) (2) 1.8 1.8 2.5 0.90 0.90 HSTL-15 Class I JESD8-6 (2) (2) 1.5 1.5 2.5 0.75 0.75 HSTL-15 Class II JESD8-6 (2) (2) 1.5
Altera
Original
EP3SL70

74 series family

Abstract: EP3C10 . The LVTTL, LVCMOS, SSTL-2 Class I and II, SSTL-18 Class I and II, HSTL-18 Class I and II, HSTL-15 , -12 Class II 14 - HSTL-15 Class I 8, 10, 12 8, 10, 12 HSTL-15 Class II 16 16 , 50 50 50 HSTL-18 Class II 25 25 25 25 HSTL-15 Class I 50 50 50 50 HSTL-15 Class II 25 25 25 25 HSTL-12 Class I 50 50 50 50 HSTL-12 Class II , v v v v v HSTL-15 Class I, HSTL-15 Class II Voltage referenced JESD8-6 1.5
Ember
Original
74 series family EP3CLS200 mini-lvds driver EP3C16M164 AN-447 BGA and eQFP Package

HSTL15

Abstract: LVCMOS15 33 - 3.3 HSTL18 Class I, II 0.9 - HSTL15 Class I 0.75 - SSTL3 Class I , - Differential SSTL3 Class I, II - - Differential HSTL15 Class I - - , 2mA, 6mA - 2 N/A 3.3 8mA, 12mA 1.8 HSTL18 Class II N/A 1.8 HSTL15 Class , HSTL18, Class I 8mA, 12mA 1.8 Differential HSTL18, Class II N/A 1.8 Differential HSTL15 , , II SSTL3 Class I, II HSTL15 Class I HSTL18_I, II HSTL15 Class I HSTL18 Class I, II HSTL15
Lattice Semiconductor
Original
TN1136

LVCMOS15

Abstract: LVCMOS25 - 1.5 LVCMOS12 - - PCI 33 - 3.3 HSTL18 Class I, II 0.9 - HSTL15 , Differential SSTL3 Class I, II - - Differential HSTL15 Class I - - Differential HSTL18 , HSTL15 Class I 4mA, 8mA 1.5 SSTL3 Class I, II N/A 3.3 SSTL2 Class I 8mA, 12mA 2.5 , I 8mA, 12mA 1.8 Differential HSTL18, Class II N/A 1.8 Differential HSTL15, Class I , , II SSTL3 Class I, II HSTL15 Class I HSTL18_I, II HSTL15 Class I HSTL18 Class I, II HSTL15
Lattice Semiconductor
Original
SSTL18II

ttl to mini-lvds

Abstract: mini-lvds connector (3) SSTL-2 class I and II SSTL-18 CLass I and II HSTL-18 Class I and II HSTL-15 Class I and II , ) DIfferential HSTL-15 (4) Differential HSTL-12 (4) I/O Bank 4 I/O banks 3 & 4 also support the HSTL , . The differential SSTL-2, SSTL-18, HSTL-18, HSTL-15, and HSTL-12 I/O standards are only supported on , interface type of differential SSTL-18, HSTL-18, HSTL-15, and HSTL-12 I/O standards. 8­2 Cyclone III , Differential HSTL-18 (3) All NA NA 200 200 Differential HSTL-15 (3) All NA NA 200
Altera
Original
cyclone iii EP3C120F780 LCD ppds interface CIII51008-1

point-to-point mini-lvds

Abstract: EP3CLS200 ) SSTL-2 Class I and II SSTL-18 Class I and II HSTL-18 Class I and II HSTL-15 Class I and II HSTL-12 Class I Differential SSTL-2 (4) Differential SSTL-18 (4) Differential HSTL-18 (4) DIfferential HSTL-15 , differential SSTL-2, SSTL-18, HSTL-18, HSTL-15, and HSTL-12 I/O standards are only supported on dedicated clock , differential SSTL-18, HSTL-18, HSTL-15, and HSTL-12 I/O standards. (5) BLVDS output uses two single-ended , NA Yes Yes Differential HSTL-18 (3) All NA Yes Yes Differential HSTL-15 (3
Ember
Original
EP3CLS150 EP3C80U484 EP3CLS100 ppds EP3CLS70 LS TTL family characteristics CIII51008-3

LVCMOS15

Abstract: LVCMOS25 3.465 1.3 1.5 1.7 HSTL15 Class I 1.425 1.5 1.575 0.68 0.75 0.9 HSTL15 , Class I SSTL2 Class I, II SSTL3 Class I, II HSTL15 Class I, III HSTL18_I, II, III HSTL15 Class I, III HSTL18 Class I, II, III HSTL15 Class I, III HSTL18 Class I, II, III HSTL15 Class I
Lattice Semiconductor
Original
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