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Part : GW MAFJB1.CM-RUSS-40S3-T02 Supplier : OSRAM Manufacturer : RS Components Stock : 68 Best Price : £6.43 Price Each : £6.43
Shipping cost not included. Currency conversions are estimated. 

GW MAFJB1.CM-RUSS-40S3-T02

Catalog Datasheet MFG & Type PDF Document Tags

GW KAHLB2.CM-TPTQ-40S3

Abstract: 40S3 Lichtstrom Bestellnummer 1) page 22 1) Seite 22 IF = 200 mA [K] GW P9LRS1.EM-PQPS-40S3 ΦV [lm] 4000 484 . 610 Q65111A4929 GW P9LRS1.EM-PQPS-40S5 4000 484 . 610 Q65111A4928 GW P9LRS1.EM-PPPS-30S3 3000 450 . 610 Q65111A4932 GW P9LRS1.EM-PPPS-30S5 3000 , 2013-07-15 DURIS® S 8 Datasheet Draft Version 0.0 GW P9LRS1.EM Features: Besondere , Omnidirektionale Retrofits Spot-Leuchten Draft Version 0.0 GW P9LRS1.EM Ordering Information
OSRAM
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GW KAHLB2.CM-TPTQ-40S3 40S3 LM-80 EM-PQPS-40S3 D-93055

GW CSSRM1.PM-MFNQ-40S5

Abstract: 2013-11-15 DURIS® S 8 Datasheet Version 1.0 GW P9LRS1.EM Features: Besondere Merkmale , Retrofits Downlights Omnidirektionale Retrofits Spot-Leuchten Version 1.0 GW P9LRS1.EM Ordering , : Farbtemperatur Lichtstrom Bestellnummer 1) page 22 1) Seite 22 IF = 200 mA [K] ΦV [lm] GW P9LRS1.EM-PQPS-65S5 6500 484 . 610 Q65111A5497 GW P9LRS1.EM-PQPS-57S5 5700 484 . 610 Q65111A5410 GW P9LRS1.EM-PQPS-50S5 5000 484 . 610 Q65111A5412 GW P9LRS1.EM-PQPS-40S5 4000
OSRAM
Original
GW CSSRM1.PM-MFNQ-40S5
Abstract: 2013-11-15 DURIS® S 8 Datasheet Version 1.0 GW P9LMS1.EM Features: Besondere Merkmale , Retrofits Downlights Omnidirektionale Retrofits Spot-Leuchten Version 1.0 GW P9LMS1.EM Ordering , : Farbtemperatur Lichtstrom Bestellnummer 1) page 22 1) Seite 22 IF = 200 mA [K] ΦV [lm] GW P9LMS1.EM-NSNU-65S5 6500 359 . 450 Q65111A5414 GW P9LMS1.EM-NSNU-57S5 5700 359 . 450 Q65111A5416 GW P9LMS1.EM-NSNU-50S5 5000 359 . 450 Q65111A5291 GW P9LMS1.EM-NSPP-40S5 4000 OSRAM
Original
Abstract: t=0.2 m/m Temperature Rising Area Preheat Area +4.0â"ƒ / sec max. d ï¹'Remark:Lead , +0 50 -0 20.5 B ( 3 ) Q'TY & G.W. Per package Inner : Reel Series Q'TY (pcs) Outer : Carton G.W. (gw) Style Q'TY (pcs) G.W. (Kg) Size (cm) MB4030 150 07 - 12 ABC Electronics
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MB8530 Z25MH AE-001A
Abstract: copper flate t=0.2 m/m cï¹'Product weight:0.180 (4030) / 0.325 (8530) mgï¼ref.) dï¹'Moisture , 50 -0 20.5 ( 3 ) Q'TY & G.W. Per package Inner : Reel Outer : Carton Code Q'TY (pcs) G.W. (gw) Style Q'TY (pcs) G.W. (Kg) Size (cm) MB4030 500 150 07 - 12 20 ABC Electronics
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20130819-B 100MH MB4030-L- AR-001C

MB4030

Abstract: MB8530 70sec max. aBodyFerrite bTerminalTinned copper flate t=0.2 m/m Temperature Rising Area , 12 14 +0 50 -0 16.5 21±0.8 13 16 18 +0 50 -0 20.5 ( 3 ) Q'TY & G.W. Per package Outer : Carton Inner : Reel Series Q'TY (pcs) G.W. (gw) Style Q'TY (pcs) G.W
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MB4030-L Z100MH MB8530-L- AR-001A
Abstract: . aï¹'Body:Ferrite bï¹'Terminal:Tinned copper flate t=0.2 m/m Temperature Rising Area Preheat Area , 21±0.8 13 16 18 +0 50 -0 20.5 ( 3 ) Q'TY & G.W. Per package Inner : Reel Series Q'TY (pcs) Outer : Carton G.W. (gw) Style Q'TY (pcs) G.W. (Kg) Size (cm) MB4030 ABC Electronics
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MX98207

Abstract: ] MA16X GW# PxCRSDV * CE# PxRXD[1:0] PxTXEN 10/100M MAC LED Controller PxTXD[1:0 , ] O Memory address bus. Where MA[16], MA16X, and MA[17] could be used for chip enabling. GW , MX98207 Timing Diagram Reset and Clock Timing t03 t01 OSCIN t02 RESET# T# .t01 .t02 , GW# t34 MD Q1 Q2 READ T# .t31 .t32 .t33 .t34 .t35 TA t33 t35 Q3 Q4 TA Description OSCIN to CE# and GW# delay. OSCIN to MA[17:0] delay. OSCIN to MD[63:0] delay
Macronix International
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IEEE802 100MB PM0660
Abstract: #, BWE#) and global write (GW#). Asynchronous inputs include the output enable (OE#), snooze enable (ZZ , DQP4, conditioned by BWE# being LOW. GW# LOW causes all bytes to be written. Parity bits are only , CLK. 88 GW# Input 64 zz Input Global Write: This active LOW input allows a full , WRITE COMMANDS Function GW# BWE# BW1# BW2# READ H H X READ H L H , signals (BW1#, BW2#, BW3# or BW4#) and BWE# are LOW or GW# is LOW. WRITE#=H means all byte write enable -
OCR Scan
MT58LC32K32/36E1 100-P 100-PIN MT56LC32K32/36E1

RELAY MD-12

Abstract: MD 202 I/F MSIZE[1:0] MD[63:0] Queue/SRAM Manager MA[17:0] MA16X GW# CE# PxCRSDV * PxRXD , ] MTYPE/ MDC MDIO MDC/MDIO I/F MD[63:0] MA[17:0] MA16X Queue/SRAM Manager GW# CE , ] GND MA[17] MA16X MA[16] GW# CE# MMODE MSIZE[1] MSIZE[0] OSCIN GND VDD VDD EDO EDI ESK , be used for chip enabling. 176 GW# O 177 178 CE# MMODE O I 179-180 MSIZE , , JUN. 09, 2000 24 MX98206EC Timing Diagram Reset and Clock Timing t03 t01 OSCIN t02
Macronix International
Original
RELAY MD-12 MD 202 marking macronix 10Mbps-FDX MD-45 100Mbps-HDX PM0661 NOV/08/1999 FEB/10/2000 JUN/09/2000 C0013 F4044937B1

MX98206

Abstract: MX98207 /F MSIZE[1:0] MD[63:0] Queue/SRAM Manager MA[17:0] MA16X GW# CE# PxCRSDV * PxRXD[1 , ] MD[7] MD[6] MD[5] MD[4] MD[3] MD[2] MD[1] MD[0] GND MA[17] MA16X MA[16] GW# CE# MMODE , ] MD[6:0] MA16X MA[17] MA[16] MA[15:8] MA[7:0] GW# I/O I/O DESCRIPTION Memory data bus , , FEB. 10, 2000 21 MX98206 Timing Diagram Reset and Clock Timing t03 t01 OSCIN t02 RESET# T# .t01 .t02 .t04 Description System clock period. System clock high time. RESET# low
Macronix International
Original

100Mbps-FDX

Abstract: diode bp64 [17:0] MA16X GW# PxCRSDV * CE# PxRXD[1:0] PxTXEN 10/100M MAC LED Controller , ] Queue/SRAM Manager MA[17:0] MA16X GW# CE# PxCRSDV * PxRXD[1:0] PxTXEN PxTXD[1:0] REFCLK , enabling. GW# O D13 C13 CE# MMODE O I Global write. The signal is low for memory write , , JUN. 23, 2000 25 MX98207AC Timing Diagram Reset and Clock Timing t03 t01 OSCIN t02 RESET# T# .t01 .t02 .t04 Description System clock period. System clock high time. RESET# low
Macronix International
Original
100Mbps-FDX diode bp64 marking t54 100M-FDX bp64 T56 marking JUN/23/2000 S0013 F4044937B0 36CAX

D78011

Abstract: 78014f /P30 TIO/INTPO/POO T01/P31 TI1/P33 T02/P32 TÏ2/P34 - tfr-bit TIMER' EVENT COUNTER POO A -\ PORTO , resistor can be used by software. SCK1 STB B U SY SIO/SBO SOO/SB1 SCKO TOO TOt T02 in TI2 PCL BUZ input SM , Input Input P35 P36 P40 to P47 Pin Name TIO TI1 Tl2 TOO T01 T02 PCL BUZ ADO to AD7 I/O Input , P23/STB P24/BUSY P25/SIQ/SBÛ P26/SOO/SB1 P27/SCK0 P30/TOO P31JT01 P32/T02 P33/TI1 P34/TI2 P35/PCL P36 , 1x/2M x/29 Serial Clock Control Circuit - Selector T02 Figure 5-10. Serial Interface
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OCR Scan
D78011 78014f CSA2.00M D78014 PD78011F PD78012F PD78013F PD78014F PD78015F PD78016F

dh28 560

Abstract: A09 N03 P12 U12 V13 P11 N07 U02 N06 T02 M07 R03 N05 N04 P03 M06 7 6 5 4 ECL ECL ECL , DQA2 DQA1 DQA0 93 94 95 96 CS1* CS2* CS2 98 92 97 GW* BW* 50 49 48 47 46 , 13 12 11 10 9 8 7 6 5 4 3 2 1 0 R43 CS1* CS2* CS2 1% GW* BW* 50 49
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dh28 560 A09 N03 10C6 Diode dh28 cheetah 11B8 1-800-IBM-0181 15JAN98 750SSRAM EDGECONN256 CONNTEST14

AD427

Abstract: Ordering Information P a rt Num ber ^ 56 H P1i P31/T01 C 10 (P ackage Dwg.) P32/T02 C 11 , -bit, bit-selectable I/O port P30 â'" P3, TO I Tim er output from tim er 1 P32 T02 Tim er , O TI1/P33 - Port 4 Program Counter T02/P32 < ~ T12JP34- 8-bit Timer/ Event , ), and a timer output control logic (T01 or T02). The timers are controlled by registers TCL1, TMC1, and , -bit interval timer, to count external events on TI1, or to output a program­ mable square wave on T02
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OCR Scan
AD427 004E775 PD78002Y PD78001 BY/002BY/P014Y PD78P014Y
Abstract: P11/ANI1 P31/T01 P10/ANI0 P32/T02 AVss P33/TI1 P04/XT1 P34/TI2 XT2 P35/PCL , * o > a NC E ro 9 > T01/P31 I 8 bit TIMER/ EVENT COUNTER 1 -V . T02/P32 , input port, pull-up resistor can be used by software. P32 TOO T02 P33 T il P34 TI2 , P30 TOI 8-bit tim er (TM1) output. P31 T02 8-bit timer (TM2) output. P32 PCL , P27/SCK0/SCL P30/T00 5-A Input/output P31/T01 P32/T02 P33/TI1 8-A P34/TI2 P35/PCL -
OCR Scan
PD78011BY/78012BY 78013Y 78014Y PD78011BY 78012BY PD78014Y
Abstract: Output NC Non-connection TI0 Timer Input P00-P07 PortO TOO, T02 Timer Output , port P51 I/O specifiable bit-wise T02 W hen used as input port, on-chip pull-up resistor , ) output Input P50/TI0 T02 Output 16-bit tim er (TM2) output Input P51 CPT2 , .00M GW U 1.8 5.5 With a built-in capacitor TDK CCR4.19MC3 4.19 - - 2.0 5.5 -
OCR Scan
XPD789022 PD789022N PD789024N PD789025 PD789026 78K/0S

74HC125

Abstract: DS1402-DR8 Commands Command + Format GD GL GP GS GU GV GW Description Get time of last debit Get the , P02 00 T02 00 U02 00 W10 18F6AA0200000043 Y02 10 Z02 01 GD: RD0268 21 of 21 Dallas
Dallas Semiconductor
Original
DS1963S DS1961S DS9093A DS1402-DR8 DS9097U-S09 74HC125 RJ11 female socket inverted diode 1n4002 advantages rj11 to db9 rj11 connection to db9 diagram 10RRRRRRRRRRRRRRRR

74HC125

Abstract: RJ11 female socket inverted Commands Command + Format GD GL GP GS GU GV GW Description Get time of last debit Get the , P02 00 T02 00 U02 00 W10 18F6AA0200000043 Y02 10 Z02 01 GD: RD0268 21 of 21 Dallas
Dallas Semiconductor
Original
1-wire 8051 code DB9 Female / RJ11 cable rx1 tx1 PSEN DS89C420 DS9097U 40AA55AA55AA55AA55AA55AA55AA5 5AA55AA55AA55AA55AA55AA55AA55 AA55AA55 10CTCMCMMBMBMBIDID 06MBMBMB

78011B

Abstract: LA 78014 P20-P27 T02/P32 < T12/P34 ( Q-bit TIMER/ EVENT COUNTER 2 POHT4 WATCH TIMER P40-P47 SI0/SB0 , NEC 3.2 OTHER PORTS (2/2) ¿iPD78011B, 78012B, 78013, 78014 Pin Name TIO TU Tt2 TOO T01 T02 PCL , P27/SCK0 P30/T00 P31/T01 P32/T02 P3 3/TI1 P34/T12 P35/PCL P36/BUZ P37 P40/AD0 to P47/AD7 8-A 5-A 8 , Ouiput Circuit fx/22 -fv29 T02 Serial Clock Control Circuit - Selector - 143 NEC , xxxxJ C SA x. xxxM K C SA x. xxMG 1 .8 0 to 2 .4 4 C STx. xxMG C SA x. xxMG C S T x. xxM GW C SA x. xxM
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OCR Scan
78011B LA 78014 d78013 j132 PD78011B PD78012B PD78013 PD78014 IEU-1343
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