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Part : DS08-32B Supplier : Transmission Developments Co (GB) Manufacturer : RS Components Stock : 15 Best Price : £1.98 Price Each : £2.16
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DS083-2

Catalog Datasheet MFG & Type PDF Document Tags

405d5

Abstract: DS083-2 0 R Virtex-II ProTM Platform FPGAs: Functional Description 0 0 DS083-2 (v1.0) January 31 , without notice. DS083-2 (v1.0) January 31, 2002 Advance Product Specification www.xilinx.com , by the received data and reference clock applied. 10 www.xilinx.com 1-800-255-7778 DS083-2 , REFCLKSEL RXUSRCLK RXUSRCLK2 TXUSRCLK TXUSRCLK2 DS083-2_04_010202 GNDA AVCCAUXTX VTTX TX/RX GND 2.5V TX Termination Supply TX Figure 2: Rocket I/O Block Diagram DS083-2 (v1.0) January 31, 2002
Xilinx
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405d5 PPC405

405D5

Abstract: basic block diagram of bit slice processors 0 48 Virtex-II ProTM Platform FPGAs: Functional Description R DS083-2 (v3.1.1) March 9 , owners. All specifications are subject to change without notice. DS083-2 (v3.1.1) March 9, 2004 , GND 2.5V TX Termination Supply TX DS083-2_04_090402 Figure 2: RocketIO Transceiver Block Diagram 2 www.xilinx.com 1-800-255-7778 DS083-2 (v3.1.1) March 9, 2004 Product Specification , bits are encoded DS083-2 (v3.1.1) March 9, 2004 Product Specification Serializer The
Xilinx
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basic block diagram of bit slice processors carry look ahead adder XAPP290 dci -dc inverter 405D4 LVCMOS33 DS083-1 XC2VP70 XC2VP100
Abstract: 0 Virtex-II Proâ"¢ Platform FPGAs: Functional Description R DS083-2 (v2.0) June 13, 2002 , owners. All specifications are subject to change without notice. DS083-2 (v2.0) June 13, 2002 Advance , Termination Supply TX DS083-2_04_010202 Figure 2: Rocket I/O Block Diagram 2 www.xilinx.com 1-800-255-7778 DS083-2 (v2.0) June 13, 2002 Advance Product Specification R Virtex-II Proâ"¢ Platform , K-characters available in the 8B/10B code. If the K-character input is Low, the 8 bits are encoded DS083-2 Xilinx
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XC2VP100

Abstract: XC2VP70 Parameter Guidelines DCM Timing Parameters Module 2: Functional Description DS083-2 (v4.1) November 17 , Description Product Specification DS083-2 (v4.1) November 17, 2004 Virtex-II Pro(1) Array Functional , without notice. DS083-2 (v4.1) November 17, 2004 Product Specification www.xilinx.com 1-800-255-7778 , TXP VP VN VP - VN = V DATA TXN CML Output Driver DS083-2_66_052104 ug083_34_050704 Figure 3: RocketIO X Transmit Termination Figure 2: CML Output Configuration DS083-2 (v4
Xilinx
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XC2VP30 DS083 DS083-3 DS083-4 FG256/FGG256 FG456/FGG456 DS110-4

16 BIT ALU design with verilog hdl code

Abstract: vhdl code for uart communication and Virtex-II Pro X Platform FPGAs: Functional Description Product Specification DS083-2 (v4 , subject to change without notice. DS083-2 (v4.3) June 20, 2005 Product Specification www.xilinx.com , Driver DS083-2_66_052104 ug083_34_050704 Figure 3: RocketIO X Transmit Termination Figure 2: CML Output Configuration DS083-2 (v4.3) June 20, 2005 Product Specification www.xilinx.com Module 2 , DS083-2_37_050704 TXP TXN Serializer Output Polarity GNDA AVCCAUXRX VTTX TX/RX GND 1.5V
Xilinx
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16 BIT ALU design with verilog hdl code vhdl code for uart communication XC2VPX70 vhdl code for spi xilinx FG676/FGG676 FF672 FF896 XC2VP30-FF1152

StratixEP1S25

Abstract: XC2VP20 Data Sheet. (2) Source: Virtex-II Pro data sheet, DS083-2, v2.4, page 32, Table 16, "Virtex-II Pro , Resources Available in All CLBs." (2) Virtex-II Pro data sheet, DS083-2, v2.4, page 32, Table 16
Altera
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StratixEP1S25 XC2VP20 Virtex-II EP1S20 XC2VP125 XC2V1000

ATM machine working circuit diagram

Abstract: gearbox 405 Description Module 4: Pinout Information DS083-2 (v4.0) June 30, 2004 59 pages DS083-4 (v4.0) June , Virtex-II Pro and Virtex-II Pro X Platform FPGAs: Functional Description DS083-2 (v4.0) June 30, 2004 , to change without notice. DS083-2 (v4.0) June 30, 2004 Product Specification www.xilinx.com , CML Output Driver ug083_34_050704 Figure 3: RocketIO X Transmit Termination DS083-2_66_052104 Figure 2: CML Output Configuration DS083-2 (v4.0) June 30, 2004 Product Specification
Xilinx
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ATM machine working circuit diagram gearbox 405 Virtex-II Pro xc2vp50ff1152 Virtex-II Pro xc2vp70ff1517 K162 FG256/FGG
Abstract: Description R DS083-2 (v2.3) November 20, 2002 0 0 Advance Product Specification Virtex-II , notice. DS083-2 (v2.3) November 20, 2002 Advance Product Specification www.xilinx.com , DS083-2_04_090402 Figure 2: RocketIO Transceiver Block Diagram 2 www.xilinx.com 1-800-255-7778 DS083-2 (v2.3) November 20, 2002 Advance Product Specification R Virtex-II Proâ"¢ Platform FPGAs , code. If the K-character input is Low, the 8 bits are encoded DS083-2 (v2.3) November 20, 2002 Xilinx
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XC2VP40 FF1152

XC2VP50

Abstract: verilog hdl code for uart Module 2: Functional Description DS083-2 (v3.1.1) March 9, 2004 48 pages · · · · Functional Description , DS083-2 (v3.1.1) March 9, 2004 Product Specification Virtex-II Pro Array Functional Description , subject to change without notice. DS083-2 (v3.1.1) March 9, 2004 Product Specification , REFCLKSEL BREFCLK BREFCLK2 RXUSRCLK RXUSRCLK2 TXUSRCLK TXUSRCLK2 DS083-2_04_090402 GNDA AVCCAUXTX VTTX , www.xilinx.com 1-800-255-7778 DS083-2 (v3.1.1) March 9, 2004 Product Specification R Virtex-II ProTM
Xilinx
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XC2VP50 verilog hdl code for uart XC2VP70 FF1704 pinout FG256 FG456 F1517 FF1696

AB38R

Abstract: tag l9 225 400 Description 0 0 DS083-2 (v2.0) June 13, 2002 Advance Product Specification · FPGA fabric based on , specifications are subject to change without notice. DS083-2 (v2.0) June 13, 2002 Advance Product , TXUSRCLK TXUSRCLK2 DS083-2_04_010202 GNDA AVCCAUXTX VTTX TX/RX GND 2.5V TX Termination Supply TX Figure 2: Rocket I/O Block Diagram 2 www.xilinx.com 1-800-255-7778 DS083-2 (v2.0) June 13, 2002 , code. If the K-character input is Low, the 8 bits are encoded DS083-2 (v2.0) June 13, 2002 Advance
Xilinx
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AB38R tag l9 225 400 BF957

IBM powerpc 405

Abstract: AH5N TX Termination Supply TX DS083-2_04_010202 Figure 2: Rocket I/O Block Diagram DS083-2 (v1 , Virtex-II ProTM Platform FPGAs: Functional Description R DS083-2 (v1.0) January 31, 2002 0 0 , subject to change without notice. DS083-2 (v1.0) January 31, 2002 Advance Product Specification , interface signals. www.xilinx.com 1-800-255-7778 DS083-2 (v1.0) January 31, 2002 Advance Product , increments of 100 mV. www.xilinx.com 1-800-255-7778 DS083-2 (v1.0) January 31, 2002 Advance Product
Xilinx
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IBM powerpc 405 AH5N AF124 IEEE1532 function generator

vhdl code for sdram controller

Abstract: daisy chain verilog : RocketIO X Transmit Termination DS083-2_66_052104 Figure 2: CML Output Configuration DS083-2 (v4 , Description DS083-2 (v4.2) March 1, 2005 Product Specification Virtex-II Pro(1) Array Functional , property of their respective owners. All specifications are subject to change without notice. DS083-2 , TXINTDATAWIDTH[1:0] TXSCRAM64B66BUSE TXOUTCLK DS083-2_37_050704 Figure 4: RocketIO X Transceiver Block Diagram DS083-2 (v4.2) March 1, 2005 Product Specification www.xilinx.com Module 2 of 4 3 R
Xilinx
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vhdl code for sdram controller daisy chain verilog vhdl code for data memory FF1148 digital IIR Filter VHDL code EIC 70

K2M11

Abstract: XC2VP70 FF1704 pinout Guidelines DCM Timing Parameters Module 2: Functional Description DS083-2 (v2.9) October 14, 2003 48 , ProTM Platform FPGAs: Functional Description 0 0 DS083-2 (v2.9) October 14, 2003 Advance Product , owners. All specifications are subject to change without notice. DS083-2 (v2.9) October 14, 2003 , REFCLKSEL BREFCLK BREFCLK2 RXUSRCLK RXUSRCLK2 TXUSRCLK TXUSRCLK2 DS083-2_04_090402 GNDA AVCCAUXTX VTTX , www.xilinx.com 1-800-255-7778 DS083-2 (v2.9) October 14, 2003 Advance Product Specification R Virtex-II
Xilinx
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K2M11 FF1517 FG676

vhdl code for uart communication

Abstract: XC2VP50 Platform FPGAs: Functional Description 0 0 DS083-2 (v2.5.1) March 24, 2003 Advance Product , owners. All specifications are subject to change without notice. DS083-2 (v2.5.1) March 24, 2003 , REFCLKSEL BREFCLK BREFCLK2 RXUSRCLK RXUSRCLK2 TXUSRCLK TXUSRCLK2 DS083-2_04_090402 GNDA AVCCAUXTX VTTX , www.xilinx.com 1-800-255-7778 DS083-2 (v2.5.1) March 24, 2003 Advance Product Specification R Virtex-II , code. If the K-character input is Low, the 8 bits are encoded DS083-2 (v2.5.1) March 24, 2003
Xilinx
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Abstract: "¢ Platform FPGAs: Functional Description R DS083-2 (v2.7) June 2, 2003 0 0 Advance Product , owners. All specifications are subject to change without notice. DS083-2 (v2.7) June 2, 2003 Advance , GND 2.5V TX Termination Supply TX DS083-2_04_090402 Figure 2: RocketIO Transceiver Block Diagram 2 www.xilinx.com 1-800-255-7778 DS083-2 (v2.7) June 2, 2003 Advance Product , bits are encoded DS083-2 (v2.7) June 2, 2003 Advance Product Specification Serializer The Xilinx
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Virtex-II Pro xc2vp70ff1517

Abstract: XC2VP70 FF1704 pinout Module 2: Functional Description DS083-2 (v3.2) April 22, 2004 48 pages · · · · Functional Description , DS083-2 (v3.2) April 22, 2004 Product Specification Virtex-II Pro Array Functional Description , subject to change without notice. DS083-2 (v3.2) April 22, 2004 Product Specification www.xilinx.com , RXUSRCLK RXUSRCLK2 TXUSRCLK TXUSRCLK2 DS083-2_04_090402 GNDA AVCCAUXTX VTTX TX/RX GND 2.5V TX , DS083-2 (v3.2) April 22, 2004 Product Specification R Virtex-II ProTM Platform FPGAs: Functional
Xilinx
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RXRECCLK

Virtex-II Pro xc2vp50ff1152

Abstract: XC2VP50 : Pinout Information DS083-2 (v3.1) February 19, 2004 48 pages DS083-4 (v3.1) February 19, 2004 299 , : Functional Description R DS083-2 (v3.1) February 19, 2004 0 0 Product Specification , subject to change without notice. DS083-2 (v3.1) February 19, 2004 Product Specification , Termination Supply TX DS083-2_04_090402 Figure 2: RocketIO Transceiver Block Diagram 2 www.xilinx.com 1-800-255-7778 DS083-2 (v3.1) February 19, 2004 Product Specification R Virtex-II
Xilinx
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IOL29 250v ACE 69 vhdl code for DCM SRL16 xilinx tri mode ethernet TRANSMITTER signal 4 BIT ALU design with verilog vhdl code

vhdl code for uart communication

Abstract: XC2VP70 FF1704 pinout Guidelines DCM Timing Parameters Module 2: Functional Description DS083-2 (v2.7.1) August 25, 2003 48 , ProTM Platform FPGAs: Functional Description 0 0 DS083-2 (v2.7.1) August 25, 2003 Advance Product , owners. All specifications are subject to change without notice. DS083-2 (v2.7.1) August 25, 2003 , REFCLKSEL BREFCLK BREFCLK2 RXUSRCLK RXUSRCLK2 TXUSRCLK TXUSRCLK2 DS083-2_04_090402 GNDA AVCCAUXTX VTTX , www.xilinx.com 1-800-255-7778 DS083-2 (v2.7.1) August 25, 2003 Advance Product Specification R
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wireless encrypt

AW134

Abstract: XC2VP30 : Pinout Information DS083-2 (v3.0) December 10, 2003 50 pages DS083-4 (v3.0) December 10, 2003 298 , Description R DS083-2 (v3.0) December 10, 2003 0 0 Product Specification Virtex-II Pro Array , notice. DS083-2 (v3.0) December 10, 2003 Product Specification www.xilinx.com 1-800-255-7778 1 , transceiver and its FPGA interface signals. www.xilinx.com 1-800-255-7778 DS083-2 (v3.0) December 10 , RXUSRCLK RXUSRCLK2 TXUSRCLK TXUSRCLK2 TX/RX GND 2.5V TX Termination Supply TX DS083-2_04_090402
Xilinx
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AW134 tag a2 255 600

vhdl code for uart communication

Abstract: DS083-2 (v2.5) January 20, 2003 Advance Product Specification Virtex-II Pro Array Functional , . DS083-2 (v2.5) January 20, 2003 Advance Product Specification www.xilinx.com 1-800-255-7778 1 , RXUSRCLK RXUSRCLK2 TXUSRCLK TXUSRCLK2 DS083-2_04_090402 GNDA AVCCAUXTX VTTX TX/RX GND 2.5V TX , DS083-2 (v2.5) January 20, 2003 Advance Product Specification R Virtex-II ProTM Platform FPGAs , K-characters available in the 8B/10B code. If the K-character input is Low, the 8 bits are encoded DS083-2
Xilinx
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vhdl code for uart communication

Abstract: XC2VPX70 FPGAs: Functional Description Product Specification DS083-2 (v4.5) October 10, 2005 Virtex-II Pro , property of their respective owners. All specifications are subject to change without notice. DS083-2 , Transmit Termination Figure 2: CML Output Configuration DS083-2 (v4.5) October 10, 2005 Product , Figure 4: RocketIO X Transceiver Block Diagram DS083-2 (v4.5) October 10, 2005 Product Specification , receiver termination supply (VTRX) is the center tap of differential termination to DS083-2 (v4
Xilinx
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XC2VPX20 fifo vhdl

XC2VP100

Abstract: XC2VP70 Description 0 0 DS083-2 (v2.0) June 13, 2002 Advance Product Specification · FPGA fabric based on , specifications are subject to change without notice. DS083-2 (v2.0) June 13, 2002 Advance Product , Figure 2: Rocket I/O Block Diagram 2 www.xilinx.com 1-800-255-7778 DS083-2 (v2.0) June 13, 2002 , code. If the K-character input is Low, the 8 bits are encoded DS083-2 (v2.0) June 13, 2002 Advance , " and "out-of-band" errors. A disparity error 4 www.xilinx.com 1-800-255-7778 DS083-2 (v2
Xilinx
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