NEW DATABASE - 350 MILLION DATASHEETS FROM 8500 MANUFACTURERS
| Part | Manufacturer | Description | Type | Ordering |
| CY37064P44-167AC | Cypress Semiconductor | UltraLogic 64-Macrocell ISR CPLD |
20 pages, |
Original | |
| Catalog Datasheet Results | Type | Document Tags |
| Abstract: Carrier CY37064P44-167AC A44 44-Pin Thin Quad Flatpack CY37064P44-167JC CY37064P44-167JC J67 44-Pin ... | Original |
20 pages, |
CY37064V CY37064P44-125AC CY37064-200 CY37032 CY37064P44-167AC CY37064 CY37064 abstract |
| Abstract: Carrier CY37064P44-167AC A44 44-Pin Thin Quad Flatpack CY37064P44-167JC CY37064P44-167JC J67 44-Pin ... | Original |
20 pages, |
CY37064V CY37064 CY37032 CY37064 abstract |
| Abstract: .m. .»ÄSf CYPRE PRELIMINARY CY37064 CY37064 UltraLogic™ 64-Macrocell ISR™ CPLD - ts = 4.0 ns Features • 64 macrocells in four logic blocks • In-System Reprogrammable™ (ISR™) JTAG-compliant on-board programming - Design changes don't cause pinout changes - Design changes don't cause timing changes • Up to 64 l/Os - Plus 5 dedicated inputs including 4 clock inputs • High speed -fMAX = 200 MHz - tPD = 6.0 ns - tco = 4.0 ns Product-term clocking IEEE 1149.1 J TAG bou ... | OCR Scan |
20 pages, |
CY7C373 CY7C372 CY37064V CY37064 CY37032 CERAMIC LEADLESS CHIP CARRIER 032-l CY37064 abstract |
| Abstract: Ultra37064 UltraLogic™ 64-Macrocell ISR™ CPLD Features • 64 macrocells in four logic blocks • In-System Reprogrammable™ (ISR™) - JTAG-compliant on-board programming - Design changes don't cause pinout changes - Design changes don't cause timing changes • Up to 64 l/Os - plus 5 dedicated inputs including 4 clock inputs • High speed -fMAX = 167MHz - t PD : 6.5 ns - ts = 3.5 ns - tco = 4.5 ns Product-term clocking IEEE1149 IEEE1149.1 JTAG boundary scan Programmable slew rate control on indivi ... | OCR Scan |
19 pages, |
CY7C373 CY7C372 CERAMIC LEADLESS CHIP CARRIER Ultra37064 datasheet abstract |
| Part | Manufacturer | Description | Shortform Datasheet | Ordering |