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CD54/74U04

Catalog Datasheet MFG & Type PDF Document Tags
Abstract: er D issipation C apa citance ' TYPICAL VALUES CD54/74U04 UNITS Û Û. O 5 ns , Technical Data CD54/74HCU04 File N um ber High-Speed CMOS Logic Z1 :3 Hex Inverter , o g i c d ia g r a m . 628 1~T III 1655 Technical Data CD54/74HCU04 MAXIMUM RATINGS , CD54 Types In p u t Rise and Fall Tim es, tâ'žti: at 2 V at 4.5 V at 6 V â'˜ U n le ss o th e rw , +125 0 0 0 1000 500 400 V V ns Technical Data CD54/74HCU04 STATIC ELECTRICAL -
OCR Scan
CD54/74HCU04 CD74HCU04 54/74H CD54HCU04 CD54/74U04
Abstract: (Vcc = 5 V, T a = 25° C, Input t, t, = 6 ns) TYPICAL VALUES CD54/74U04 6 14 CHARACTERISTIC P ro p , t o r O u tp u t V o lta g e , Vi, V0 O p e ra tin g T e m p e ra tu re , T *: CD74 Types CD54 Types , pF, Input tr,lf=6 ns) 25° C CD54/74HCU04 Max. Min. 80 16 14 75 15 13 CHARACTERISTIC P ro p a g a -
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CD54HCU04/CD74HCU

D74HCU04

Abstract: Technical Data T '4 V ^ l 'ö O CD54/74HCU04 HARR IS S E M I C O N D SE CT OR F ile N , -2 1 Technical Data' CD54/74HCU04 HARR IS S E M I C O N D SE CT OR 27E » E9 4 3 0 2 27 1 G G l , DC Inp ut or O u tp u t Voltage, Vi, Vo O perating Tem perature, T*: CD74 Types CD54 Types In p u t , :_ T ~ 4 3 -2 J CD54/74HCU04 HA RR IS S E M I C O N D S E CT OR S TA TIC ELE C TR IC A , 6 n s ) T Y P IC A L VALUES CD 54/74U04 5 14 CHAR AC TER ISTIC P ropagation Delay, Data Input to
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D74HCU04 74HCU04 54/74HCU04 CD74H CD54H
Abstract: Technical Data CD54/74HCU04 File N um b er 1655 High-Speed CMOS Logic - V cc , in v e rte r s c h e m a tic . Fig. 1 - L o g ic d ia g ra m . 628 Technical Data CD54 , O pe ratin g Tem perature, T A: CD74 Types CD54 Types In p u t Rise and Fall Tim es, t,tt: at 2 V , Data CD54/74HCU04 STATIC ELECTRICAL CHARACTERISTICS CD54HCU04 CD74HCU04 +25° C Min. Max. 1.7 - , = 5 V, T* = 25°C, Input l r, t, = 6 ns) TYPICAL VALUES CDS4/74U04 5 14 CHARACTERISTIC P ro p a -
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CDS4/74U04

74HCU04F

Abstract: Technical Data CD54/74HCU04 F ile N u m be r 1655 High-Speed CMOS Logic :s : í3 , - L o g ic d ia g ra m . 628 _ Technical Data CD54/74HCU04 MAXIMUM RATING8 , _ CD54/74HCU04 STATIC ELECTRICAL CHARACTERISTICS CD54HCU04 CD74HCU04 +25° C Max. Min. 1.7 3.6 4.8 - - , , = 6 n*) TYPICAL VALUES CDS4/74U04 5 14 CHARACTERISTIC P ro p a g a tio n Delay, Data In p u t , CHARACTERISTICS (CL=50 pF, Input t,t,=8 ns) 25` C CD54/74HCU04 Min. Max. - 70 - 14 12 - - 75 - 15 - 13 -40°
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OCR Scan
74HCU04F

HC 4053 M

Abstract: ic hc 4053 Technical Data CD54/74HC4051, CD54/74HCT4051 CD54/74HC4052, CD54/74HCT4052 CD54/74HC4053, CD54 , ke"sw itching File Num ber 1676 COM OUT/IN A - VEE - GNO CD54/74HC/HCT4051 TERMINAL ASSIGNMENT The RCA CD54/74H C /H C T4051, 4052, and 4053 are d ig i tally con trolled analog sw itches w , V o l. I/o h TR U TH TABLE CD54/74HC/HCT4051 INPUT STATES "ON" ENABLE S2 S1 SO CHANNELS L L L L , on't Care 514 Technical Data CD54/74HC4051, CD54/74HCT4051 CD54/74HC4052, CD54/74HCT4052 CD54
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HC 4053 M ic hc 4053 cd 4053 M hc 4051 4053 pin diagram of ic 74hc4052 CD54/74HC4051 CD54/74HCT4051 CD54/74HC4052 CD54/74HCT4052 CD54/74HC4053 CD54/74HCT4053

INDUCTOR 220uH

Abstract: CD54 IRATED (Adc) CD54 - 100 10 0.10 1.5 CD54 - 120 12 0.12 1.4 CD54 - 150 15 0.14 1.3 CD54 - 180 18 0.15 1.2 CD54 - 220 22 0.18 1.1 CD54 - 270 27 0.20 0.97 CD54 - 330 33 0.23 0.88 CD54 - 390 39 0.32 0.80 CD54 - 470 47 0.37 CD54 - 560 56 0.42 0.68 CD54 - 680 68 0.46 0.61 CD54- 820 82 , 0.58 CD54 - 101 100 0.70 120 0.93 0.48 CD54- 151 150 1.10 0.40 CD54 -
Xinwang Electronics
Original
INDUCTOR 220uH CD54 CD54-151 220UH 5.0 uH inductor CD54T CD54-

74fct241

Abstract: 74fCT244at I nts Data sheet acquired from Harris Semiconductor SCHS270A CD54/74FCT240, CD54/74FCT240AT, CD54/74FCT241, CD54/74FCT244, CD54/74FCT244AT FCT Interface Logic Octal Buffers/Line Drivers, Three-State Description The CD54/74FCT240, 240AT, 241, 244 and 244AT threestate octal buffers/line drivers , switching speed and is capable of sinking 48mA to 64mA. The CD54/74FCT240, 240AT, 244 and 244AT have activeLOW output enables (IO E , 2 0 E ). The CD54/74FCT241 and CD54/74FCT241AT have one active-LOW (IO E
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OCR Scan
74fct241 74fCT244at CD74FCT240AT CD74FCT244AT CD54/74FCT240 CD54/74FCT240AT CD54/74FCT241 CD54/74FCT244

4352H

Abstract: tla 3683 New Data CD54/74HC4351, CD54/74HCT4351 CD54/74HC4352, CD54/74HCT4352 CD54/74HC4353, CD54 , Fig. 1 - Functional diagram of HC/HCT4351. 726 New Data CD54/74HC4351, CD54/74HCT4351 CD54/74HC4352, CD54/74HCT4352 CD/74HC4353, CD54/74HCT4353 TR U TH TA BLE C D 54/74H C /H C T4351 IN P U T , . 727 CD54/74HC4351, CD54/74HCT4351 CD54/74HC4352, CD54/74HCT4352 CD54/74HC4353, CD54/74HCT4353 TR , Data CD54/74HC4351, CD54/74HCT4351 CD54/74HC4352, CD54/74HCT4352 CD54/74HC4353, CD54/74HCT4353 TR U
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OCR Scan
4352H tla 3683 74hct4352 SS74HC CD54/74HC4351 CD54/74HCT4351 CD54/74HC4352 CD54/74HCT4352 CD54/74HC4353 CD54/74HCT4353

ACT540

Abstract: ACT541 Technical Data CD54/74AC540, CD54/74AC541 CD54/74ACT540, CD54/74ACT541 541 540 ao _2 ie , RCA-CD54/74AC540, -541 and CD54/74ACT540, -541 octal buffer/line drivers use the RCA ADVANCED CMOS technology. The CD54/74AC/ACT540 are inverting 3-state buffers having two active-LOW output enables. The CD54 , of Fairchild Semiconductor Corp. TRUTH TABLE TRUTH TABLE CD54/74AC/ACT540 INPUTS OUTPUTS OE1, OE2 A Y L L H L H L H X Z CD54/74AC/ACT541 INPUTS OUTPUTS OÉÏ, ÃE2 A Y L L H L H L H X
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ACT540 ACT541 J406 74ACT541 74AC540 CD54/74AC540 CD54/74AC541 CD54/74ACT540 CD54/74ACT541 SCHS285 CD74AC/ACT540

74hct4518

Abstract: 24201B Technical Data CD54/74HC4518, CD54/74HCT4518 CD54/74HC4520, CD54/74HCT4520 High-Speed CMOS Logic Dual Synchronous Counters IMR 2CP 2E File N um ber 1665 CD54/74HC/HCT4518 - BCD CD54/74HC , IAG RA M The RCA CD54/74HC4518 and CD54/74HCT4518 are dual B C D u p -c o u n te rs . T h e RC A C D 5 4 /7 4 H C 4 5 2 0 and CD54/74HCT4520 are dual binary up-counters. Each device consists of tw o , . 1 /o h T E R M IN A L A S S IG N M E N T 580 III Technical Data CD54/74HC4518, CD54
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OCR Scan
74hct4518 24201B BCD counter 74HCT4518 74HC 4518 74HC-HCT4518 CD54/74HC4518 CD54/74HCT4518 CD54/74HC4520 CD54/74HCT4520 CD54/74HC/HCT4518 CD54/74HC/HCT4520

74AC323

Abstract: SC H S288 CD54/74AC299, CD54/74AC323 CD54/74ACT299, CD54/74ACT323 S O -Ô Ë Ï -Q £ 2 , Common Parallel I/O Pins CD54/74AC/ACT299 - Asynchronous Reset CD54/74AC/ACT323 - Synchronous Reset , - - 92CS - 9 4 4 5 7 TERMINAL ASSIGNMENT The RCA CD54/74AC299 and CD54/74AC323 and the CD54/74ACT299 and C054/74ACT323 are 3-state, 8-input universal shift/storage registers w ith com m , one setup tim e prio r to the positive transition of the clock, W ith the CD54/74AC/ACT299, the
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OCR Scan
74AC323 CD54/74AC299 CD54/74AC323 CD54/74ACT299 CD54/74ACT323 CD54/74AC/ACT299 CD54/74AC/ACT323
Abstract: CD54/74FCT843A, CD54/74FCT843BT CD54/74FCT844A, CD54/74FCT844BT July 1990 843A 844A 9-Bit Transparent Latch, 3-State CD54/74FCT843A, CD54/74FCT843BT - Non-Inverting CD54/74FCT844A, CD54/74FCT844BT - , - CD54/74FCT843A, CD54/74FCT843BT CD54/74FCT844A, CD54/74FCT844BT M A X IM U M R A T IN G S , A b , -5 5 °C to +125°C Operating Temperature, TA Input Rise and Fall Slew Rate, dt/dv CD54/74FCT844A, CD54/74FCT844BT TYPES CD54/74FCT843A, CD54/74FCT843BT TYPES 1 13 KJ EN do |T -
OCR Scan
CD54/74FCT843A CD54/74FCT843BT CD54/74FCT844A CD54/74FCT844BT FCT843A 54/74FCT843A

74FCT244AT

Abstract: 74fct240 2 3 HARRIS S E M I C O N D U C T O R February 1996 CD54/74FCT240, CD54/74FCT240AT, CD54/74FCT241, CD54/74FCT244, CD54/74FCT244AT FCT Interface Logic Octal Buffers/Line Drivers, Three-State Description The CD54/74FCT240, 240AT, 241, 244 and 244AT threestate octal buffers/line drivers use a , enables (1 0 E , 2 0 E ). The CD54/74FCT241 and CD54/74FCT241AT have one active-LOW (1 0 E ) and one active-HIGH (2 0 E ) output enable. Features · CD54/74FCT240, CD54/74FCT240AT - Inverting · CD54/74FCT241
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OCR Scan
74fct240 74fct244 CD54/74FCT244AT D54/74FCT240 CD54/74FCT241AT FCT240AT FCT244AT CD54/74FC

rca 1967

Abstract: 74AC112 Technical Data ^ Texas Instruments CD54/74AC109, CD54/74AC1Ì2 CD54/74ACT109, CD54/74ACT112 Data sheet acquired from Harris Semiconductor SCHS282 vcc = 16 gnd = e 92cs-3sï32 CD54/74AC/ACT109 FUNCTIONAL DIAGRAM Dual "J-K" Flip-Flop with Set and Reset CD54/74AC/ACT109 - Positive-Edge-Triggered (J, K) CD54/74AC/ACT112 - Negative-Edge-Triggered (J, K) Type Features: â  Buffered inputs â  Typical propagation delay: 4.8 rts @ Vcc = 5 V, 7a ~ 25°C, Ct = 50 pF The RCA CD54/74AC109 and CD54/74AC112 and the
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OCR Scan
rca 1967 74AC112 CD54/74AC109 CD54/74AC1 CD54/74ACT109 CD54/74ACT112 CD54/74AC/ACT109 CD54/74AC/ACT112

74hc191

Abstract: Technical Data CD54/74HC190, CD54/74HCT190 CD54/74HC191, CD54/74HCT191 Texas File N um ber , - 38520R 2 CD54/74HC/HCT190 BCD Decade Counter CD54/74HC/HCT191 Binary Counter Type Features , (E suffix) and in 16-lead dual-in-line surface mount plastic packages (M suffix). The CD54/74HC/HCT190 and the CD54/74HC/ HCT191 are also supplied in chip form (H suffix). Family Features: F anout , - - Technical Data CD54/74HC190, CD54/74HCT190 CD54/74HC191, CD54/74HCT191 F ig . 1 -
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OCR Scan
74hc191 CD54/74HC190 CD54/74HCT190 CD54/74HC191 CD54/74HCT191 SCHS275 HC/HCT191

CD74HCT160

Abstract: IC 74160 decade counter diagram Technical Data File Num ber 1 5 5 0 CD54/74HC/HCT160, CD54/74HC/HCT161 CD54/74HC/HCT162, CD54 , /74H C /H CT160 CD54/74HC/HCT161 C D54/74H C /H CT162 C D 54/74H C /H C T163 T y p e Features: BCD , Two Count Enable Inputs lor n-Bit Cascading Asynchronous Reset (CD54/74HC/HCT160, 161) Synchronous Reset ( CD54/74HC/HCT162, 163) Look-Ahead Carry for High-Speed Counting F am ily Features: The , ahead carry logic for use in high-speed counting applica tions. The CD54/74HC/HCT160 and 161 are
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OCR Scan
CD74HCT160 IC 74160 decade counter diagram pin diagram of ic 74163 CD54/74HC/HCT160 CD54/74HC/HCT161 CD54/74HC/HCT162 CD54/74HC/HCT163 RCA-CD54/74HC/HCT160 CD54/74HC

CD54AC157

Abstract: CD54ACT157 ; Technical Data ^ Texas Instruments Data sheet acquired from Harris Semiconductor SCHS283 CD54/74AC157, CD54/74AC158 CD54/74ACT157, GD54/74ACT158 AC/ACT AC/ACT "oâ'"l 157 198 - iv îy *o-fl - , propagation delay (AC/ACT158): 3.8 ns @ Vcc = 5 V, T* = 25° C, CL = 50 pF The RCA CD54/74AC157, -158 and CD54 , GND 8 H = High level, L = Low level, X = Don't care 92 CS-421B» CD54/74AC/ACT157 92CS-4236à CD54/74AC/ACT158 This data sheet is applicable to the CD54/74AC157 and CD74AC158. The CD54AC158, CD54ACT157
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OCR Scan
CD54AC157 CD54/74AC157 CD54/74AC158 CD54/74ACT157 AC/ACT157 CD74AC/ACT157 CD74AC/ACT158

cd4000 cmos logic series guide

Abstract: harris CD4011BE Octal Buffer/Line Driver Octal Transparent Latch w/3-State CD54/74FCT7651 CD54/74FCT821A CD54/74FCT822A CD54/74FCT823A CD54/74FCT824A CD54/74FCT841A CD54/74FCT842A CD54/74FCT843A Multilevel Pipeline Register , -State Positive-Edge Triggered Octal Transparent Latch, 3-State CD54/74FCT844A CD54/74FCT861A CD54/74FCT863A , CD74FCT162500T CD74FCT162501T CD74FCT162511T CD74FCT162540T CD74FCT162541T CD74FCT162543T CD54/74FCT7623 CD54/74FCT574AT CD54/74FCT623 CD54/74FCT646 CD54/74FCT646AT CD54/74FCT651 CD54/74FCT652 CD54/74FCT653 CD54
Harris Semiconductor
Original
16XXX 163XXX AN8809 cd4000 cmos logic series guide harris CD4011BE CD74LPT244 74FCT7623 CD74FCT162249ATMT 162XXX CD74LPT16591SM LPT16
Abstract: 33 H June 1998 A R R IS S E M I C O N D U C T O R Technical Data CD54/74AC653, CD54/74AC654 CD54/74ACT653, C054/74ACT654 Octal-Bus Transceivers/Registers, Open-Drain (A Side), 3-State (B Side) CD54/74AC/ACT653 - Inverting CD54/74AC/ACT654 - Non-Inverting OEa B Fi ' P £}£.PI C AB C LOC K , = 25°C, CL = 50 pF FU N C TIO N A L DIAGRAM The Harris CD54/74AC653 and CD54/74AC654 and the CD54/74ACT653 and CD54/74ACT654 octal-bus transceiv ers/registers use the Harris ADVANCED CMOS -
OCR Scan
CD54/74AC653 CD54/74AC654 CD54/74ACT653 CD54/74AC/ACT653 CD54/74AC/ACT654 CD54/74ACT654

inverter schematic

Abstract: 74HCTU04 (Vcc = 5 V, T a = 25° C, Input t, t, = 6 ns) TYPICAL VALUES CD54/74U04 6 14 CHARACTERISTIC P ro p
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inverter schematic 74HCTU04 mas 6 rca CD54/74HCTU04 RCA-CD54/74HCU04 CD54HCU04/CD74HCU04 9ZCS-383S7 92CS-3837SRI CD54/74
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