| Contextual Datasheet Results |
1 - 50 of about 410 for Actel |
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First line: Errata v2.0 54SX Family FPGAs RadTolerant HiRel Errata Table page Maximum Input Abstract: .. © 2002 Actel Corporation. Errata v2.0. 54SX Family FPGAs RadTolerant and HiRel Errata In Table 1 on page 8, the Maximum Input Tolerance for the A54SX16 and A54SX32 devices is incorrect. Here is how .. datasheet abstract.. |
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First line: Addendum Family FPGAs Ordering Information updated include RoHS information. A1280 Application Temperature Abstract: .. © 2006 Actel Corporation. ACT 2 Family FPGAs. The Ordering Information was updated to include RoHS information. _ Part Number. Speed Grade. Package Type. Package Lead Count. C = Commercial 0 to +70ûC .. datasheet abstract.. |
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First line: Addendum Series FPGAs Ordering Information updated include RoHS information. A1010 Application Temperature Abstract: .. © 2006 Actel Corporation. ACT 1 Series FPGAs. The Ordering Information was updated to include RoHS information. _ Part Number. Speed Grade. Package Type. Package Lead Count. C = Commercial 0 to +70 ̊ .. datasheet abstract.. |
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First line: Package CQ256 FG484 Device A54SX72A RT54SX72S devices A54SX32A RT54SX32S devices Abstract: .. http://www.actel.com/docs/sockets/CQ256-FG484adaptSX32_SX72.pdf. 2 CQ256 to FG484 For A54SX32A and. RT54SX32S devices SI-SX32-ACQ256SFG484 Ironwood Electronics Part Number: C4228 .. datasheet abstract.. |
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First line: Addendum Accelerator Series FPGAs Family Ordering Information updated include RoHS information. A114100 Abstract: .. © 2006 Actel Corporation. Accelerator Series FPGAs – ACT 3 Family. The Ordering Information was updated to include RoHS information. _ Part Number. Speed Grade. Package Type. Package Lead Count. C = Commercial .. datasheet abstract.. |
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First line: Actel Debug Demo Boards Demo Boards CorePCI Core1553B Evaluation Boards Debug Demo Abstract: .. Actel: Debug & Demo Boards: Demo Boards: CorePCI and Core1553B Evaluation Boards. Debug & Demo Boards: CorePCI and Core1553B Evaluation Boards. Advanced Search Site Map. CorePCI and Core1553B .. datasheet abstract.. |
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First line: Actels Flash Features Compact Robust Supports Actel ProASIC ProASICPLUS Devices Supports In-System Abstract: .. Actel’s ProASICPLUS devices offer the benefits of low power, high performance, and fast time to market. They have the additional advantage of. In-System Programmability ISP , providing even .. datasheet abstract.. |
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First line: v2.0 Socket Recommendation Actel FPGA Packages Actel offers range surface-mount sockets make Abstract: .. © 2001 Actel Corporation. Socket Recommendation for Actel FPGA Packages Sockets for Prototyping with Actel FPGAs. Actel offers a range of surface-mount sockets to make it easier for designers .. datasheet abstract.. |
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6 Pages |
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First line: Application Note AC246 Level Shifter Design Example Contents General Description Design Description Abstract: .. © 2009 Actel Corporation. Level Shifter Design Example. Contents. General Description Semiconductor technology advancements, proliferating I/O standards, legacy support requirements, and .. datasheet abstract.. |
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First line: Contact Hank Perret Actel Corporation 522-4542 Release April P.M. ACTEL ANNOUNCES RECORD Abstract: .. Contact: Hank Perret, Actel Corporation 408 522-4542. For Release: April 25, 2000 @ 1:30 P.M. PDT. ACTEL ANNOUNCES RECORD. QUARTERLY REVENUES AND PROFITS. Sunnyvale, Calif. – Actel Corporation .. datasheet abstract.. |
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First line: v3.1 Socket Recommendation Actel FPGA Packages Sockets Prototyping with Actel FPGAs Actel Abstract: .. © 2003 Actel Corporation. v3.1. Socket Recommendation for Actel FPGA Packages Sockets for Prototyping with Actel FPGAs. Actel offers a range of surface-mount sockets to make it easier for designers .. datasheet abstract.. |
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First line: Application Note AC210 Laser Range Finder Using Actels Axcelerator FPGA Introduction modern Abstract: .. © 2004 Actel Corporation. Laser Range Finder Using Actel's Axcelerator FPGA. Introduction In modern warfare, laser-guided weapons play a significant role in ensuring each warhead deployed will .. datasheet abstract.. |
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11 Pages 
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First line: Using Synplify Design Actel Radiation-Hardened FPGAs Actels RadHard RadTolerant FPGAs offer Abstract: .. © 2000 Actel Corporation. Application Note. Using Synplify to Design in Actel Radiation-Hardened FPGAs Introduction. Actel’s RadHard and RadTolerant FPGAs offer advantages for applications .. datasheet abstract.. |
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First line: CoreAPB Product Summary Intended Intended Processor Subsystem Implement Advanced Peripheral APB Fabric Abstract: .. © 2008 Actel Corporation. CoreAPB. Product Summary. Intended Use • Intended for Use in a Processor Subsystem to Implement the Advanced Peripheral Bus APB Fabric Configured for Easy and Automatic .. datasheet abstract.. |
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First line: CoreAHB2APB Features Supplied SysBASIC Core Bundle Bridges between Advanced Microcontroller Architecture AMBA Abstract: .. © 2008 Actel Corporation. CoreAHB2APB. Key Features • Supplied in SysBASIC Core Bundle Bridges between Advanced Microcontroller Bus Architecture AMBA Advanced High-Performance. Bus AHB .. datasheet abstract.. |
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First line: CoreRemap Product Summary Intended Intended Processor-Based Subsystem with Flash Memory Contents General Abstract: .. Synthesis and Simulation Support Supported in the Actel Libero® Integrated Design Environment IDE Verification and Compliance Compliant with AMBA. General Description This APB slave is .. datasheet abstract.. |
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First line: CoreGPIO Product Summary Intended General-Purpose Input / Output Block Intended Processor Subsystem Read Write Abstract: .. Synthesis and Simulation Support Supported in the Actel Libero® Integrated Design Environment IDE Verification and Compliance Compliant with AMBA. General Description CoreGPIO is an APB .. datasheet abstract.. |
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First line: DSCC Cross Reference Guide Table Actel Part Numbers DSCC Drawing Numbers Actel Abstract: .. DSCC Cross Reference Guide. October 2007. Table 1: Actel Part Numbers to DSCC Drawing Numbers. Devices Pin-Package. Actel Part Number DSCC Drawing Number DSCC Drawing. Number. Gold Leads Solder .. datasheet abstract.. |
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First line: Power Requirements Actel A54SX08 Altera CPLDs FPGAs have traditionally been perceived Abstract: .. © 2000 Actel Corporation. Application Note. Power Requirements: Actel A54SX08 vs. Altera CPLDs. Introduction. FPGAs have traditionally been perceived as inferior in performance to CPLDs. Actel .. datasheet abstract.. |
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First line: CoreAPB3 Product Summary Intended Intended Processor-Based Systems Implement AMBA Fabric Allows Connection Abstract: .. © 2008 Actel Corporation. CoreAPB3. Product Summary. Intended Use • Intended for Use in Processor-Based Systems to Implement the AMBA APB Bus Fabric Allows Connection of either AMBA, APB2, or APB3 .. datasheet abstract.. |
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First line: MicroTCA Power Module Reference Design Features Complete MicroTCA Power Module Reference Design Abstract: .. October 2006 1. © 2006 Actel Corporation See the Actel website for the latest version of the datasheet. Product Brief. MicroTCA Power Module Reference Design. Features • Complete MicroTCA Power .. datasheet abstract.. |
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First line: RADIATION PERFORMANCE ACTEL PRODUCTS J.J. Wang Technology Development Actel Corporation 408-522-4576 Rev7 Abstract: .. 1. RADIATION PERFORMANCE OF ACTEL PRODUCTS. J.J. Wang. Technology Development Actel Corporation 408-522-4576 jih-jong.wang@actel.com. Rev7 November 8, 2000 2. I. TOTAL IONIZING DOSE TID PERFORMANCE .. datasheet abstract.. |
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First line: Application Note Programming External Flash Memory CoreMP7based Development Boards Introduction Programming external Abstract: .. © 2008 Actel Corporation. Programming External Flash Memory on CoreMP7-based Development Boards. Introduction Programming external memory for an embedded processor in an FPGA can be a challenge .. datasheet abstract.. |
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First line: CoreFROM Product Summary Intended Intended Processor-Based Subsystem Access On-Chip FROM Memory Contents Abstract: .. Synthesis and Simulation Support Supported in the Actel Libero® Integrated Design Environment IDE Verification and Compliance Compliant with AMBA. General Description CoreFROM is an APB .. datasheet abstract.. |
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First line: Application Note AC331 Flash Freeze Control Using JTAG Introduction Actel IGLOO ProASIC3L families Abstract: .. © 2009 Actel Corporation. Flash*Freeze Control Using JTAG. Introduction The Actel IGLOO® and ProASIC®3L families of FPGA devices are based on Actel nonvolatile flash technology and single-chip .. datasheet abstract.. |
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First line: CZ80CPU General Description Implements fast fully-functional single-chip 8bit microprocessor with same instruction Abstract: .. Developed for easy reuse in Actel FPGA applications, the CZ80CPU is available optimized for several device families with competitive utilization and performance characteristics. Symbol .. datasheet abstract.. |
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First line: Application Note AC278 Actel BSDL Files Format Description BSDL standard data format Abstract: .. © 2006 Actel Corporation. Actel BSDL Files Format Description. BSDL is a standard data format a subset of VHDL that describes the implementation of JTAG IEEE 1149.1 in a device. BSDL was approved .. datasheet abstract.. |
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First line: Application Note AC211 32-Channel Waveform Generator Implemented Using Actels Axcelerator FPGA Introduction Abstract: .. © 2004 Actel Corporation. 32-Channel Waveform Generator Implemented Using Actel's Axcelerator FPGA. Introduction Waveform generators are widely used in high-speed applications. A few examples .. datasheet abstract.. |
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First line: CoreAhbSram Product Summary Intended Provides Advanced Microcontroller Architecture AMBA Advanced High-Performance AHB Abstract: .. November 2008 v2.2 1. © 2008 Actel Corporation. CoreAhbSram. Product Summary. Intended Use • Provides an Advanced Microcontroller Bus Architecture AMBA Advanced High-Performance Bus AHB Interface .. datasheet abstract.. |
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First line: Preliminary v0.4 Actel Fusion Mixed-Signal FPGA MicroBlade Advanced Mezzanine Card Solution Features Abstract: .. © 2009 Actel Corporation. Actel Fusion Mixed-Signal FPGA for the MicroBlade Advanced Mezzanine Card Solution. Features and Benefits • Targeted to Advanced Mezzanine Card AdvancedMCTM Designs .. datasheet abstract.. |
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First line: Solutions Improve Time-to-Market Reduce Design Risk Actels Solutions Complement Actels Nonvolatile Secure Abstract: .. IP Solutions Improve Time-to-Market and. Reduce Design Risk. Actel’s IP Solutions. — Complement Actel’s Nonvolatile, Secure, Low-Power Antifuse and Flash FPGAs. — Available in Evaluation, RTL .. datasheet abstract.. |
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First line: RTAX-S / SL RadTolerant FPGAs Radiation Performance SEU-Hardened Registers Eliminate Need TripleModule Redundancy TMR Abstract: .. May 2009 1. © 2009 Actel Corporation See the Actel website for the latest version of the datasheet. Product Brief. RTAX-S/SL RadTolerant FPGAs. Radiation Performance • SEU-Hardened Registers Eliminate .. datasheet abstract.. |
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First line: Preliminary v0.4 Actel Fusion Mixed-Signal FPGAs MicroBlade Advanced Mezzanine Card Solution Features Abstract: .. © 2008 Actel Corporation. Actel Fusion Mixed-Signal FPGAs for the MicroBlade Advanced Mezzanine Card Solution. Features and Benefits • Targeted to Advanced Mezzanine Card AdvancedMCTM Designs .. datasheet abstract.. |
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First line: v5.4 RTAX-S / SL RadTolerant FPGAs Radiation Performance SEU-Hardened Registers Eliminate Need TripleModule Redundancy Abstract: .. May 2009 i. © 2009 Actel Corporation See the Actel website for the latest version of the datasheet. v5.4. RTAX-S/SL RadTolerant FPGAs. Radiation Performance • SEU-Hardened Registers Eliminate .. datasheet abstract.. |
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First line: Verilog Simulation Guide Windows UNIX Environments Actel Corporation Sunnyvale Actel Corporation. rights Abstract: .. Actel Corporation, Sunnyvale, CA 94086 © 2000 Actel Corporation. All rights reserved. Printed in the United States of America. Part Number: 5579005-4. Release: July 2000. No part of this document .. datasheet abstract.. |
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First line: Application Note AC305 Implementation SpaceWire Clock Recovery Logic Actel RTAX-S Devices Introduction Abstract: .. © 2007 Actel Corporation. Implementation of the SpaceWire Clock Recovery Logic in Actel RTAX-S Devices. Introduction This application notes describes the implementation of the SpaceWire clock .. datasheet abstract.. |
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First line: Preliminary v1.7 Actel Fusion Mixed-Signal FPGAs Family with Optional ARM Support Features Abstract: .. © 2009 Actel Corporation. Actel Fusion Mixed-Signal FPGAs Family with Optional ARM® Support. Features and Benefits High-Performance Reprogrammable Flash Technology • Advanced 130-nm, 7-Layer .. datasheet abstract.. |
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First line: Termination Mode RH1020 RH1280 Devices Radiation Environment There concern about Actel RH1020 Abstract: .. © 2001 Actel Corporation. Technical Brief. Termination of the VPP and Mode Pin for RH1020 and RH1280 Devices in a Radiation Environment. There is a concern about the use of Actel RH1020 or RH1280 Field .. datasheet abstract.. |
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First line: Termination Mode RH1020 RH1280 Devices Radiation Environment There concern about Actel RH1020 Abstract: .. © 2001 Actel Corporation. Technical Brief. Termination of the VPP and Mode Pin for RH1020 and RH1280 Devices in a Radiation Environment. There is a concern about the use of Actel RH1020 or RH1280 Field .. datasheet abstract.. |
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First line: In-System Programming ProASIC 500K Devices with Silicon Sculptor Design engineers today Abstract: .. © 2000 Actel Corporation. Application Note. In-System Programming ProASICTM 500K Devices with Silicon Sculptor Introduction. Design engineers today are increasingly required to work in a problem .. datasheet abstract.. |
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First line: RTAX-DSP Radiation-Tolerant FPGAs Radiation Performance SEU-Hardened Registers Eliminate Need TripleModule Redundancy TMR Abstract: .. September 2008 i. © 2008 Actel Corporation See the Actel website for the latest version of the datasheet. Product Brief. RTAX-DSP Radiation-Tolerant FPGAs. Radiation Performance • SEU-Hardened .. datasheet abstract.. |
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First line: Application Note AC270 Flash Emulation Fusion Devices Design Example Contents General Description Abstract: .. © 2009 Actel Corporation. SPI Flash Emulation for Fusion Devices Design Example. Contents. General Description As the world's first mixed-signal programmable logic family, Actel’s Fusion® FPGAs .. datasheet abstract.. |
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First line: News October Quicklogic Corp. Sunnyvale Calif. announced class devices speed development complex Abstract: .. The company also announced an out-of-court settlement with Actel Corp. also in Sunnyvale of all pending litigation between the companies. The suits and countersuits, which involved antifuse .. datasheet abstract.. |
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First line: v3.0 Arbiter Core Support Five Masters Support Arbitration Schemes Pure Rotation Fair Abstract: .. Implementation in Actel’s SX Family. VHDL Code. Device Utilization 54SX Approximately 100-150 Modules. General Description. The Arbiter core is used to efficiently manage access to a PCI bus .. datasheet abstract.. |
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First line: Application Note Testing Burn-In Actel FPGAs Burn-in tests operating devices dynamically high Abstract: .. © 2000 Actel Corporation. Application Note. Testing and Burn-In of Actel FPGAs Introduction. Burn-in tests, for operating devices dynamically at a high temperature and extrapolating the failure .. datasheet abstract.. |
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First line: Application Note AC329 Mobile SDRAM Interface Design Example Contents Overview Design Description Abstract: .. © 2009 Actel Corporation. Mobile SDRAM Interface Design Example. Contents. Overview This document describes the design example for interfacing Actel low-power FPGAs with Mobile SDRAM devices .. datasheet abstract.. |
585.78 Kb |
12 Pages 
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First line: Application Note AC231 Frequency Fine Tuning Clock Dithering Using Actel FPGA Devices Abstract: .. © 2005 Actel Corporation. Frequency Fine Tuning and Clock Dithering Using Actel FPGA Devices. Introduction The PLLs embedded within Actel FPGAs offer a variety of divider and multiplier blocks .. datasheet abstract.. |
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First line: CoreU1PHY UTOPIA Level Interface Product Summary Intended Standard UTOPIA Level Interface Link-Layer Abstract: .. December 2005 v4.0 1. © 2005 Actel Corporation. CoreU1PHY – UTOPIA Level 1 PHY Interface. Product Summary. Intended Use • Standard UTOPIA Level 1 PHY Interface to any ATM Link-Layer Device. Key Features .. datasheet abstract.. |
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First line: CoreU1LL UTOPIA Level Link-Layer Interface Product Summary Industry Standard Synthesis Simulation Tools Abstract: .. December 2005 v4.0 1. © 2005 Actel Corporation. CoreU1LL UTOPIA Level 1 Link-Layer Interface. Product Summary. Intended Use • Standard UTOPIA Level 1 Interface to any ATM PHY-Layer Device. Key Features .. datasheet abstract.. |
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First line: Application Note AC268 Using IGLOO ProASIC3 FPGAs System Power Sequencer Design Example Abstract: .. © 2009 Actel Corporation. Using IGLOO® and ProASIC®3 FPGAs as a System Power Sequencer Design Example. Contents. General Description As system cost, power, and performance drive development of .. datasheet abstract.. |
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