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SN74ALS163BDRE4 Texas Instruments Synchronous 4-Bit Binary Counters 16-SOIC 0 to 70 visit Texas Instruments
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Part : SN54ALS163BJ Supplier : Texas Instruments Manufacturer : Avnet Stock : 77 Best Price : $7.19 Price Each : $8.29
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Part : DM74ALS163BM Supplier : Fairchild Semiconductor Manufacturer : Rochester Electronics Stock : 1,994 Best Price : $0.29 Price Each : $0.29
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Part : DM74ALS163BM Supplier : ON Semiconductor Manufacturer : Chip1Stop Stock : 1,854 Best Price : $0.2067 Price Each : $0.2067
Part : SN74ALS163BN Supplier : Texas Instruments Manufacturer : Chip1Stop Stock : 675 Best Price : $0.9830 Price Each : $0.9830
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Part : SN74ALS163BD Supplier : Texas Instruments Manufacturer : Farnell element14 Stock : - Best Price : £0.3420 Price Each : £0.9970
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ALS163B

Catalog Datasheet MFG & Type PDF Document Tags

162b- d

Abstract: 163B 'ALS162B is a four-bit decade counter, while the 'ALS161B and 'ALS163B are four-bit binary counters. The 'ALS161B clears asynchronously, while the 'ALS162B and 'ALS163B clear synchronously. The carry output is , inputs. These two counters are provided with a clear on power-up feature. The 'ALS162B and 'ALS163B , 'ALS163B are also permissible regardless of the levels of logic on the clock, enable or load inputs , 'ALS161B through 'ALS163B may occur regardless of the logic level on the clock. The 'ALS161B through
Fairchild Semiconductor
Original
DM74ALS161B 162b- d 163B DM74ALS161BM 162BM 161B
Abstract: ALS162B are four-bit decade counters, while the ALS161B and ALS163B are four-bit bi nary counters. The ALS160B and ALS161B clear asynchronously, while the ALS162B and ALS163B clear synchro nously. The carry , inputs. These two counters are provided with a clear on power-up feature. The ALS162B and ALS163B clear , all low outputs. Low to high transitions at the clear input of the ALS162B and ALS163B are also , the ALS160B through ALS163B may occur regardless of the logic level on the clock. The ALS160B through -
OCR Scan
DM54ALS/DM74ALS160B DM54ALS DM74ALS
Abstract: â'™ALS163B are four-bit binary counters. The â'™ALS161B clears asynchronously, while the â'™ALS162B and â'™ALS163B clear synchronously. The carry output is decoded to prevent spikes during normal , counters are provided with a clear on power-up feature. The â'™ALS162B and â'™ALS163B clear function is , all low outputs. Low to high transitions at the clear input of the â'™ALS162B and â'™ALS163B are , transitions at the enable P or T inputs of the â'™ALS161B through â'™ALS163B may occur regardless of the -
OCR Scan

ad508

Abstract: '™ALS161B and â'™ALS163B are four-bit binary counters. The â'™ALS161B clears asynchronously, while the â'™ALS162B and â'™ALS163B clear synchronously. The carry output is decoded to prevent spikes during normal , provided with a clear on power-up feature. The â'™ALS162B and â'™ALS163B clear function is synchronous , all low outputs. Low to high transitions at the clear input of the â'™ALS162B and â'™ALS163B are , through â'™ALS163B may occur regardless of the logic level on the clock. The â'™ALS161B through â
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OCR Scan
ad508 DS006206-6 DSOO6206-7 DS006206-3 DS006206-5 163BM DM74ALS161

162BM

Abstract: ALS161B speed counting designs. The 'ALS162B is a four-bit decade counter, while the 'ALS161B and 'ALS163B are four-bit binary counters. The 'ALS161B clears asynchronously, while the 'ALS162B and 'ALS163B clear , 'ALS162B and 'ALS163B clear function is synchronous; and a low level at the clear input sets all four of , 'ALS163B are also permissible regardless of the levels of logic on the clock, enable or load inputs. The , enable P or T inputs of the 'ALS161B through 'ALS163B may occur regardless of the logic level on the
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OCR Scan
DM74ALS161BN S01122 TL/F/6206-6 TL/F/6206 TL/F/6206-5 5D1122

SN54ALS161B

Abstract: SN54ALS162B designs. The SN54ALS162B is a 4-bit decade counter. The 'ALS161B, 'ALS163B, 'AS161, and 'AS163 devices , CLK, LOAD, or enable inputs. The clear function for the SN54ALS162B, 'ALS163B, and 'AS163 devices is , LOAD ENT ENP CLK A B C D 10 7 2 3 4 5 6 'ALS163B AND 'AS163 BINARY COUNTERS WITH , (positive logic) CLR LOAD ENT ENP CLK 1 'ALS163B and 'AS163 9 10 15 7 RCO 2 C1 , , preset, count, and inhibit sequences 'ALS161B, 'AS161, 'ALS163B, and 'AS163 The following sequence is
Texas Instruments
Original
SN54ALS161B SN54ALS163B SN54AS161 SN54AS163 SN74ALS161B SN74AS161
Abstract: designs. The SN54ALS162B is a 4-bit decade counter. The â'™ALS161B, â'™ALS163B, â'™AS161, and â'™AS163 , the CLK, LOAD, or enable inputs. The clear function for the SN54ALS162B, â'™ALS163B, and â'™AS163 , DIRECT CLEAR 1 CLR 9 LOAD ENT ENP CLK A B C D 10 7 2 3 4 5 6 â'™ALS163B AND â , '™ALS163B and â'™AS163 9 10 15 7 RCO 2 C1 14 QA 1D A 3 C1 13 QB 1D , '™ALS161B, â'™AS161, â'™ALS163B, and â'™AS163 The following sequence is illustrated below: 1. Clear Texas Instruments
Original
SN74AS163 SDAS276A ISO/TS16949
Abstract: designs. The SN54ALS162B is a 4-bit decade counter. The â'™ALS161B, â'™ALS163B, â'™AS161, and â'™AS163 , the CLK, LOAD, or enable inputs. The clear function for the SN54ALS162B, â'™ALS163B, and â'™AS163 , DIRECT CLEAR 1 CLR 9 LOAD ENT ENP CLK A B C D 10 7 2 3 4 5 6 â'™ALS163B AND â , '™ALS163B and â'™AS163 9 10 15 7 RCO 2 C1 14 QA 1D A 3 C1 13 QB 1D , '™ALS161B, â'™AS161, â'™ALS163B, and â'™AS163 The following sequence is illustrated below: 1. Clear Texas Instruments
Original

162BM

Abstract: 163B 'ALS161B and 'ALS163B are four-bit binary counters. The 'ALS161B clears asynchronously, while the 'ALS162B and 'ALS163B clear synchronously. The carry output is decoded to prevent spikes during normal , with a clear on power-up feature. The 'ALS162B and 'ALS163B clear function is synchronous; and a low , transitions at the clear input of the 'ALS162B and 'ALS163B are also permissible regardless of the levels of , transitions at the enable P or T inputs of the 'ALS161B through 'ALS163B may occur regardless of the logic
National Semiconductor
Original

162BM

Abstract: 163B 'ALS163B are four-bit binary counters. The 'ALS161B clears asynchronously, while the 'ALS162B and 'ALS163B , 'ALS162B and 'ALS163B clear function is synchronous; and a low level at the clear input sets all four of , 'ALS163B are also permissible regardless of the levels of logic on the clock, enable or load inputs. The , enable P or T inputs of the 'ALS161B through 'ALS163B may occur regardless of the logic level on the clock. The 'ALS161B through 'ALS163B feature a fully Independent clock circuit, changes made to control
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OCR Scan
ALS161 DS006206-4 B04-10 162BN 163BN
Abstract: and ALS162B are four-bit decade counters, while the ALS161B and ALS'163B are four-bit binary counters. The ALS160B and ALS161B clear asynchronously, while the ALS162B and ALS163B clear synchronously. The , ALS163B clear function is synchronous; and a low level at the clear Input sets all four of the flip-flop , counter to all (ow outputs. Low to high transitions at the clear input of the ALS162B and ALS163B are also , the ALS160B through ALS163B may occur regardless of the logic level on the clock. The ALS160B through -
OCR Scan
LSG1122

CTRDIV16

Abstract: SN54ALS160B , and the 'ALS161B, 'ALS163B, 'AS161, and 'AS163 are 4-bit binary counters. Synchronous operation is , . 'ALS162B and 'AS162 decade counters are similar; however the clear is synchronous as shown for the 'ALS163B , COUNTERS WITH DIRECT CLEAR 'ALS163B AND 'AS163 BINARY COUNTERS WITH SYNCHRONOUS CLEAR CTRDIV16 CLR , [2] 5 12 [4] 6 11 [8] QA QB QC QD 'ALS163B and 'AS163 logic diagram , sequences 'ALS161B, 'AS161, 'ALS163B, 'AS163 Illustrated below is the following sequence: 1. Clear
Texas Instruments
Original
SN54ALS160B SN54AS160 SN74ALS160B SN74AS160 SDAS024A D2661

AS163

Abstract: ctrdiv10 , 'ALS163B, 'AS161, and 'AS163 are 4-bit binary counters. Synchronous operation is provided by having all , 'ALS162B, 'ALS163B, 'AS162, and 'AS163 is synchronous and a low level at the clear input sets all four of , synchronous as shown for the 'ALS163B and 'AS163 binary counters. 2-150 Texas ^ Instruments POST OFFICE BOX , ) (21 (3) 1,5D [ 1 ] (4) (131 12] 15) [4] (6) (11) [8] Qa Qb Qc Qd als163b , ] (4) (131 [2] (5) (12) [4] (6) (111 Qa Qb Qc Qd E 'ALS163B and 'AS163 logic
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OCR Scan
ctrdiv10 SN74ALS160 1982-REVISED AS160 SN54AS162 SN74AS162

SN54ALS162

Abstract: application in high-speed counting designs. The SN54ALS162B is a 4-bit decade counter. The 'ALS161B, 'ALS163B , . The clear function for the SN54ALS162B, 'ALS163B, and 'AS163 devices is synchronous, and a low level , M2 G3 G4 C5/2,3,4+ 1, 5D [1] [2] [4] [8] 14 13 12 11 QA QB QC QD 15 'ALS163B AND 'AS163 BINARY , ENT ENP 1 9 10 7 15 RCO 'ALS163B and 'AS163 CLK 2 C1 1D 3 14 QA A C1 1D 13 QB B , inhibit sequences 'ALS161B, 'AS161, 'ALS163B, and 'AS163 The following sequence is illustrated below
Texas Instruments
Original
SN54ALS162

SN74ALS161

Abstract: 30715 typical clear, preset, count, and inhibit sequences 'ALS161B, AS161, ALS163B. 'AS163 Illustrated below , 'ALS161B, 'ALS163B, 'AS 161, and 'AS 163 are 4-bit binary counters. Synchronous operation is provided by , clear function for the 'ALS163B and 'AS163 Is synchronous and a low level at the clear input sets all , COUNTERS WITH DIRECT CLEAR 'ALS163B AND 'AS163 BINARY COUNTERS WITH SYNCHRONOUS CLEAR CLR LOAD ENT ENP â , ) 1,5D [1) (4) (131 121 (SI (41 (12) (6) (11) 181 'ALS163B and 'AS163 logic diagram
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OCR Scan
SN74ALS161 30715 SN54AS183 Synchronous 4-Bit Counters SN54ALS SN54AS SN74ALS SN74AS-

162b- d

Abstract: ALS161B 'ALS162B is a four-bit decade counter while the 'ALS161B and 'ALS163B are four-bit binary counters The 'ALS161B clears asynchronously while the 'ALS162B and 'ALS163B clear synchronously The carry output is , provided with a clear on power-up feature The 'ALS162B and 'ALS163B clear function is synchronous and a , high transitions at the clear input of the 'ALS162B and 'ALS163B are also permissible regardless of , 'ALS161B through 'ALS163B may occur regardless of the logic level on the clock C1995 National
National Semiconductor
Original

dm74als

Abstract: ALS161B and ALS163B are four-bit bi nary counters. The ALS160B and ALS161B clear asynchronously, while the ALS162B and ALS163B clear synchro nously. The carry output is decoded to prevent spikes during normal , provided with a clear on power-up feature. The ALS162B and ALS163B clear func tion is synchronous; and a , transitions at the clear input of the ALS162B and ALS163B are also permissible regardless of the levels of , cascaded stages. High to low level transitions at the enable P or T inputs of the ALS160B through ALS163B
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OCR Scan
SD112E

162b- d

Abstract: 163B , while the ALS161B and ALS163B are four-bit binary counters. The ALS160B and ALS161B clear asynchronously, while the ALS162B and ALS163B clear synchronously. The carry output is decoded to prevent spikes during , power-up feature. The ALS162B and ALS163B clear function is synchronous; and a low level at the clear input , input of the ALS162B and ALS163B are also permissible regardless of the levels of logic on the clock , . High to low level transitions at the enable P or T Inputs of the ALS160B through ALS163B may occur
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OCR Scan
DM54ALS160BJ ALS160B/161B TL/F/6206-2

ALS160

Abstract: CTRDIV16 , and the 'ALS161B, 'ALS163B, 'AS161, and 'AS163 are 4-bit binary counters. Synchronous operation is , . 'ALS162B and 'AS162 decade counters are similar; however the clear is synchronous as shown for the 'ALS163B , COUNTERS WITH DIRECT CLEAR 'ALS163B AND 'AS163 BINARY COUNTERS WITH SYNCHRONOUS CLEAR CTRDIV16 CLR , [2] 5 12 [4] 6 11 [8] QA QB QC QD 'ALS163B and 'AS163 logic diagram , sequences 'ALS161B, 'AS161, 'ALS163B, 'AS163 Illustrated below is the following sequence: 1. Clear
Texas Instruments
Original
ALS160 SN74AS

74ALS163BN

Abstract: 74ALS ) â'¢ Synchronous Reset ('ALS163B) â'¢ High speed synchronous expansion â'¢ Typical count rate of 140MHz DESCRIPTION Synchronous presettable 4-bit binary counters ('ALS161B, 'ALS163B) feature an , function). For the 'ALS163B the clear function is synchronous. A Low level at the Synchronous Reset (SR , , 74ALS163B PIN CONFIGURATION LOGIC SYMBOL LOGIC SYMBOL(IEEEZIEC) ALS163B SR E m vcc CP Q ¡3 TC , ) Hold (do nothing) H X X 1 h X L MODE SELECT-FUNCTION TABLE for 'ALS163B INPUTS OUTPUTS
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OCR Scan
74ALS161B 74ALS 74ALS161BD 74ALS161BN ALS163 140MH

162b- d

Abstract: he S N 54A LS 162B is a 4-bit decade counter. The A LS161B, ALS163B, AS 161, and AS 163 are 4 , ENP CLK 14 Oa A 4 [2] 12 3 M2 G3 3CT=15 RCO ENT 7 2 G4 > C5/2,3,4+ n 1 ,5 D [1] 13 r 10 ALS163B AND , (positive logic) ALS163B and AS163 Pin numbers shown are for the D, J, and N packages. _ A LS 161B , SDAS276 - DECEMBER 1994 typical clear, preset, count, and inhibit sequences ALS161B, AS161, ALS163B , ALS161B su Setup tim e before C L K t ENP, ENT SN54ALS162B, ALS163B ALS161B SN54ALS162B, ALS163B CLR high
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OCR Scan
Abstract: designs. The SN54ALS162B is a 4-bit decade counter. The â'™ALS161B, â'™ALS163B, â'™AS161, and â'™AS163 , the CLK, LOAD, or enable inputs. The clear function for the SN54ALS162B, â'™ALS163B, and â'™AS163 , for operation from 0°C to 70°C. logic symbolsâ'  â'™ALS163B AND â'™AS163 BINARY COUNTERS WITH , '™ALS163B and â'™AS163 9 10 15 7 RCO 2 C1 14 QA 1D A 3 C1 13 QB 1D , '™ALS161B, â'™AS161, â'™ALS163B, and â'™AS163 The following sequence is illustrated below: 1. Clear Texas Instruments
Original
Abstract: feature. The 'A LS162B and 'ALS163B clear function is synchronous; and a low level a t the clear input , t load 'A LS162B, ALS163B S w itching Characteristics o ver recom m ended operating free air tem -
OCR Scan
LS163B
Abstract: application in high-speed counting designs. The SN54ALS162B is a 4-bit decade counter. The 'ALS161B, 'ALS163B , . The clear function for the SN54ALS162B, 'ALS163B, and 'AS163 devices is synchronous, and a low level , M2 G3 G4 C5/2,3,4+ 1, 5D [1] [2] [4] [8] 14 13 12 11 QA QB QC QD 15 'ALS163B AND 'AS163 BINARY , ENT ENP 1 9 10 7 15 RCO 'ALS163B and 'AS163 CLK 2 C1 1D 3 14 QA A C1 1D 13 QB B , inhibit sequences 'ALS161B, 'AS161, 'ALS163B, and 'AS163 The following sequence is illustrated below Texas Instruments
Original
Abstract: application in high-speed counting designs. The SN54ALS162B is a 4-bit decade counter. The 'ALS161B, 'ALS163B , . The clear function for the SN54ALS162B, 'ALS163B, and 'AS163 devices is synchronous, and a low level , M2 G3 G4 C5/2,3,4+ 1, 5D [1] [2] [4] [8] 14 13 12 11 QA QB QC QD 15 'ALS163B AND 'AS163 BINARY , ENT ENP 1 9 10 7 15 RCO 'ALS163B and 'AS163 CLK 2 C1 1D 3 14 QA A C1 1D 13 QB B , inhibit sequences 'ALS161B, 'AS161, 'ALS163B, and 'AS163 The following sequence is illustrated below Texas Instruments
Original
JM38510/38001B2A JM38510/38001BEA SN54ALS161BJ SNJ54ALS161BFK SNJ54ALS161BJ SNJ54ALS161BW

SN54ALS163B

Abstract: SN54AS161 counting designs. The SN54ALS162B is a 4-bit decade counter. The ALS161B, ALS163B, AS161, and AS163 are 4 , inputs. The clear function for the SN54ALS162B, ALS163B, and AS163 is synchronous, and a low level at , 7 2 3 4 5 6 ALS163B AND AS163 BINARY COUNTERS WITH SYNCHRONOUS CLEAR CTRDIV16 CT=0 M1 , ALS163B and AS163 9 10 15 7 RCO 2 C1 14 QA 1D A 3 C1 13 QB 1D , , preset, count, and inhibit sequences ALS161B, AS161, ALS163B, and AS163 The following sequence is
Texas Instruments
Original
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