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First line: sharc transistor equivalent table Figure C-0. Table C-0. Listing C-0. 2YHUYLHZ This feature ADSP-21160 operates same this feature ADSP-2106x family DSPs. more information, corresponding section ADSP-2106x SHARC Users Manual. Abstract: .. ADSP-21160 SHARC Technical Specification, Rev 3.0 C - 1. & 180 5,& 250$76 Figure C-0. Table C-0. Listing C-0. 2YHUYLHZ. This feature on the ADSP-21160 operates the same as this feature on the ADSP .. Tags: transistor equivalent table SHARC ADSP-2106X ADSP-21160 ADSP-2106x |
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First line: transistor equivalent table ,17(558379(&725 $''5(66(6 Figure F-0. Table F-0. Listing F-0. 2YHUYLHZ Abstract: .. ADSP-21160 SHARC Technical Specification, Rev 3.0 F - 1. ,17 558379 &725 $’’5 66 6 Figure F-0. Table F-0. Listing F-0. 2YHUYLHZ. The ADSP-21160Ãs interrupt vector table is similar to the ADSP .. Tags: transistor equivalent table datasheet abstract.. |
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First line: Figure 13-0. Table 13-0. Listing 13-0. 2YHUYLHZ ADSP-21160 serial ports support protocols functions ADSP-21061 serial ports. only changes this chapter are: Clock cycle time derived from core clock frequency. core clock switch significantly higher frequency than with ADSP-2106x 100MHz ADSP-21160). hi Abstract: .. ADSP-21160 SHARC Technical Specification, Rev 3.0 13 - 1. 6 5,$/32576 Figure 13-0. Table 13-0. Listing 13-0. 2YHUYLHZ. The ADSP-21160 serial ports support the protocols and functions of the ADSP .. Tags: ADSP-2106X ADSP-21061 ADSP-21160 ADSP-21061 ADSP-2106x |
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First line: Table 11-0. Figure 11-0. Listing 11-0. 2YHUYLHZ ADSP-21160s host interface allows easy connection standard microprocessor buses, including 16-bit 32-bit, with little additional hardware required. ADSP-21160 accommodates either synchronous asynchronous data transfers, allowing host different clock fr Abstract: .. ADSP-21160 SHARC Technical Specification, Rev 3.0 11 - 1. +267,17 5 $& Table 11-0. Figure 11-0. Listing 11-0. 2YHUYLHZ. The ADSP-21160Ãs host interface allows easy connection to standard microprocessor .. Tags: ADSP-21160s ADPS-21160 |
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First line: Table 10-0. Figure 10-0. Listing 10-0. 2YHUYLHZ ADSP-21160 includes functionality features that allow design multiprocessing systems. These features include distributed, on-chip arbitration shared external bus; unified multiprocessor address space such that internal memory registers ADSP-21160s dire Abstract: .. ADSP-21160 SHARC Technical Specification, Rev 3.0 10 - 1. 08/7,352& 66,1* Table 10-0. Figure 10-0. Listing 10-0. 2YHUYLHZ. The ADSP-21160 includes functionality and features that allow the .. Tags: MAPI HIS DATA63-0 ADDR31-0 |
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First line: ADSP-21000 4 bit barrel shifter circuit diagram 4 bit barrel shifter Frequency multiplier 100MHz ,1752'8&7,21 Figure 1-0. Table 1-0. Listing 1-0. 2YHUYLHZ ADSP-21160 high-performance, 32-bit digital signal processor (DSP). ADSP-21160 preserves high level code compatibility with previous genera Abstract: .. ADSP-21160 SHARC Technical Specification, Rev 3.0 1 - 1. ,1752’8&7,21 Figure 1-0. Table 1-0. Listing 1-0. 2YHUYLHZ. The ADSP-21160 is a high-performance, 32-bit 32-bit digital signal processor DSP .. Tags: Frequency multiplier 100MHz 4 bit barrel shifter 4 bit barrel shifter circuit diagram ADSP-21000 register pairs in ADSP-21060 ADSP-2106X ADSP-21160 ADSP-21000 |
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First line: I-PEX Figure 2-0. Table 2-0. Listing 2-0. 2YHUYLHZ computation units ADSP-21160 provide numeric processing power performing algorithms. ADSP-21160 contains sets three computation units: arithmetic/logic unit (ALU), multiplier, shifter. Additionally, each computation units (referred Processing Elemen Abstract: .. ADSP-21160 SHARC Technical Specification, Rev 3.0 2 - 1. &20387$7,2181,76 Figure 2-0. Table 2-0. Listing 2-0. 2YHUYLHZ. The computation units of the ADSP-21160 provide the numeric process-ing .. Tags: I-PEX ADSP-21160 ADSP-2106x |
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First line: 6<67(0'(6,*1 Figure 14-0. Table 14-0. Listing 14-0. 2YHUYLHZ $'63([WHUQDO%XV3LQV 'HVFULSWLRQ Abstract: .. ADSP-21160 SHARC Technical Specification, Rev 3.0 14 - 1. 6<67 0’ 6,*1 Figure 14-0. Table 14-0. Listing 14-0. 2YHUYLHZ. $’63 [WHUQDO%XV3LQV. ’HVFULSWLRQ. This section describes the functionality .. Tags: virpt multiprocessing sharc* datasheet abstract.. |
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First line: -20/sma e1017 DMX chip -7$*7(67$&&(66 3257(08/$725,17(5)$&( Figure D-0. Table D-0. Listing D-0. 29(59,(: boundary scan allows system designer test interconnections printed circuit board with minimal test-specific hardware. scan made possible ability control monitor each input output each Abstract: .. ADSP-21160 SHARC Technical Specification, Rev 3.0 D - 1. ’ -7$*7 67$&& 66 3257 08/$725,17 5 $& Figure D-0. Table D-0. Listing D-0. 29 59, : A boundary scan allows a system designer to test .. Tags: DMX chip -20/sma e1017 Emus* ADSP-21160 |
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First line: EC Bus ADSP-21160 reference manual (;7(51$/0(025< Figure 8-0. Listing 8-0. Table 8-0. 2YHUYLHZ ([WHUQDO0HPRU\,QWHUIDFH ADSP-21160 external memory interface several enhancements over that ADSP-2106x. These changes were introduced improve throughput when interfacing synchronous memories peripherals Abstract: .. ADSP-21160 SHARC Technical Specification, Rev 3.0 8 - 1. ;7 51$/0 025< Figure 8-0. Listing 8-0. Table 8-0. 2YHUYLHZ. [WHUQDO0HPRU\,QWHUIDFH. The ADSP-21160 external memory interface has .. Tags: ADSP-21160 reference manual EC Bus ADSP-21160 ADSP-2106x ADSP-21160s |
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First line: sharc ADSP-21xxx architecture sharc ADSP-21xxx ADDRESSING MODES sharc ADSP-21xxx architecture internal diagrams sharc ADSP-21xxx architecture ADSP-21xxx* Figure 1-0. Table 1-0. Listing 1-0. Purpose ADSP-21160 SHARC Hardware Reference provides architectural information ADSP-21160 Super Harvard Archit Abstract: .. ADSP-21160 SHARC DSP Hardware Reference 1-1. 1 INTRODUCTION Figure 1-0. Table 1-0. Listing 1-0. Purpose. The ADSP-21160 SHARC DSP Hardware Reference provides architec-tural information on .. Tags: ADSP-21xxx* sharc ADSP-21xxx architecture sharc ADSP-21xxx architecture internal diagrams sharc ADSP-21xxx ADDRESSING MODES sharc ADSP-21xxx architecture sharc 21xxx architecture block diagram sharc* multiprocessor interprocessor communication dual- ADSP-21160 reference manual ADSP-21160 |
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First line: multiprocessing* diode IN 5402 how dsp is used in radar FIR 3D 4x4 multipliers ADSP-21160 High-Performace Fixed-Poit Floatig-Poit Processig FEATURES: Abstract: .. ADSP-21160 ADSP-21160 ADSP-21160. ADSP-21160. LINK PORT. LINK PORT. EXTERNAL PORT. ADSP-21160. LINK PORT. EXTERNAL PORT. ADSP-21160. LINK PORT. EXTERNAL PORT. In addition to the cluster multiprocessing .. Tags: 4x4 multipliers FIR 3D how dsp is used in radar diode IN 5402 sharc iir filter multiprocessing* 2102 SRAM ADSP-21160 |
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First line: "32-Bit Microprocessors" EZ 941 Analog Devices 941 host interface with dsp samtec connector TW serial connectors SUMMARY Microcomputer ADSP-21160 Abstract: .. Preliminary Technical Data ADSP-21160. DSP Microcomputer. This information applies to a product under development. Its characteristics and specifications are subject to change without notice .. Tags: samtec connector TW serial connectors host interface with dsp EZ 941 "32-Bit Microprocessors" sharc* Analog devices 949 Analog Devices 941 ADSP-21160 |
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First line: Figure 12-0. Table 12-0. Listing 12-0. 2YHUYLHZ ADSP-21160 provides additional capability through dedicated 8-bit link ports. Each link port consists eight bidirectional data lines, bidirectional clock line, bidirectional acknowledge line. link ports clocked frequency processor clock cycle, allowing Abstract: .. ADSP-21160 SHARC Technical Specification, Rev 3.0 12 - 1. /,1.32576 Figure 12-0. Table 12-0. Listing 12-0. 2YHUYLHZ. The ADSP-21160 provides additional I/O capability through up to six dedicated .. Tags: ADSP-21160 |
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First line: ADSP-21160 reference manual Figure 3-0. Table 3-0. Listing 3-0. 2YHUYLHZ Program sequencing ADSP-21160 very similar sequencing ADSP-2106x family DSPs. differences between DSPs sequencing stem mostly from minor differences their interrupt vector table modes. more information, corresponding section AD Abstract: .. ADSP-21160 SHARC Technical Specification, Rev 3.0 3 - 1. 352*5$06 48 1&,1* Figure 3-0. Table 3-0. Listing 3-0. 2YHUYLHZ. Program sequencing on the ADSP-21160 is very similar to sequencing on .. Tags: ADSP-21160 reference manual ADSP-21160 ADSP-2106x |
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First line: making code DMA '0$ Figure 9-0. Table 9-0. Listing 9-0. 2YHUYLHZ Direct Memory Access (DMA) provides mechanism transferring entire block data. ADSP-21160s on-chip controller relieves core processor burden moving data between internal memory external data source external memory. fully integrated cont Abstract: .. ADSP-21160 SHARC Technical Specification, Rev 3.0 9 - 1. ’0$ Figure 9-0. Table 9-0. Listing 9-0. 2YHUYLHZ. Direct Memory Access DMA provides a mechanism for transferring an entire block of data .. Tags: making code DMA ADSP-21160s |
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First line: Hardware Rev. ADSP-21160 EZ-KIT LiteTM User Guide Part Number 500-00546 2000 Analog Devices, Inc. RIGHTS RESERVED Analog Devices, Inc. Digital Signal Processing Division Technology P.O. 9106 Norwood, 02062-9106 (617) 329-4700 Abstract: .. Hardware Rev. 2.2. ADSP-21160 EZ-KIT LiteTM. User Guide. Part Number 500-00546. © 2000 Analog Devices, Inc. ALL RIGHTS RESERVED. Analog Devices, Inc.. Digital Signal Processing Division One Technology .. Tags: XC95144XL prom smd805 smd pushbutton footprint sharc* plug 3.5mm female stereo 3.5mm MOUNTAIN-ICE BE 4CA AMP 120527-1 ADP3367 AD1881 2x7 segment led display 10 pin ADSP-21160 |
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First line: Figure B-0. Table B-0. Listing B-0. Compute operations execute multiplier, ALU, shifter. 23-bit compute field like mini instruction within ADSP-21000 instruction specified variety compute operations. This appendix describes each compute operation detail, including assembly language syntax opcode fie Abstract: .. ADSP-21160 SHARC Technical Specification, Rev 3.0 B - 1. % &20387 23 5$7,21 5 5 1& Figure B-0. Table B-0. Listing B-0. Compute operations execute in the multiplier, the ALU, and the shifter .. Tags: ADSP-21000 ADSP-21160 |
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First line: sharc iir filter IIR SIMD 6,0'352&(66,1* Figure 6-0. Table 6-0. Listing 6-0. 2YHUYLHZ ADSP-2106x core Single Instruction, Single Data (SISD) processor engine. comparison, ADSP-21160 core supports Single Instruction, Multiple Data (SIMD) multiprocessing paradigm. SIMD support mode selectable PEYE Abstract: .. ADSP-21160 SHARC Technical Specification, Rev 3.0 6 - 1. 6,0’352& 66,1* Figure 6-0. Table 6-0. Listing 6-0. 2YHUYLHZ. The ADSP-2106x ADSP-2106x DSP core is a Single Instruction, Single Data SISD processor .. Tags: IIR SIMD sharc iir filter virpt multiprocessing SIMD ADSP-2106x ADSP-21160 |
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First line: TR9CC2000LCP-Y PQFP128* PLM250S40T1 ADSP-21160 EZ-KIT Lite® Evlution System Mnul Revision 4.1, April 2006 Number 82-000513-01 Abstract: .. ADSP-21160 EZ-KIT Lite ® Evaluation System Manual. Revision 4.1, April 2006. Part Number 82-000513-01. Analog Devices, Inc. One Technology Way Norwood, Mass. 02062-9106 a. Copyright Information .. Tags: PQFP128* TR9CC2000LCP-Y W17 sot23 W16 sot 23 sg do-214aa PQFP128 PLM250S40T1 npn transistor w19 npn transistor w16 NEL D32 49 MMBT4401 MA505 IDC7X2 ADSP-21160 |
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First line: tt 60 n 16 kof til 3881 xxnx* TT 46 N 16 KOF Preliminary Technical Data A-21160 SUMMARY High performance 32-bit audio, medical, military, graphics, imaging, communication Super Harvard independent buses dual data fetch, instruction fetch, nonintrusive, zero-overhead Backwards source level compatible Abstract: .. ANALOG DEVICES DSP Microcomputer Preliminary Technical Data ADSP-21160 SUMMARY . High performance 32-bit 32-bit DSP—applications in audio, medical, military, graphics, imaging, and communication .. Tags: TT 46 N 16 KOF xxnx* til 3881 tt 60 n 16 kof datasheet abstract.. |
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First line: 2387A ADSP-21160 EZ-KIT Lite® Evlution System Mnul Revision 5.0, July 2007 Number 82-000513-01 Abstract: .. ADSP-21160 EZ-KIT Lite ® Evaluation System Manual. Revision 5.0, July 2007. Part Number 82-000513-01. Analog Devices, Inc. One Technology Way Norwood, Mass. 02062-9106 a. Copyright Information .. Tags: 2387A 2387A* Y9 SOT23-6 W17 sot23 w15 sot23-6 TCF tyco TAJE227K010R sg do-214aa RAPC712X* NTC 22K 0805 NEL D32 49 N4 SOT23-6 IDC7X2 ADSP-21160 |
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First line: core i7 alu core i7 registers adsp-210XX APPENDIX A Figure A-0. Table A-0. Listing A-0. Appendix describe ADSP-21160 instruction set. This appendix explains each instruction type, including assembly language syntax opcodes, which result from instruction assembly. Many instructions opcodes contain CO Abstract: .. ADSP-21160 SHARC Technical Specification, Rev 3.0 A - 1. $ ,16758&7,216 7 5 5 1& Figure A-0. Table A-0. Listing A-0. Appendix A and B describe the ADSP-21160 instruction set. This appen-dix .. Tags: APPENDIX A adsp-210XX core i7 registers core i7 alu ADSP-21160 |
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First line: INSTRUCTION SUMMARY Figure 2-0. Table 2-0. Listing 2-0. This instruction summary provides syntax summary each instruction includes cross reference each instruction's reference page. following summary topics appear this chapter: "Compute Move/Modify Summary" page "Program Flow Control Abstract: .. ADSP-21160 SHARC DSP Instruction Set Reference 2 - 1. 2 INSTRUCTION SUMMARY Figure 2-0. Table 2-0. Listing 2-0. Overview. This instruction set summary provides a syntax summary for each instruc .. Tags: cross reference datasheet abstract.. |
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First line: JTAG ADSP-21XX EZ-KIT Lite Analog Devices ADSP-21160 SHARC Features Attributes ADSP-21160M SHARC AD1881A SoundMAX® audio codec debug interface with host 128K 64-bits SBSRAM 512K 8-bit FLASH memory JTAG 14-pin header link port connectors Evaluation suite VisualDSP++ certified System Requirements Abstract: .. www.analog.com/dsp. EZ-KIT Lite for Analog Devices ADSP-21160 SHARC DSP. Overview. The ADSP-21160 EZ-KIT Lite ® provides developers with a cost-effective method for ini-tial evaluation of the .. Tags: JTAG ADSP-21XX AD1881A |
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First line: Figure E-0. Table E-0. Listing E-0. 2YHUYLHZ This appendix provides definitions ADPS-21160s control status registers. Some registers located processor core; these called system registers, subset processors universal register set. core processor system registers MODE1, MODE2, MMASK, ASTATx, ASTATy, S Abstract: .. ADSP-21160 SHARC Technical Specification, Rev 3.0 E - 1. &21752/67$7865 *,67 56 Figure E-0. Table E-0. Listing E-0. 2YHUYLHZ. This appendix provides bit definitions for the ADPS-21160 ADPS-21160 Ãs control .. Tags: ADPS-21160s ADSP-21160s |
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First line: Figure 7-0. Table 7-0. Listing 7-0. 2YHUYLHZ ADSP-21160 contains large dual-ported memory on-chip program data storage. memory first implementation ADSP-21160 processor defines megabits on-chip memory space. megabit space populated with megabits SRAM, divided into independent 2-Mbit blocks. memory b Abstract: .. ADSP-21160 SHARC Technical Specification, Rev 3.0 7 - 1. 0 025<0$3 Figure 7-0. Table 7-0. Listing 7-0. 2YHUYLHZ. The ADSP-21160 contains a large dual-ported memory for on-chip pro-gram and data .. Tags: ADSP-21160 ADSP-21160s |
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First line: sharc ADSP-21xxx ADSP-21xxx* sharc ADSP-21xxx architecture ADSP-21xxx sharc ADSP-21xxx architecture Figure 1-0. Table 1-0. Listing 1-0. Purpose ADSP-21160 SHARC Instruction Reference provides assembly syntax information ADSP-21160 Super Harvard Architecture (SHARC) Digital Signal Processor (DSP). sy Abstract: .. ADSP-21160 SHARC DSP Instruction Set Reference 1-1. 1 INTRODUCTION Figure 1-0. Table 1-0. Listing 1-0. Purpose. The ADSP-21160 SHARC DSP Instruction Set Reference provides assembly syntax information .. Tags: ADSP-21xxx* sharc ADSP-21xxx architecture sharc 21xxx ADSP-21xxx ADSP-21160 |
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First line: 746X101* IDC7X2 PLM250S40T1* ADSP-21160 EZ-KIT Lite® Evlution System Mnul Revision 4.0, Jnury 2005 Number 82-000513-01 Abstract: .. ADSP-21160 EZ-KIT Lite ® Evaluation System Manual. Revision 4.0, January 2005. Part Number 82-000513-01. Analog Devices, Inc. One Technology Way Norwood, Mass. 02062-9106 a. Copyright Information .. Tags: PLM250S40T1* 746X101* CR21-4701F-T FER002 W17 sot23 W16 sot 23 sharc 21xxx architecture block diagram sg do-214aa PQFP128 npn transistor w19 npn transistor w16 NEL D32 49 IDC7X2 Honda mr Connectors honda connector mr 20-pin ADSP-21160 |
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First line: IMMEDIATE MOVE Figure 5-0. Table 5-0. Listing 5-0. Group Instructions immediate move instructions Group instructions specify register-to-memory data moves. Group instructions include following: "Type (direct addressing)" page Transfer between data program memory universal register, direct Abstract: .. ADSP-21160 SHARC DSP Instruction Set Reference 5 - 1. 5 IMMEDIATE MOVE Figure 5-0. Table 5-0. Listing 5-0. Group III Instructions. The immediate move instructions in the Group III set of instructions .. Tags: datasheet abstract.. |
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First line: JTAG TEST-EMULATION PORT Figure 10-0. Table 10-0. Listing 10-0. boundary scan allows system designer test interconnections printed circuit board with minimal test-specific hardware. scan made possible ability control monitor each input output each chip through serially scannable latches. Each input Abstract: .. ADSP-21160 SHARC DSP Hardware Reference 10-1. 10 JTAG TEST-EMULATION PORT Figure 10-0. Table 10-0. Listing 10-0. Overview. A boundary scan allows a system designer to test interconnections on .. Tags: EZ 648 BO 411 ADSP-21160 |
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First line: samtec connector TW serial connectors Preliminry Technicl SUMMARY Abstract: .. a Preliminary Technical Data ADSP-21160. DSP Microcomputer. This information applies to a product under development. Its characteristics and specifications are subject to change without notice .. Tags: samtec connector TW serial connectors ANALOG TECHNOLOGY datasheet abstract.. |
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First line: COMPUTE MOVE Figure 3-0. Table 3-0. Listing 3-0. Group Instructions compute move instructions Group instructions specify compute operation parallel with data moves index register modify. instructions this group contain COMPUTE field that specifies compute operation using ALU, multiplier, shifter. Be Abstract: .. ADSP-21160 SHARC DSP Instruction Set Reference 3 - 1. 3 COMPUTE & MOVE Figure 3-0. Table 3-0. Listing 3-0. Group I Instructions. The compute and move instructions in the Group I set of instructions .. Tags: datasheet abstract.. |
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First line: 2387A h1 sot23-5 Honda mr Connectors honda connector mr 20-pin honda 20 pin connector pinout ADSP-21160 EZ-KIT Lite® Evlution System Mnul Revision 3.1, Mrch 2004 Number 82-000513-01 Abstract: .. ADSP-21160 EZ-KIT Lite ® Evaluation System Manual. Revision 3.1, March 2004. Part Number 82-000513-01. Analog Devices, Inc. One Technology Way Norwood, Mass. 02062-9106 a. Copyright Information .. Tags: honda 20 pin connector pinout honda connector mr 20-pin h1 sot23-5 2387A W16 sot 23 vga connector 16 pin IDC usb 6212 sg do-214aa RMCA PQFP128 NEL D32 49 IDC7X2 Honda mr Connectors connector p2 3.5mm C42 GORE ADSP-21160 |
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First line: PROGRAM FLOW CONTROL Figure 4-0. Table 4-0. Listing 4-0. Group Instructions program control instructions Group instructions specify program flow operation parallel with compute. instructions this group contain COMPUTE field that specifies compute operation using ALU, multiplier, shifter. Because the Abstract: .. ADSP-21160 SHARC DSP Instruction Set Reference 4 - 1. 4 PROGRAM FLOW CONTROL Figure 4-0. Table 4-0. Listing 4-0. Group II Instructions. The program control instructions in the Group II set of instructions .. Tags: datasheet abstract.. |
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First line: '$7$$''5(66,1* Figure 4-0. Table 4-0. Listing 4-0. 2YHUYLHZ ADSP-21160s data address generators (DAGs) simplify task organizing data maintaining pointers into memory. DAGs allow both processing elements address memory indirectly; that instruction specifies register containing address instead address Abstract: .. ADSP-21160 SHARC Technical Specification, Rev 3.0 4 - 1. ’$7$$’’5 66,1* Figure 4-0. Table 4-0. Listing 4-0. 2YHUYLHZ. The ADSP-21160Ãs two data address generators DAGs simplify the task of .. Tags: ADSP-21160s |
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First line: COMPUTATIONS REFERENCE Figure 7-0. Table 7-0. Listing 7-0. Compute Field Compute operations execute multiplier, ALU, shifter. 23-bit compute field mini instruction within ADSP-21000 instruction specified variety compute operations. This chapter describes each compute operation detail, including asse Abstract: .. ADSP-21160 SHARC DSP Instruction Set Reference 7 - 1. 7 COMPUTATIONS REFERENCE Figure 7-0. Table 7-0. Listing 7-0. Compute Field. Compute operations execute in the multiplier, the ALU, and the .. Tags: MRF transistor ADSP-21000 |
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First line: EE-160 Technical Notes using Analog Devices' components development tools Abstract: .. Examining ADSP-21160 Link Port Backward Compatibility to the ADSP-2106x ADSP-2106x Link Ports. Overview. This Engineer’s Note will discuss the ADSP-21160 link port compatibility to previous SHARC DSPs .. Tags: EE-160 |
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First line: ADSP-21160 SHARC® Instruction Reference Revision 2.0, November 2003 Number 82-001967-01 Abstract: .. ADSP-21160 SHARC ® DSP Instruction Set Reference. Revision 2.0, November 2003. Part Number 82-001967-01. Analog Devices, Inc. One Technology Way Norwood, Mass. 02062-9106 a. Copyright Information .. Tags: virpt multiprocessing MRF transistor ADSP-21160 |
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First line: EE-284 Technicl notes using Anlog Devices DSPs, processors development tools Abstract: .. Implementing Overlays on ADSP-21160 SHARC ® Processors. Contributed by Jeyanthi Jegadeesan Rev 1 – March 9, 2006. Copyright 2006, Analog Devices, Inc. All rights reserved. Analog Devices assumes .. Tags: EE-284 |
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First line: transistor DAG TE-32 DATA ADDRESS GENERATORS Figure 4-0. Table 4-0. Listing 4-0. DSP's Data Address Generators (DAGs) generate addresses data moves from Data Memory (DM) Program Memory (PM). generating addresses, DAGs programs refer addresses indirectly, using register instead absolute address. DAGs Abstract: .. ADSP-21160 SHARC DSP Hardware Reference 4-1. 4 DATA ADDRESS GENERATORS Figure 4-0. Table 4-0. Listing 4-0. Overview. The DSP’s Data Address Generators DAGs generate addresses for data moves .. Tags: TE-32 transistor DAG datasheet abstract.. |
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First line: '$7$$&&(66(6 Figure 5-0. Table 5-0. Listing 5-0. 2YHUYLHZ ADSP-21160s 64-bit data width buses provide support broad range register load/store data access options. Since typical data width supported ADSP-21160 architecture 32-bits, 64-bit buses capable supporting double register loads stores. Abstract: .. ADSP-21160 SHARC Technical Specification, Rev 3.0 5 - 1. ’$7$$&& 66 6 Figure 5-0. Table 5-0. Listing 5-0. 2YHUYLHZ. The ADSP-21160Ãs 64-bit 64-bit data width DM and PM buses provide support for a broad .. Tags: ADSP-21160s |
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First line: Summit-ICE Summit-ICE system industry's first Local card emulator designed support emulation across Analog Devices (ADI) SHARC® processors. shielded 3V/5V JTAG cable provides nonintrusive interface ADSP-2106x SHARC other JTAG DSPs. Summit-ICE compatible with newly announced ADSP-21065L family se Abstract: .. -21065L -21065L family and sec-ond generation SHARC DSP family member, the ADSP-21160. With PCI now the de facto standard bus on new PCs, this product is the natural choice for ADI SHARC DSP development .. Tags: ADSP21160 |
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First line: PROGRAM SEQUENCER Figure 3-0. Table 3-0. Listing 3-0. DSP's program sequencer implements program flow, constantly providing address next instruction executed other parts DSP. Program flow mostly linear with processor executing program instructions sequentially. This linear flow varies occasionally w Abstract: .. ADSP-21160 SHARC DSP Hardware Reference 3-1. 3 PROGRAM SEQUENCER Figure 3-0. Table 3-0. Listing 3-0. Overview. The DSP’s program sequencer implements program flow, constantly pro-viding the .. Tags: datasheet abstract.. |
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First line: NUMERIC FORMATS Figure C-0. Table C-0. Listing C-0. supports 32-bit single-precision floating-point data format defined IEEE Standard 754/854. addition, supports extended-precision version same format with eight additional bits mantissa bits total). also supports 32-bit fixed-point formats--fraction Abstract: .. ADSP-21160 SHARC DSP Hardware Reference C-1. C NUMERIC FORMATS Figure C-0. Table C-0. Listing C-0. Overview. The DSP supports the 32-bit 32-bit single-precision floating-point data format defined .. Tags: datasheet abstract.. |
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First line: sharc ADSP-21xxx architecture ADSP-21160 SHARC® Hrdwre Reference Revision 4.0, June 2009 Number 82-001966-01 Abstract: .. a. ADSP-21160 SHARC ® DSP Hardware Reference. Revision 4.0, June 2009. Part Number 82-001966-01. Analog Devices, Inc. One Technology Way Norwood, Mass. 02062-9106. Copyright Information. ©2009 .. Tags: sharc ADSP-21xxx architecture virpt multiprocessing ST EZ 711 253 SM TX - 4 AM / ASK Transmitter Module simm modul 80 pin oscilloscope BSO scope MRF 530 mrf 477 mrf 401 mrf 328 MRF 238 kyx 28 ADSP-21160 |
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First line: sharc 21xxx architecture ADSP-21xxx* ADSP-21xxx sharc ADSP-21xxx sharc ADSP-21xxx architecture Figure 1-0. Table 1-0. Listing 1-0. Thank purchasing Analog Devices development software Analog Devices Digital Signal Processors (DSP). This software provides with following: assembler processing source f Abstract: .. Manual for ADSP-21xxx ADSP-21xxx Family DSPs docu-ments support for the ADSP-21160 processors. In addition to documenting all existing assembler and preprocessor fea-tures, this manual describes new .. Tags: sharc 21xxx architecture sharc ADSP-21xxx architecture sharc ADSP-21xxx sharc 21xxx ADSP-21xxx* ADSP-21060 reference manual "Digital Signal Processors" ADSP-21xxx |
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First line: MEMORY Figure 5-0. Table 5-0. Listing 5-0. contains large, dual-ported internal memory provides access external memory through DSP's external port. This chapter describes DSP's memory information connecting timing accesses external memory, "External Memory Interface" page 7-3. There MBits Abstract: .. ADSP-21160 SHARC DSP Hardware Reference 5-1. 5 MEMORY. Figure 5-0. Table 5-0. Listing 5-0. Overview. The DSP contains a large, dual-ported internal memory and provides access to external memory .. Tags: ADSP-21160 |
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First line: LINK PORTS Figure 8-0. Table 8-0. Listing 8-0. 8-bit wide link ports, which connect other DSPs' peripherals' link ports. These bidirectional ports have eight data lines, acknowledge, clock line. Link ports operate frequencies same speed DSP's internal clock, letting each port transfer bits data inte Abstract: .. ADSP-21160 SHARC DSP Hardware Reference 8-1. 8 LINK PORTS Figure 8-0. Table 8-0. Listing 8-0. Overview. The DSP has six 8-bit wide link ports, which can connect to other DSPs’ or peripherals’ link .. Tags: ADSP-21160 ADSP-2106xelectrically |
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First line: COAX*Â 26 pins connector honda connector pin RMCA purcell EE-106 Technical Notes using Analog Devices' components development tools Abstract: .. This standard applies to ADSP-21160 and future SHARC products that use 8-bit link port data transfers. Cable Specifications. The standard is based on the Honda 26 pin connector. The cable consists .. Tags: purcell COAX*Â RMCA* Honda Connectors honda connector pin honda connector coax* 26 pins connector EE-106 |
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