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Part Manufacturer Description Datasheet BUY
SN74LS74ADBRE4 Texas Instruments LS SERIES, DUAL POSITIVE EDGE TRIGGERED D FLIP-FLOP, COMPLEMENTARY OUTPUT, PDSO14, GREEN, PLASTIC, SSOP-14 visit Texas Instruments
SN74LS74ANE4 Texas Instruments Dual D-type pos.-edge-triggered flip-flops with preset and clear 14-PDIP 0 to 70 visit Texas Instruments
SN74LS74ADG4 Texas Instruments Dual D-type pos.-edge-triggered flip-flops with preset and clear 14-SOIC 0 to 70 visit Texas Instruments
SN74LS74ADR Texas Instruments Dual D-type pos.-edge-triggered flip-flops with preset and clear 14-SOIC 0 to 70 visit Texas Instruments Buy
SN74LS74ADBRG4 Texas Instruments LS SERIES, DUAL POSITIVE EDGE TRIGGERED D FLIP-FLOP, COMPLEMENTARY OUTPUT, PDSO14, GREEN, PLASTIC, SSOP-14 visit Texas Instruments
SN74LS74ANSR Texas Instruments Dual D-type pos.-edge-triggered flip-flops with preset and clear 14-SO 0 to 70 visit Texas Instruments Buy

74LS74 truth table

Catalog Datasheet MFG & Type PDF Document Tags

74LS74 truth table

Abstract: 74LS74 SPECIFICATIONS Vcc (opr) = 2V to 6V Pin and Function compatible with 54/74LS74 TRUTH TABLE INPUTS OUTPUTS
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M74HC74 M54HC74 74LS74 truth table 74LS74 SPECIFICATIONS 74ls74 ic chip pin DIAGRAM OF IC 74ls74 74LS74 gate diagram IC 74LS74 M54/74HC74 54/74LS74

TC74HC74AP

Abstract: 74LS74 truth table 74LS74 TRUTH TABLE INPUTS OUTPUTS FUNCTION CLR PR D CK Q Q L H X X L H CLEAR H L X X H L PRESET
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TC74HC74AP TC74HC74AF TC74HC74AFN DIP14-P-300-2 74LS74 timing diagram TC74HC74AP/AF/AFN TC74HC74A

012-G

Abstract: 74LS74 truth table Operating Voltage Range-â'"Vcc (opr.) = 2V~6V â'¢ Pin and Function Compatible with 74LS74 TRUTH TABLE
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012-G 14PIN 34TYP SOLI4-P-150-1 515TYP

74LS74 truth table

Abstract: TC74HC74AFN Operating Voltage Range-â'"Vcc (opr.) = 2V~6V â'¢ Pin and Function Compatible with 74LS74 TRUTH TABLE
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PT271

TTL 74ls74

Abstract: 74LS74 Function Compatible with 74LS74 TRUTH TABLE INPUTS OUTPUTS FUNCTION CLR PR D CK Q Q L H X X L H
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TC74HCT74AP TC74HCT74AF TC74HCT74AFN TTL 74ls74 TC74HCT74AP/AF/AFN TC74HCT74A

74LS74 truth table

Abstract: 74ls74 Function Compatible with 74LS74 TRUTH TABLE INPUTS OUTPUTS FUNCTION CLR PR D CK Q Q L H X X L H
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74LS74 function table

ln 74ls74

Abstract: 74LS74 truth table elays tpi_H -tpHL · Pin and Function Compatible with 74LS74 TRUTH TABLE (Note) The JEDEC SOP (FN) is
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ln 74ls74 SOL14-P-150-1 FT271

TTL 74ls74

Abstract: 74ls74 Function Compatible with 74LS74 TRUTH TABLE INPUTS OUTPUTS FUNCTION CLR PR D CK Q Q L H X X L H
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OH-50

74LS74 truth table

Abstract: 7474PC transferred to the outputs until the next rising edge of the C lock Pulse input. PINO UT B TRUTH TABLE , NATIONAL SENICOND -CLOGIO D2E D | LSDllES D0b371S 2 | T-46-07-09 74 CO NNECTIO N DIAGRAM S PINO UT A 54/7474 54H/74H74 54S/74S74 54LS/74LS74 DUAL D-TYPE POSITIVE EDGETRIG GERED FLIP-FLOP DESCRIPTION - The '74 devices are dual D-type flip -flo p s w ith Direct Clear and Set inputs and com plem entary (Q, Q) outputs. Inform ation at the input is transferred to the outputs on the positive edge of
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7474PC 74LS74PC DE flip-flop 7474 pin IC 7474 logic diagram of ic 7474 74ls74 pin configurations 54LS/74LS74 5474DM 54H74DM 54S74DM 54LS74DM 54S74FM
Abstract: ) = 2 V TO 6 V â  PIN AND FUNCTION COMPATIBLE WITH 54/74LS74 M1R (Micro Package) C1R (Chip , hC 2 R NC |° § _5 7003 - 1/6 7^237 005 4427 ST3 215 M54/M74HC74 TRUTH TABLE OUTPUTS INPUTS CLR PR 0 CK L H X H L X FUNCTION Q X Q -
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10LSTTL 54HC74F1R 74HC74M M74HC74B1R M74HC74C1R GGS4432

74ls74 timing setup hold

Abstract: 74LS74 truth table with 74LS74 1P R U ) N s JS L - > Cl ICKID 1D- (2) 1C LR (1 )N R (TOP VIEW) 10 M s J -,0 Pin Assignment Truth Table 2Q CUR \ 181 -2 5 L H H L L H X X X L X X X 2PR2C K 2 0 - HUN
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74ls74 timing setup hold TC74HC/HCT

of 74HC74 ic

Abstract: 74HC74 discharge and transient excess voltage. TRUTH TABLE INPUTS OUTPUTS FUNCTION CLR PR D CK Q Q L H X X , COMPATIBLE WITH 54/74LS74 DESCRIPTION The M54/74HC74 is a high speed CMOS DUAL D TYPE FLOP WITH
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of 74HC74 ic 74HC74 IC 74hc74 pin DIAGRAM OF IC 74HC74 74hc74 pin diagram GIJ diode
Abstract: and transient excess voltage. TRUTH TABLE INPUTS OUTPUTS â¡ is u u iq; FUNCTION CLR , /74LS74 F1 Ceramic Frit Seal Package S / Ml Micro Package C1 Plastic Chip Carrier ORDERING -
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pin DIAGRAM OF IC 74ls74

Abstract: 74LS74 logic diagram Inputs Truth Table Outputs Function CEE L H L IQ PR H L D X X X L CK X X X Q L H , Propagation Delays: tp L H= W Pin and Function Compatible with 74LS74 jp p -U L k IC K -^ - > 1 0 -^ - 1CLR
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74LS74 logic diagram TC74HCT74AP/AF

MC74HCT374N

Abstract: 1N4004 MOTOROLA are selected by the rotary switch S1, as shown in Table 1. Table 1. Board Operational Setups , the 64 memory pages by banks of 16 by video standard (Table 2) is entirely arbitrary: one could as , . On-Board Read-Only Memory Table 3 shows the content format of the EPROM that holds the 64 pages of setup data. The encoder register contents are defined in the TMC22x9y Datasheet. Table 2. Standards , 16-31 UMB NTSC NTSC-EIA 32-47 UMB PAL PAL-M 48-63 Table 3. EPROM Address Map
Fairchild Semiconductor
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MC74HCT374N 1N4004 MOTOROLA tp11 alco mc74f08n 74F163 74ls74 pin configuration TMC22061 TMC22091 CCIR-601 CCIR601-F TMC22 TMC22091/TMC22191

MXO-55GA-2C

Abstract: CTS MXO-55GA-2C . The 16 pages of setup data are selected by the rotary switch S1, as shown in Table 1. Table 1 , the 64 memory pages by banks of 16 by video standard (Table 2) is entirely arbitrary: one could as , . On-Board Read-Only Memory Table 3 shows the content format of the EPROM that holds the 64 pages of setup data. The encoder register contents are defined in the TMC22x9y Datasheet. Table 2. Standards , 16-31 UMB NTSC NTSC-EIA 32-47 UMB PAL PAL-M 48-63 Table 3. EPROM Address Map
Raytheon
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MXO-55GA-2C CTS MXO-55GA-2C TM27C512 mxo 40-2 MC74LS74 motorola 74LS74 TMC22290/TMC22291 TMC22061P7C DS70022061

Z80h

Abstract: TDA 718 regardless of the interrupt status. Table 1 shows the truth tables for the Z8500 interrupt daisy-chain control signals during certain cycles. Table 2 shows the interrupt state diagram for the Z8500 periphersls , for both W T and 1DRQ Table 1. Z8500 Daisy-Chain Control Signals active, and ray inactive to identify , forced Low. This inhibits any lower priority devices from requesting an interrupt. TruthTablefor Truth Table for Daisy Chain Signals Daisy Chain Signals During IdleState During INTACK Cycle m ip ms 1E0 IEI
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Z80h TDA 718 z80b Z80B-CPU Z850 74LS04 truth table Z8S36 Z8536 00-2013-A0 Z8530 Z8038

pin DIAGRAM OF IC 74ls74

Abstract: .) : 0.12 g (typ.) 1 2006-06-01 TC74HCT74AP/AF/AFN IEC Logic Symbol Truth Table Inputs CLR , : tpLH - Pin and function compatible with 74LS74 TC74HCT74AFN Pin Assignment Weight DIP14-P
Toshiba
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pin DIAGRAM OF IC 74ls74

Abstract: IC 74LS74 datasheet (typ.) 2006-06-01 TC74HC74AP/AF/AFN IEC Logic Symbol Truth Table Inputs Outputs , compatible with 74LS74 Pin Assignment TC74HC74AFN Weight DIP14-P-300-2.54 SOP14-P
Toshiba
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IC 74LS74 datasheet 74ls74 ic 74LS74 D-type flip/flop

TC74HC74AFN

Abstract: TC74HC74AP TC74HC74AP/AF/AFN IEC Logic Symbol Truth Table Inputs CLR Outputs PR H L L H H H D X X X L H X , ) = 2~6 V Pin and function compatible with 74LS74 TC74HC74AFN Pin Assignment Weight DIP14-P
Toshiba
Original
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