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| Part Number | Manufacturer | Description | ||||||
| 1. | NXP Semiconductors / Philips Semiconductors | Quad buffer/line driver; 3-state - Description: Quad Buffer/Line Driver with Active LOW Output Enable (3-State) ; Logic switching levels: CMOS ; Number of pins: 14 ; Output drive capability: +/- 7.8 mA ; Power dissipation considerations: Low Power or Batt | Latest Datasheet | |||||
| 2. | Philips Semiconductors / NXP Semiconductors | Quad buffer/line driver 3-state | Latest Datasheet | |||||
| 3. | NXP Semiconductors / Philips Semiconductors | Quad buffer/line driver; 3-state - Description: Quad Buffer/Line Driver with Active LOW Output Enable (3-State) ; Logic switching levels: CMOS ; Number of pins: 14 ; Output drive capability: +/- 7.8 mA ; Power dissipation considerations: Low Power or Batt | Latest Datasheet | |||||
| 4. | NXP Semiconductors / Philips Semiconductors | Quad buffer/line driver; 3-state - Description: Quad Buffer/Line Driver with Active LOW Output Enable (3-State) ; Logic switching levels: CMOS ; Number of pins: 14 ; Output drive capability: +/- 7.8 mA ; Power dissipation considerations: Low Power or Batt | Latest Datasheet | |||||
| 5. | NXP Semiconductors / Philips Semiconductors | Quad buffer/line driver; 3-state - Description: Quad Buffer/Line Driver with Active LOW Output Enable (3-State) ; Logic switching levels: CMOS ; Number of pins: 14 ; Output drive capability: +/- 7.8 mA ; Power dissipation considerations: Low Power or Batt | Latest Datasheet | |||||
| 6. | Philips Semiconductors / NXP Semiconductors | Quad buffer/line driver, 3-state | 42.19 Kb | 6 Pg. | ||||
| 7. | ST Microelectronics | QUAD BUS BUFFERS (3-STATE) | 254.31 Kb | 11 Pg. | ||||
| 8. | Philips Semiconductors / NXP Semiconductors | Quad buffer/line driver 3-state | 42.19 Kb | 6 Pg. | ||||
| 9. | Philips Semiconductors / NXP Semiconductors | Quad buffer/line driver 3-state | 42.19 Kb | 6 Pg. | ||||
| 10. | Philips Semiconductors / NXP Semiconductors | Quad buffer/line driver 3-state | 42.19 Kb | 6 Pg. |
| « Previous 1 2 Next » |
| 1. | 230.36 Kb • 4 Pages |
Abstract: ... 1 A 74HC125 device is plugged at the U7 socket (Figure 1). Remove this device from the socket and bend pin 5 outwards. 2 Replace the 74HC125 device into the U7 socket, taking care to keep pin 5 bent outwards ... Labels: 74HC125, Application Notes |
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| 2. | 83.67 Kb • 4 Pages |
Abstract: ... Next the 74HC125 buffer needs to be modified. U3-3 is isolated from the circuit, so there aren’t two devices driving the SCLK node. Finally U3-8 is isolated, allowing U3B to be active and able to ... Labels: 74HC125, Application Notes |
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| 3. | 35.67 Kb • 7 Pages |
Abstract: ... CD54/74HC125, CD54/74HCT125. High Speed CMOS Logic Quad Buffer, Three-State. [ /Title (CD74 HC125 , CD74 HCT12 5) /Sub-ject (High Speed CMOS Logic Quad Buffer, Three-State) 2. Functional Diagram ... Labels: 74HC125 |
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| 4. | 973.26 Kb • 21 Pages |
Abstract: ... 1 74HC125-SO 74HC125 SO14 1 U6. 2 74HC14-SO 74HC14 SO14 1 U10. 3 AT89C51CC01-SPLC PLCC44 1 U2. 4 AT89C51CC03-SPLC PLCC52 1 U1. 5 ATA6660-SO8 ATA6660 CAN TRANSCEIVER SO8 ATMEL 1 U4 6 MAX202ECSE-SO MAX202ECSE ... Labels: 74HC125 |
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| 5. | 88.69 Kb • 4 Pages |
Abstract: ... Next the 74HC125 buffer needs to be modified. U3-3 is isolated from the circuit, so there aren’t two devices driving the SCLK node. Finally U3-8 is isolated, allowing U3B to be active and able to ... Labels: 74HC125, Application Notes |
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| 6. | 45.95 Kb • 1 Pages |
Abstract: ... 74HC125 74HC374 74HC373. RST SW1. 80C31-16. C6. RP1 RP2. X1. 74HC374. 74HC245. 74HC08. NE555. LED Option ... Labels: 74HC125 |
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| 7. | 490.84 Kb • 22 Pages |
Abstract: ... 1 74HC125-SO 74HC125 SO14 1 U6. 2 74HC14-SO 74HC14 SO14 1 U10. 3 AT89C51CC01-SPLC PLCC44 1 U2. 4 AT89C51CC03-SPLC PLCC52 1 U1. 5 ATA6660-SO8 ATA6660 CAN TRANSCEIVER SO8 ATMEL 1 U4 6 MAX202ECSE-SO MAX202ECSE ... Labels: 74HC125 |
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| 8. | 110.05 Kb • 8 Pages |
Abstract: ... the AD7710 SCLK pin is configured as an input and the serial clock buffer (74HC125) is configured as an input. With both links in position B , the MODE input is high putting the device into its self ... Labels: 74HC125, Application Notes |
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| 9. | 114.05 Kb • 8 Pages |
Abstract: ... the AD7711 SCLK pin is configured as an input and the serial clock buffer (74HC125) is configured as an input. With both links in position B , the MODE input is high putting the device into its self ... Labels: 74HC125, Application Notes |
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| 10. | 113.2 Kb • 6 Pages |
Abstract: ... This serial clock is buffered using a 74HC125 three-state buffer on the evaluation board and LK1 determines the direction of this bidirectional buffer depend-ing on the mode of operation. RFS ... Labels: 74HC125, Application Notes |
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