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Part : P82SF74F273 Supplier : National Semiconductor Manufacturer : Chip One Exchange Stock : 138 Best Price : - Price Each : -
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74F273 Datasheet

Part Manufacturer Description PDF Type
74F273 Fairchild Semiconductor Octal D-Type Flip-Flop Original
74F273 Fairchild Semiconductor Octal D-Type Flip-Flop Original
74F273 National Semiconductor Octal D Flip-Flop Original
74F273A Philips Semiconductors Octal D flip-flop Original
74F273AD Philips Semiconductors Octal D Flip-Flop Original
74F273AD Philips Semiconductors Octal D Flip-Flop Scan
74F273AN Philips Semiconductors Octal D Flip-Flop Original
74F273AN Philips Semiconductors Octal D Flip-Flop Scan
74F273D Philips Semiconductors Octal D Flip-Flop Scan
74F273N Philips Semiconductors Octal D Flip-Flop Scan
74F273PC Fairchild Semiconductor Octal D-Type Flip-Flop Original
74F273PC Fairchild Semiconductor Octal D-Type Flip-Flop Original
74F273PC National Semiconductor Octal D Flip-Flop Original
74F273PC N/A Historical semiconductor price guide (US$ - 1998). From our catalog scanning project. Scan
74F273PC_NL Fairchild Semiconductor Octal D-Type Flip-Flop Original
74F273PCQR N/A Historical semiconductor price guide (US$ - 1998). From our catalog scanning project. Scan
74F273PCX Fairchild Semiconductor Octal D-Type Flip-Flop Original
74F273SC Fairchild Semiconductor Octal D-Type Flip-Flop Original
74F273SC Fairchild Semiconductor Octal D-Type Flip-Flop Original
74F273SC National Semiconductor Octal D Flip-Flop Original
Showing first 20 results.

74F273

Catalog Datasheet MFG & Type PDF Document Tags
Abstract: Revised September 2000 74F273 Octal D-Type Flip-Flop General Description Features The 74F273 has eight edge-triggered D-type flip-flops with individual D inputs and Q outputs. The common , Ordering Code: Order Number Package Number Package Description 74F273SC M20B 20-Lead Small Outline Integrated Circuit (SOIC), JEDEC MS-013, 0.300 Wide 74F273SJ M20D 20-Lead Small Outline Package (SOP), EIAJ TYPE II, 5.3mm Wide 74F273PC N20A 20-Lead Plastic Dual-In-Line Package (PDIP Fairchild Semiconductor
Original
74F377 74F373 74F374 MS-001

74F273

Abstract: 74F273PC Revised September 2000 74F273 Octal D-Type Flip-Flop General Description Features The 74F273 has eight edge-triggered D-type flip-flops with individual D inputs and Q outputs. The common , Ordering Code: Order Number Package Number Package Description 74F273SC M20B 20-Lead Small Outline Integrated Circuit (SOIC), JEDEC MS-013, 0.300 Wide 74F273SJ M20D 20-Lead Small Outline Package (SOP), EIAJ TYPE II, 5.3mm Wide 74F273PC N20A 20-Lead Plastic Dual-In-Line Package (PDIP
Fairchild Semiconductor
Original
M20D

N74F273D

Abstract: signetics fast 74f273 Signetics FAST Products FAST 74F273 Flip-Flop Octal D Flip-Flop Product Specification TYPE 74F273 T Y P I C A L f MAX 125M H z T Y P IC A L S U P P L Y C U R R E N T (T O T A L ) 66m A , transparent latch version · See 'F374 for 3-state version DESCRIPTION The 74F273 has eight edge-triggered , -Pin Plastic S O L C O M M E R C IA L R A N G E Vc c * 5V±10%; Ta * 0°C to +70°C N 74F273N N74F273D INPUT , Flip-Flop LO GIC DIAGRAM FAST 74F273 FUNCTION T A B L E IN PU TS MR L H H H h L I X T CP X T Dn X h
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signetics fast 74f273

74F273N

Abstract: 74F273D 74F273N, 74F273AN 20-pin plastic SOL 74F273D, 74F273AD INPUT AND OUTPUT LOADING AND FAN-OUT TABLE PINS , elements. TYPE TYPICAL (MAX TYPICAL SUPPLY CURRENT (TOTAL) 74F273 125MHz 66mA 74F273A 170MHz 25mA , FAST Products Product specification Octal D flip-flop 74F273/273A FEATURES â'¢ High impedance inputs , Master Reset â'¢ 74F273A has improved DC, AC, and fMAX â'¢ 74F273A has improved noise margin â'¢ See , -State version DESCRIPTION The 74F273 has eight edge-triggered D-type flip-flops with individual D inputs and Q
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0G521 00S211S 74F273/273A 125MH 170MH 005S1E0

74F273N

Abstract: 05091 (TOTAL) 66mA 25mA 74F273 74F273A 125MHz 170MHz ORDERING INFORMATION PACKAGES 20-pin plastic DIP 20-pin plastic SO L COMMERCIAL RANGE Vcc = 5V±10%; T.m b = 0°Cto+70°C 74F273N,74F273AN 74F273D, 74F273AD INPUT AND OUTPUT LOADING AND FAN-OUT TABLE PINS D 0-D 7 MR CP Q 0-Q 7 Data inputs , current Short-circuit output current4 74F273 Icch ICCL 74F273A Icch Iccl Vcc = MIN, I, = I Ik Vcc = 0 , 74F273/273A FEATURES · High impedance inputs for reduced loading (20pA in Low and High states) ·
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05091

74F273SC

Abstract: 74F273 Revised August 1999 74F273 Octal D-Type Flip-Flop General Description Features The 74F273 has eight edge-triggered D-type flip-flops with individual D inputs and Q outputs. The common , Ordering Code: Order Number Package Number Package Description 74F273SC M20B 20-Lead Small Outline Integrated Circuit (SOIC), JEDEC MS-013, 0.300 Wide 74F273SJ M20D 20-Lead Small Outline Package (SOP), EIAJ TYPE II, 5.3mm Wide 74F273PC N20A 20-Lead Plastic Dual-In-Line Package (PDIP
Fairchild Semiconductor
Original

74F273N

Abstract: 74F273D CURRENT (TOTAL) 74F273 125MHz 66mA 74F273A 170MHz 25mA ORDERING INFORMATION PACKAGES COMMERCIAL RANGE Vcc = 5V±10%; Tan* = 0°C to +70°C 20-pin plastic DIP 74F273N, 74F273AN 20-pin plastic SOL 74F273D , 74F273/273A FEATURES â'¢ High impedance inputs lor reduced loading (20HA in Low and High states) â , common dock â'¢ Buffered asynchronous Master Reset â'¢ 74F273A has improved DC, AC, and fMAX â'¢ 74F273A has improved noise margin â'¢ See 74F377 for dock enable version â'¢ See 74F373 for transparent
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74d8

Abstract: and Reliability SN 54F273 . . . J PACKAGE S N 74F273 . . . DW OR N PACKAGE (TOP VIEWI CLR : 1Q , 125 0 NOM 5 M AX 5.5 MIN 4 .5 2 0.8 -1 8 - 1 20 70 SN 74F273 NOM 5 M AX 5.5 UNIT V V V mA mA mA °C , 0 -1 5 0 85 88 MIN SN 74F273 TYP* M AX - 1.2 UNIT V V V hA (iA iiA mA mA mA tim ing requirements , pF, 500 fì. V c c - 4.5 V to 5.5 V, CL Rl SN 54F273 M AX MIN M AX MIN 50 pF, 500 a SN 74F273 M AX MHz , " 4 .5 V to 5 .5 V, Cl RL SN54F273 M AX MIN M AX MIN 50 pF, 500 ft, SN 74F273 M AX MHz ns ns ns UNIT
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74d8 SN74F273
Abstract: 74F273SC M20B 20-Lead Sm all O utline Integrated C ircuit (SOIC), JE D E C M S-013, 0.300 W ide 74F273SJ M20D 20-Lead Sm all O utline Package (SOP), EIAJ TY P E II, 5.3m m W ide 74F273PC N20A , 74F273 Octal D-Type Flip-Flop General Description Features The 74F273 has eight edge-triggered D , DS009511 w ww .fairchildsem i.com 74F273 Octal D-Type Flip-Flop F 74F273 Unit Loading/Fan , ns ns ns ns 74F273 Physical Dimensions inches (m illim eters) unless otherw ise noted -
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ti 261

Abstract: 74F273 Commercial 74F273PC Military Package Number N20A 54F273DM (Note 2) 74F273SC (Note 1) 74F273SJ (Note , 54F273,74F273 54F273 Octal D Flip-Flop Literature Number: SNOS182A 54F 74F273 Octal D Flip-Flop May 1995 54F 74F273 Octal D Flip-Flop General Description The 'F273 has eight edge-triggered D-type flip-flops with individual D inputs and Q outputs The common buffered Clock (CP) and Master , e 54F 74F273 Octal D Flip-Flop Physical Dimensions inches (millimeters) (Continued) 20
Texas Instruments
Original
ti 261 C1995

54F273DM

Abstract: 74F273 54F 74F273 Octal D Flip-Flop General Description Features The 'F273 has eight , Commercial Package Number Military 74F273PC Y Y Y Y Y Y Y Ideal buffer for MOS , ) 20-Lead (0 300 Wide) Molded Dual-In-Line J20A 20-Lead Ceramic Dual-In-Line 74F273SC (Note 1) M20B 20-Lead (0 300 Wide) Molded Small Outline JEDEC 74F273SJ (Note 1) M20D 20-Lead (0 300 , 9511 RRD-B30M75 Printed in U S A 54F 74F273 Octal D Flip-Flop May 1995 Connection Diagrams
National Semiconductor
Original
F373 F374 54F273FM 54F273LM D-82256

74F273

Abstract: 54F273DM 74F273 Octal D Flip-Flop General Description Features The 'F273 has eight edge-triggered , protection Ordering Code: Commercial Military Package Package Description Number 74F273PC N20A 20-Lead (0.300" Wide) Molded Dual-In-Line J20A 20-Lead Ceramic Dual-In-Line 74F273SC (Note 1) M20B 20-Lead (0.300" Wide) Molded Small Outline, JEDEC 74F273SJ (Note 1) M20D 20 , -3 DS009511-5 © 1998 Fairchild Semiconductor Corporation DS009511 www.fairchildsemi.com 74F273
Fairchild Semiconductor
Original
Abstract: 74F273PC 54F273DM (Note 2) 74F273SC (Note 1) 74F273SJ (Note 1) 54F273FM (Note 2) 54F273LM (Note 2) Military , 74F273 Octal D Flip-Flop February 1998 FAIRCHILD S E M IC O N D U C T O R -n 74F273 Octal D Flip-Flop General Description The 'F273 has eight edge-triggered D-type flip-flops with in dividual D inputs and Q outputs. The common buffered Clock (CP) and Master Reset (MR) inputs load and reset , .1ainchildsemi.com 74F273 Octal D Flip-Flop Physical Dimensions 0 .0 9 0 0 .0 6 0 0 .0 4 0 ' 0 .0 3 0 TYP inches -
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74F273

Abstract: Carrier Type C 54F273DM (Note 2) 74F273SC (Note 1) 74F273SJ (Note 1) 54F273FM (Note 2) 54F273LM (Note 2 , 54F 74F273 Octal D Flip-Flop May 1995 54F 74F273 Octal D Flip-Flop General Description The 'F273 has eight edge-triggered D-type flip-flops with individual D inputs and Q outputs The common , ESD protection Commercial 74F273PC Military Package Number N20A Package Description 20 , 7 54F 74F273 Octal D Flip-Flop Physical Dimensions inches (millimeters) (Continued) 20
National Semiconductor
Original
5962-8855001RA 54F273DMQB 5962-8855001SA 54F273FMQB 59628855001SA

flip-flop

Abstract: 74F432 NATIONAL SEfllCOND { L O G I C } F A S T Product Selection Guide 31E D bSGHES OGbaBOS E Multiple Flip-Flops Function Hex D Flip-Flop Quad D Flip-Flop ; Octal D Flip-Flop ' Octal D Flip-Flop Octal D Flip-Flop w/Clock Enable Parallel D Register w/Enable Parallel D Register w/Enable Octal D Flip-Flop Octal D Flip-Flop " .Octal D Flip-Flop 10-Bit D Flip-Flop 9-Bit D Flip-Flop 8-Bit D Flip-Flop Device 54F/74F174 , 54F/74F1.75 54F/74F273 54F/74F374 54F/74F377 54F/74F378 54F/74F379 54F/74F534 54F
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flip-flop 74F432 d flipflop d latch flipflop D Flip-Flop 54F/74F273 54F/74F564 54F/74F574 54F/74F821 54F/74F823 54F/74F825
Abstract: 273 54F/74F273 Octal D Flip-Flop rS rz a ht edge-triggered D-type flip-flops with individual D The common buffered Clock (CP) and Master Reset n ^ re s e i (clear) all flip-flops simultaneously. .J"he state of each D input, one setup sitlon, is transferred to the Connection Diagrams T- M R p ~ ' -H K c r Q o [Z 1 ? ]Q 7 do [ T 3 H d 7 D i d U ] H K o 6 O i G l The register is full time before the LOW-td corresponding flip-flop's Q o Q 2| T JsJO s -
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54F/74F
Abstract: . Package Number Military Commercial 74F273PC Package Description N20A 20-Lead (0.300" Wide) Molded Dual-ln-Line J20A 20-Lead Ceramic Dual-ln-Line 74F273SC (Note 1) M20B 20-Lead (0.300" Wide) Molded Small Outline, JEDEC 74F273SJ (Note 1) M20D 20-Lead (0.300" Wide) Molded , U. S. A. 54F/74F273 Octal D Flip-Flop Na tio n al Connection Diagrams Pin Assignment for , -Lead (0.300â' Wide) Molded Dual-In-Line Package (P) NS Package Number N20A 7 54F/74F273 Octal D -
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Abstract: g n National æ æ Semiconductor 54F/74F273 Octal D Flip-Flop General Description The 'F273 has eight edge-triggered D-type flip-flops with in dividual D inputs and Q outputs. The common buffered Clock (CP) and Master Reset (MR) inputs load and reset (clear) all flip-flops simultaneously. The register is fully edge-triggered. The state of each D in put, one setup time before the LOW-to-HIGH clock tran sition, is transferred to the corresponding flip-flop's Q out put. All outputs will be forced LOW -
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Abstract: 273 54F/74F273 Connection Diagrams Octal D Flip-Flop The ' f e | | J h | j eight edge-triggered D-type flip-flops with individual D inputs rf|tptots. The common buffered Clock (CP) and Master Reset (MR) in p u t! Idfecifiandfreset (clear) all flip-flops simultaneously. The register is fully time before the LOW-tocorresponding flip-flopâ'™s Q o 1 The state of each D input, one setup rts ifis itio n , is transferred to the Ail outputs w ill be forced LOW in d e pe lfja iiB yfcf jlfe c k -
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74F273

Abstract: DIP20-P-300-2 TC74ACT273P/F CMOS TC74ACT273P,TC74ACT273F Octal D-Type Flip Flop with Clear TC74ACT273 2 CMOS 8 D CMOS TTL TTL TTL D Q "L" "L" TC74ACT273P TC74ACT273F · : fmax = 170 MHz () (VCC = 5 V) · : ICC = 8 A () (Ta = 25°C) · TTL : VIL = 0.8 V () · · : |IOH| = IOL = 24 mA () : tpLH - tpHL · 74F273 VIH = 2.0 V () DIP20-P-300-2.54A : 1.30 g () SOP20-P-300-1.27A : 0.22 g () 1
Toshiba
Original

BR 13005

Abstract: 54F273DM  National Semiconductor May 1995 54F/74F273 Octal D Flip-Flop General Description The 'F273 has eight edge-triggered D-type tlip-flops with individual D inputs and Q outputs. The common buffered Clock (CP) and Master Reset (MR) inputs load and reset (clear) all flip-flops simultaneously. The register is fully edge-triggered. The state of each D input, one setup time before the LOW-to-HIGH clock transition, is transferred to the corresponding flip-flop's Q output. All outputs will be forced LOW
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BR 13005 J20A CERAMIC LEADLESS CHIP CARRIER

signetics fast 74f273

Abstract: transparent latch version · See 74F374 for 3­State version DESCRIPTION The 74F273 has eight edge­triggered , description The 74F273 has eight edge­triggered D­type flip­flops with individual D inputs and Q outputs
Philips Semiconductors
Original
74F377A DIP20
Abstract: N> N j ÆÆ Semiconductor 59 National CO 54F/74F273 Octal D Flip-Flop General Description The 'F273 has eight edge-triggered D-type flip-flops with in dividual D inputs and Q outputs. The common buffered Clock (CP) and Master Reset (MR) inputs load and reset (clear) all flip-flops simultaneously. The register is fully edge-triggered. The state of each D in put, one setup time before the LOW-to-HIGH clock tran sition, is transferred to the corresponding flip-flop's Q out put. All outputs will be -
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Showing first 20 results.