NEW DATABASE - 350 MILLION DATASHEETS FROM 8500 MANUFACTURERS
NEW DATABASE - 350 MILLION DATASHEETS FROM 8500 MANUFACTURERS
| Catalog Datasheet Results | Type | Document Tags |
| Abstract: DATE REV ECN APP'D. BY 1-10-06 C4 7432 TRM .635 [16.13] MAX.- B 10 STEWART PATENTED âœ" ^ PATENTED ^ \ mira • .722 [18.34] MAX. S ro o to m -.450 [11.43]- â-¡ â-¡ - .125 [3.18] ±.010 [0.25] -.040 [1.02] (2) ( .150 [3.81] ) 0 [ 1+ 3+ 5+ 7+ a 2+ 4+ 6+ 8+_ ] .050 [1.27]- 0.035 [0.89] ±.003 [0.08] (8)- I-ft 10006 [0.15] I PIN #1 - -.100 [2.54] (3) .050 [1.27] (7 , HOLE LAYOUT SEEN FROM COMPONENT SIDE ALL CENTERUNE DIMENSIONS ARE BASIC. LU OC THIRD ... | OCR Scan |
1 pages, |
7432 7432 pin layout datasheet abstract |
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| Abstract: package configurations are available. Type ULN-2046A ULN-2046A and ULN-2086A ULN-2086A are housed in a 14-pin plastic dual in-line A package and Type ULS-2045H ULS-2045H is housed in a 14-pin hermetic dual in-line H package. FEATURES: • , on one side of the 16-lead plastic dual in-line package to simplify printed wiring board layout. A , Input Offset Voltage • High Gain: 75 min. at 10 mA • Plastic Package (16-pin) Dual In-Line A 40 , 767DC 767DC 767PC 767PC 780DC 780DC 781 DC 7 432 DC 7432 PC 7437 DC 7437 PC 7438DC 7438DC 7438PC 7438PC 7439DC 7439DC ULN2086A ULN2086A UDN3611M UDN3611M ... | OCR Scan |
2 pages, |
XI 3003 h xr1310 ULN-2083A ULN-2082A ULN-2047A ULN-2081A ULN-2054A MC1304 motorola transistor array 14 pin dip MPQ2483 7432 pin layout sprague transistors 3067 dual transistor SN7667 ULS-2045H ULN-2046A ULS-2045H abstract |
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| Abstract: Pin Layout * * Date: 10/15/93 Time: 17:32:41 , * * PLHS501 PLHS501 52нPin PLCC Package Pin Layout * * Date: 10/15/93 Time: 17:44:04 , Pin Layout * * Date: 10/15/93 Time: 17:50:08 , * * * PLHS501 PLHS501 52нPin PLCC Package Pin Layout * * Date: 10/15/93 Time: 17:58:06 , Pin Layout * * Date: 10/18/93 Time: 09:51:23 ... | Original |
47 pages, |
multiplexor 74138 18*16 barrel shifter design IC 7432 Manual ttl 74138 data sheet IC 7432 IC 7432 NAME 3-8 decoder 74138 pin diagram pn sequence generator using d flip flop ttl family 7404 internal gates of IC 7400 12 bit comparator IC 7432 decoder PLHS501 AN049 PLHS501 abstract |
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| Abstract: 743.2 744.4 744.6 POWER OUTPUT VCO CURRENT PLL CURENT (dBm) (mA) (mA) -45°C , -28.17 -28.20 -28.26 -28.34 -28.35 FREQUENCY (MHz) 739.4 739.6 740.8 742.0 743.2 744.4 744.6 FREQUENCY (MHz) 739.4 739.6 740.8 742.0 743.2 744.4 744.6 F2 +25°C -29.23 -29.23 , -90.92 -90.43 -91.19 -89.80 -90.95 -89.81 739.4 739.6 740.8 742.0 743.2 744.4 744.6 1kHz , KSN-745A-119 KSN-745A-119+ Frequency Synthesizer Pin Connection Pin Configuration Pin Number Function 1 2 ... | Original |
10 pages, |
c 2818 ADF4106 7432 pin layout 7404 7408 7432 KSN-745A-119 KSN-745A-119 abstract |
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| Abstract: package configurations are available. Type ULN-2046A ULN-2046A and ULN-2086A ULN-2086A are housed in a 14-pin plastic dual in-line A package and Type ULS-2045H ULS-2045H is housed in a 14-pin hermetic dual in-line H package. FEATURES: • , on one side of the 16-lead plastic dual in-line package to simplify printed wiring board layout. A , Input Offset Voltage • High Gain: 75 min. at 10 mA • Plastic Package (16-pin) Dual In-Line A 40 , 767DC 767DC 767PC 767PC 780DC 780DC 781 DC 7 432 DC 7432 PC 7437 DC 7437 PC 7438DC 7438DC 7438PC 7438PC 7439DC 7439DC ULN2086A ULN2086A UDN3611M UDN3611M ... | OCR Scan |
3 pages, |
SN76116N N5111A sg3821 ULN-2081A SN72741P SFC2741 SN72741 sfc*2741 uln2046a semiconductors replacement guide MC1305P uln2082a MC1310P L141T1 ULS-2045H ULN-2046A ULS-2045H abstract |
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| Abstract: with 2s complement data format. It operates from a single +3V power supply and is available in 20-pin , improving the power supply rejection ratio. The V AG reference pin allows for decoupling of the internal , ) Programmable receive gain: 0 to Â21dB in 3dB steps Industrial temp. range (Â40C to +85C) 20-pin SOG (SOP), SSOP , . 4 5. PIN CONFIGURATION . 6 6. PIN DESCRIPTION ... | Original |
34 pages, |
W681360 13-BIT W681360 abstract |
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| Abstract: +3V power supply and is available in 20-pin SOG(SOP), SSOP and TSSOP package options. The primary , reference pin allows for decoupling of the internal circuitry that generates the reference voltage to the , Industrial temp. range (Â40°C to +85°C) 20-pin SOG (SOP), SSOP and TSSOP as well as a QFN-32L QFN-32L package , . 4 5. PIN CONFIGURATION . 6 6. PIN DESCRIPTION ... | Original |
34 pages, |
100 20L A1 diode AI23 power amplifier frequency range 300Hz QFN-32L W681360R SSOP-209 W681360 W681360SG W681360RG W681360YG W681360WG 13-BIT W681360 abstract |
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| Abstract: +3V power supply and is available in 20-pin SOG(SOP), SSOP and TSSOP package options. The primary , reference pin allows for decoupling of the internal circuitry that generates the reference voltage to the , Industrial temp. range (Â40°C to +85°C) 20-pin SOG (SOP), SSOP and TSSOP as well as a QFN-32L QFN-32L package , . 4 5. PIN CONFIGURATION . 6 6. PIN DESCRIPTION ... | Original |
34 pages, |
W681360S W681360RG W681360 QFN-32L AI23 W681360WG W681360SG 13-BIT W681360 abstract |
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| Abstract: and component layout drawing to locate each part and install from the "TOP" side of the board bending , capacitors correctly. The polarity is indicated on the component layout drawing. Solder. ( ) Install , that shown on the component layout drawing, and the transistors must be turned to match the outlines on the component layout drawing as well. Solder. ( ) Install all of the integrated circuits on , should match with that shown on the component layout drawing for each of the IC's. Integrated circuits ... | Original |
17 pages, |
7404 hex inverter 7474 D flip-flop diode 1n5402 IC AND GATE 7408 pin diagram of ic 7493 IC 7408 pin diagram of IC 7402 ic 7404 not gate datasheet 14 pin ic 7404 datasheet 7404 not gate 7493 binary counter pin DIAGRAM OF IC 7486 GT-6144 GT-6144 GT-6144 abstract |
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| Abstract: Output Capacitance CoUT - - 9 PF I/O Pin Capacitance ci/o - - 11 PF AVB SERIES CAPACITANCE (Ta = 25 °C , - 8 pF Output Capacitance CoUT - - 16 PF I/O Pin Capacitance C|/o - - 21 PF 1-42 MB65XXXX MB65XXXX , CHIP LAYOUT AND ORGANIZATION CHIP LAYOUT AV AND AVB SERIES EXCEPT C6600AV C6600AV AND C8000AV C8000AV â-¡ â-¡ â-¡ â-¡ â-¡â-¡ â-¡ â-¡ , , C8000AV C8000AV AND AVM GATE ARRAY CHIP LAYOUT AND ORGANIZATION C6600AV C6600AV, C8000AV C8000AV CHIP LAYOUT For C6600AV C6600AV each , 20 160 1-45 MB65xxxx MB66xxxx MB67xxxx C1502AVM C1502AVM, C2301AVM C2301AVM CHIP LAYOUT The maximum basic cells ... | OCR Scan |
18 pages, |
JLCC-68 Ci 74153 counter 7469 cI 74147 CI 7408 C6600AV LCC64 C1600AVB cI 74150- 74192 pin configuration FPT-24 m865 74382 ci 74194 MB65XXXX MB66XXXX MB65XXXX abstract |
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| 12.4.9 UART_A_ReadPin . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 218 12.4.10 UART_A_WritePin . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 220 12 _A_Transmit . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 265 13.4.13 BRT_A_ReadPin . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 267 13.4.14 BRT_A_WritePin -4 Code and Data Structure Layout . . . . . . . . . . . . . . . . . . . . . . . 20 Figure 3-1 Module www.datasheetarchive.com/download/12042666-484029ZC/2001_11b.zip (MMC2001DDRM.pdf) |
Motorola | 16/02/2000 | 791.67 Kb | ZIP | 2001_11b.zip |
| 12.4.9 UART_A_ReadPin . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 218 12.4.10 UART_A_WritePin . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 220 12 _A_Transmit . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 265 13.4.13 BRT_A_ReadPin . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 267 13.4.14 BRT_A_WritePin -4 Code and Data Structure Layout . . . . . . . . . . . . . . . . . . . . . . . 20 Figure 3-1 Module www.datasheetarchive.com/download/94631832-484030ZC/2001_11c.tar |
Motorola | 16/02/2000 | 2330 Kb | TAR | 2001_11c.tar |
| 12.4.9 UART_A_ReadPin . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 223 12.4.10 UART_A_WritePin . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 225 12 _A_Transmit . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 269 13.4.13 BRT_A_ReadPin . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 271 13.4.14 BRT_A_WritePin Structure Layout . . . . . . . . . . . . . . . . . . . . . . . 21 Figure 3-1 Module Interface File www.datasheetarchive.com/download/20401246-484028ZC/2001_11.tar |
Motorola | 16/02/2000 | 2340 Kb | TAR | 2001_11.tar |
| * 7430 8-input Positive-Nand Gates * 7432 Quadruple 2-input ns + ) *- *$ * 7432 Quadruple 2-input Positive-Or Gates * * The TTL Data Book, Vol 2, 1985, TI * tdn 06/26/89 Update interface and model names .subckt 7432 A B Y + optional: DPWR www.datasheetarchive.com/files/spicemodels/misc/eval.lib |
Spice Models | 20/12/2001 | 295.35 Kb | LIB | eval.lib |
| #121 : XC3000/XC4000 XC3000/XC4000 XC3000/XC4000 XC3000/XC4000: Pin sense of internal tristate buffers Xilinx Answer #122 : XC3000/XC4000 XC3000/XC4000 XC3000/XC4000 XC3000/XC4000 : JTAG - What is the state of the INIT pin during boundary scan configuration? Xilinx Answer #144 frame error. Xilinx Answer #170 : XC4000 XC4000 XC4000 XC4000 JTAG - Can boundary scan pins be used for JTAG and standard input/output at the same time? Xilinx Answer #171 : Generating pin constraints from an LCA : Why are there two tristate pins (TP and TS ) on the 4000H 4000H 4000H 4000H IOBs? Xilinx Answer #176 : FPGA www.datasheetarchive.com/files/xilinx/docs/rp00002/rp00254.htm |
Xilinx | 29/02/2000 | 662.64 Kb | HTM | rp00254.htm |
| Sheet1 Sheet2 Sheet3 rxrf_1 Part # Model/Subckt Name Part Type SubType Description IGEN IGEN !Generators !Pulse Symmetric Current VGEN VGEN !Generators !Pulse Symmetric Voltage PSUPPLY PSUPPLY !Generators Power Power Supply PWRSPLY PWRSPLY !Generators Power Current Limited PWRSPLY2 PWRSPLY2 !Generators Power Sigmoid Current Limited AM AM !Generators Signal DCLK DClock !Generators Signal Digital oscillator DSOURCE Dsource !Generators Signal Digital source Exponential Exponential !Generato www.datasheetarchive.com/download/23131848-777573ZC/icap4rxrfliblist.zip (ICAP4RxRFlibList.xls) |
Spice Models | 29/07/2012 | 211.35 Kb | ZIP | icap4rxrfliblist.zip |
| Sheet1 Sheet2 Sheet3 rx_1 Part # Model/Subckt Name Part Type SubType Description IGEN IGEN !Generators !Pulse Symmetric Current VGEN VGEN !Generators !Pulse Symmetric Voltage PSUPPLY PSUPPLY !Generators Power Power Supply PWRSPLY PWRSPLY !Generators Power Current Limited PWRSPLY2 PWRSPLY2 !Generators Power Sigmoid Current Limited AM AM !Generators Signal DCLK DClock !Generators Signal Digital oscillator DSOURCE Dsource !Generators Signal Digital source ExponentialI ExponentialI !Generato www.datasheetarchive.com/download/46754491-777571ZC/icap4rxliblist.zip (ICAP4RxlibList.xls) |
Spice Models | 29/07/2012 | 198.91 Kb | ZIP | icap4rxliblist.zip |
| Sheet1 Sheet2 Sheet3 rxpw_1 Part # Model/Subckt Name Part Type SubType Description IGEN IGEN !Generators !Pulse Symmetric Current VGEN VGEN !Generators !Pulse Symmetric Voltage PSUPPLY PSUPPLY !Generators Power Power Supply PWRSPLY PWRSPLY !Generators Power Current Limited PWRSPLY2 PWRSPLY2 !Generators Power Sigmoid Current Limited AM AM !Generators Signal DCLK DClock !Generators Signal Digital oscillator DSOURCE Dsource !Generators Signal Digital source ExponentialI ExponentialI !Genera www.datasheetarchive.com/download/31304461-777572ZC/icap4rxpwrliblist.zip (ICAP4RxPwrlibList.xls) |
Spice Models | 29/07/2012 | 215.73 Kb | ZIP | icap4rxpwrliblist.zip |
| (major changes since last revision) Package changed from 128-pin to 144-pin TQFP (same body) Electrical . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 2-49 2.8 Pin Definitions and Port Functions . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 2-50 2.8.2 Pin Configuration of XC161 XC161 XC161 XC161 . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 2-51 2.8.3 Pin Definitions of XC161 XC161 XC161 XC161 controller - Dedicated (extra pins) JTAG and break interface - Hardware, software and external pin www.datasheetarchive.com/files/infineon/mc_data/dave/products/xc161cj_v24.dip!/xc161cj/documents/xc161_umd_system_v1.1_2002_02.pdf |
Infineon | 09/02/2004 | 9113.92 Kb | DIP | xc161cj_v24.dip |
| (major changes since last revision) Package changed from 128-pin to 144-pin TQFP (same body) Electrical . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 2-49 2.8 Pin Definitions and Port Functions . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 2-50 2.8.2 Pin Configuration of XC161 XC161 XC161 XC161 . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 2-51 2.8.3 Pin Definitions of XC161 XC161 XC161 XC161 controller - Dedicated (extra pins) JTAG and break interface - Hardware, software and external pin www.datasheetarchive.com/files/infineon/mc_data/dave/products/xc161cj.dip!/xc161cj/documents/xc161_umd_system_v1.1_2002_02.pdf |
Infineon | 09/02/2004 | 9113.92 Kb | DIP | xc161cj.dip |