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SN7400NSRG4 Texas Instruments IC TTL/H/L SERIES, QUAD 2-INPUT NAND GATE, PDSO14, GREEN, PLASTIC, SOP-14, Gate ri Buy
SN7400NSR Texas Instruments IC TTL/H/L SERIES, QUAD 2-INPUT NAND GATE, PDSO14, GREEN, PLASTIC, SOP-14, Gate ri Buy
SN7400D Texas Instruments Quad 2-input positive-NAND gates 14-SOIC 0 to 70 ri Buy

7400 fan-out

Catalog Datasheet Results Type PDF Document Tags
Abstract: fan-out delay per package per gate ns mW MIC 7430 NAND 1 8 13 10 10 MIC 7453 AND-OR-INVERT1 1 , Max. definition per inputs per inputs per toggle dissipation fan-out package flip-flop flip-flop , Max. Typ. Max. definition per package propagation frequency dissipation fan-out delay per , Logic Integrateci Circuits, MIC 7400 Series TTL Gates in order of gates per package Type , 7460 AND 2 4 5 8 42 MIC 7410 NAND 3 3 13 30 10 MIC 7400 NAND 4 2 13 40 10 MIC 7401 NAND 4 2 35 40 10 ... OCR Scan
datasheet

1 pages,
30.97 Kb

of 7400 Series - TTL 7400 7474 nand ttl 7410 7474 J-K Flip-Flop nand ttl 7400 7402 7450 ttl Flip-Flop 7470 7472 Flip-Flop TTL 7490 TTL 7400 propagation delay 7402 J-K Flip-Flop datasheet abstract
datasheet frame
Abstract: SN 7400 o VIER NAND-GATTER M IT JE ZWEI EINGÄNGEN AEin 2 A A us BEin 1 BEin 2 elektor IC-Kartei o E lektor April 1972 , _ CEin 1 CEin 2 CAus ^Ein 1 D£in 2 D aus OV 429 elektor IC-Kartei I KURZDATEN 1 10 typ.10 ns | FAN-IN 1 EINGANG FAN-OUT VERZ-GERUNGS ZEIT ÄQUIVALENTE TYPEN FAIRCHILD MOTOROLA PHILIPS RAYTHEON SIEMENS U6A740059X U6A740059X MC 458 L FJH131 FJH131 RG 142 D FLU 101 I INNENAUFBAU 7400 U I » n * n >f l 4 H» n · 430 ASTABILER ... OCR Scan
datasheet

3 pages,
467.92 Kb

fairchild 7400 ELEKTOR 7400 fan-in FJH131 Multivibrator 7400 7400 fan-out datasheet abstract
datasheet frame
Abstract: TTL SERIES 5400/7400 FEATURES • High speed (typical propagation delay 10 ns) combined with low power dissipation (typically 10mW per gate) • High fan-out - maximum 10 • High noise immunity - typically 1V at Tamb = 25°C • Low output impedance in both states • Supply voltage of 5V • Choice of three packages Typical Propagation Delay Temperature Range Package Series 5400 Series 5400J 5400J , 7400 Series 7400J 7400J Series 7400E 7400E 10ns 10ns 0 to + 70°C Oto + 70°C Ceramic Dual In-line (H14) Moulded ... OCR Scan
datasheet

1 pages,
15.58 Kb

10ns 5400F 7400E of 7400 - TTL 5400J 7400J TTL 5400 7400 7400 ttl gate 7400 series of 7400 Series - TTL 7400 fan-out 7400 TTL TTL 7400 propagation delay TTL 7400 datasheet abstract
datasheet frame
Abstract: : 0.5 V max. - Logic 1 Fan-out: 20/tap max. - Logic 0 Fan-out: 10/tap max. - Power Dissipation: 740 , 200 20.0 ±2.0 DDU-7-250 DDU-7-250 250 25.0 ±2.0 DDU-7-300 DDU-7-300 300 30.0 ±3.0 DDU-7-400 400 40.0 ±4.0 DDU-7-500 DDU-7-500 ... OCR Scan
datasheet

1 pages,
45.91 Kb

DDU-7-500 DDU-7-10 DDU-7-100 DDU-7-150 DDU-7-20 DDU-7-200 DDU-7-25 DDU-7-250 DDU-7-300 DDU-7-400 DDU-7-50 7400 fan-out datasheet abstract
datasheet frame
Abstract: Fan-out: 20/tap max. - Logic 0 Fan-out: 10/tap max. - Power Dissipation: 740 MW max. Total Delay Part No. , DDU-7-300 DDU-7-300 300 30.0 ±3.0 DDU-7-400 400 40.0 ±4.0 DDU-7-500 DDU-7-500 500 50.0 ±5.0 'Vime delay referenced to 1st tap. ... OCR Scan
datasheet

1 pages,
45.91 Kb

7400 fan-out datasheet abstract
datasheet frame
Abstract: Fan-out: 20/tap max. - Logic 0 Fan-out: 10/tap max. - Power Dissipation: 740 MW max. Total Delay Part , 250 25.0 ±2.0 DDU-7-300 DDU-7-300 300 30.0 ±3.0 DDU-7-400 400 40.0 ±4.0 DDU-7-500 DDU-7-500 500 50.0 ±5.0 'Time delay ... OCR Scan
datasheet

1 pages,
94.25 Kb

DDU-7-500 DDU-7-100 DDU-7-150 DDU-7-20 DDU-7-200 DDU-7-25 DDU-7-250 DDU-7-300 DDU-7-400 DDU-7-50 7400 fan-out datasheet abstract
datasheet frame
Abstract: Logic 1 Fan-out: 20/tap max. - Logic 0 Fan-out: 10/tap max. - Power Dissipation: 740 MW max. Total , DDU-7-200 DDU-7-200 200 20.0 ±2.0 DDU-7-250 DDU-7-250 250 25.0 - 2.0 DDU-7-300 DDU-7-300 300 30.0 -3.0 DDU-7-400 400 40.0 M.O ... OCR Scan
datasheet

1 pages,
538.93 Kb

DDU-7-500 DDU-7-10 DDU-7-100 DDU-7-150 DDU-7-20 DDU-7-200 DDU-7-25 DDU-7-250 DDU-7-300 DDU-7-400 DDU-7-50 7400 fan-out datasheet abstract
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Abstract: 54/7400 v 54H/74H00 54H/74H00^f 54S/74S00 54S/74S00^// $ /V 54LS/74LS00 54LS/74LS00^ /^ QUAD 2-INPUT NAND GATE ORDERING CODE: See Section 9 INPUT LOADING/FAN-OUT: See Section 3 for U.L. definitions PINS Inputs Outputs 54/74 (U.L.) HIGH/LOW 1.0/1.0 20/10 54/74H 54/74H (U.L.) HIGH/LOW 1.25/1.25 12.5/12.5 54/74S 54/74S (U.L.) HIGH/LOW 1.25/1.25 25/12.5 54/74LS 54/74LS (U.L.) HIGH/LOW 0.5/0.25 10/5.0 (2.5) 00 PIN COMMERCIAL GRADE MILITARY GRADE PKG PKGS OUT Vcc = +5.0 V ±5%, Ta = 0° C to +70° C Vcc = +5.0 V ±10%, Ta = -55° C to +125°C TYPE ... OCR Scan
datasheet

1 pages,
60.86 Kb

74H00PC 54S00DM 74LS00 PIN 74LS00 pin connection 74S00PC 74S00D 7400DC 74H00 74LSOO 74LS00D 74LS00DC 74H00DC 74LS00 74LS00 fan-out 54LS/74LS00 54LS/74LS00 abstract
datasheet frame
Abstract: 2. Conn ect unused inputs to a used input if maximum fan-out of the cIriving output will not be , Schottky has high fan-out capabilities both in the logic " 0" and logic " I " state. Within the family Low Power Schottky can fan-out to 22 in logic " 0 " state and 20 in logic "1 " state. Fan-out capability is , example, if a 74 gate is driving another 74 gate, the fan-out capability would be: F o . = 400^a = 10 tor , current requirements, we can calculate the fan-out for 54/74LS 54/74LS and 54/74 families. Tables 9 and 10 show ... OCR Scan
datasheet

9 pages,
472.11 Kb

IC TTL 7400 7400 fan-out jk 7474 TTL counters 7400 series TTL 74ls74 signetics 8280 7400 family noise margin ic 74LS04 ls 7400 74LS00 fan out 7400 signetics TTL 74ls series logic family 74LS04 noise margin datasheet abstract
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Abstract: Operating Free-Air Temperature Range -55 25 125 0 25 70 °C Normalized Fan-Out from Each Output, N 10 10 , FAIRCHILD TTL/SSI . 9N00/5400 9N00/5400, 7400 QUAD 2-INPUT NAND GATE logic and connection diagram dip (TOP VIEW) R pällTSl HI |îô| Fl m reí ra ULUüJLJLJÜILJ Positive logic: Y = AB flatpak (TOP VIEW) GND 13 12 11 10 9 8 n n n ri n vccO- INPUTS ao- schematic diagram (EACH GATE) . 3.6 kSÎ - RI E ti 1.6 kn R2 i , Output Short Circuit Current (Note 3) -20 -55 mA 9N00/5400 9N00/5400 Vcc = MAX. 5 -18 -55 mA 9N00/7400 'CCH ... OCR Scan
datasheet

1 pages,
67.93 Kb

ssi ttl 7400 ttl nand gate 7400 7400 logic diagram 7400 NAND Gate 2 input 7400 quad 2 input nand gate ttl nand gate 7400 quad TI TTL 5400 7400 fan-out 7400 quad 2-input NAND gate tPHL 7400 9N00/5400 9N00/5400 abstract
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Datasheet Content (non pdf)

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Over 1.1 million files (1986-2014): html articles, reference designs, gerber files, chemical content, spice models, programs, code, pricing, images, circuits, parametric data, RoHS data, cross references, pcns, military data, and more. Please note that due to their age, these files do not always format correctly in modern browsers. Disclaimer.
 
high fan-out signals, 3-state signals, and clocks inside a PLD device. The "Input/Output Functions" order under each category. There are a number of standard TTL 7400-type functions in the different libraries. All 7400-type functions start with a "X74" prefix and are listed after all other elements. The Convention A carry-lookahead design accommodates large counters without extra gating. On TTL 7400 Data Registers There are three TTL 7400-type data registers designed to function exactly as the TTL
www.datasheetarchive.com/files/xilinx/docs/wcd00021/wcd021b5.htm
Xilinx 04/06/1999 288.64 Kb HTM wcd021b5.htm
high fan-out signals, 3-state signals, and clocks inside a PLD device. The "Input/Output Functions" alphanumeric order under each category. There are a number of standard TTL 7400-type functions in the different libraries. All 7400-type functions start with a "X74" prefix and are listed after all other elements. The Convention A carry-lookahead design accommodates large counters without extra gating. On TTL 7400 Data Registers There are three TTL 7400-type data registers designed to function exactly as the TTL
www.datasheetarchive.com/files/xilinx/docs/wcd00040/wcd04011.htm
Xilinx 16/02/1999 288.7 Kb HTM wcd04011.htm
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Xilinx 23/08/2004 21918.22 Kb ZIP xapp663.zip
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Xilinx 26/05/2004 490.77 Kb ZIP xapp694.zip
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