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| Part | Manufacturer | Description | Datasheet | BUY |
|---|---|---|---|---|
| X28HC256JI-90T1 | Intersil Corporation | 256k, 32k x 8-Bit, 5V, Byte Alterable EEPROM; PDIP28, PLCC32, SOIC28; Temp Range: See Datasheet |  |
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| X28HC64PIZ-90 | Intersil Corporation | 64k, 8k x 8 Bit; 5 Volt, Byte Alterable EEPROM; PDIP28, PLCC32, SOIC28; Temp Range: See Datasheet | |
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| X28HC256JI-90 | Intersil Corporation | 256k, 32k x 8-Bit, 5V, Byte Alterable EEPROM; PDIP28, PLCC32, SOIC28; Temp Range: See Datasheet | |
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| X28HC256PZ-90 | Intersil Corporation | 256k, 32k x 8-Bit, 5V, Byte Alterable EEPROM; PDIP28, PLCC32, SOIC28; Temp Range: See Datasheet | |
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| X28HC64JIZ-90T1 | Intersil Corporation | 64k, 8k x 8 Bit; 5 Volt, Byte Alterable EEPROM; PDIP28, PLCC32, SOIC28; Temp Range: See Datasheet | |
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| X28HC64W | Intersil Corporation | 64k, 8k x 8 Bit; 5 Volt, Byte Alterable EEPROM; PDIP28, PLCC32, SOIC28; Temp Range: See Datasheet | |
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| Part : AT24C512BY7-YH-T | Supplier : Atmel | Manufacturer : Rochester Electronics | Stock : 3,000 | Best Price : $2.12 | Price Each : $2.12 |
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512-byte
| Catalog Datasheet | MFG & Type | Document Tags | |
|---|---|---|---|
spare assignment standardAbstract: nand flash spare area assignment ECC Algorithm (512Byte) Flash Planning Group Memory Division Samsung Electronics Co., Ltd , 512Byte Generate ECC Parity Code(24bit) during program operation on 512byte & Write it to NAND Flash's spare area Generate New ECC Parity Code (24bit) during read main area data (512byte) Compare , 512Byte 1st byte 2nd byte 3rd byte 4th byte Bit7 Bit7 Bit7 Bit7 Bit6 Bit6 Bit6 Bit6 , Technology P2048` P2048 Parity Generation for Main Array (Row) For 512Byte 1st byte 2nd byte |
Samsung Electronics Original |
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spare assignment standard nand flash spare area assignment oneNand flash P128 P256 P512 P2048P2048 P1024P1024 P2048P1024P512 P16P16 P16P8P4P2P1 |
| Abstract: 'H ÃM O M B D 03à 0M E 1-1 n fi Z86C02/E02/L02 Low-Cost, 512-Byte ROM Microcontrollers , D24 DS96DZ80301 (11/96) Z86C02/E02/L02 Low-Cost, 512-Byte ROM Microcontrollers < £ > Z iL Q , ) TbD Z86C02/E02/L02 Low-Cost, 512-Byte ROM Microcontrollers « y jin r ; KJ 18 Il 1 , Low-Cost, 512-Byte ROM Microcontrollers nr; ABSOLUTE MAXIMUM RATINGS Parameter Min Max , "33 1-5 Z86C02/E02/L02 Low-Cost, 512-Byte ROM Microcontrollers < 3 > Z ji n r ; DC ELECTRICAL |
- OCR Scan |
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Z86C02 Z86E02 Z86L02 Z86C02/E02 Z86C02/L02 C02/L02 |
zilog z86E08Abstract: Z86E02 PRELIMINARY PRODUCT SPECIFICATION 1 Z86C02/E02/L02 1 COST EFFECTIVE, 512-BYTE ROM CMOS , counting/timing and I/O data communi- PRELIMINARY 1 Z86C02/E02/L02 Cost Effective, 512-Byte ROM , Diagram 2 PRELIMINARY DS96DZ80301 Z86C02/E02/L02 Cost Effective, 512-Byte ROM CMOS Z8 , Input In/Output In/Output DS96DZ80301 Z86C02/E02/L02 Cost Effective, 512-Byte ROM CMOS Z8 , /E02/L02 Cost Effective, 512-Byte ROM CMOS Z8® Microcontrollers Zilog ABSOLUTE MAXIMUM RATINGS |
ZiLOG Original |
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zilog z86E08 ZILOG Z86e0208psc SL1903 |
p03 transistor 3 pinAbstract: pin configuration of Z86E08 PRELIMINARY CUSTOMER PROCUREMENT SPECIFICATION 1 Z86C02/E02/L02 1 LOW-COST, 512-BYTE , Low-Cost, 512-Byte ROM Microcontrollers GENERAL DESCRIPTION (Continued) cations. Additionally, two , Diagram 1-2 PRELIMINARY DS96DZ80301 (11/96) Z86C02/E02/L02 Low-Cost, 512-Byte ROM , Input In/Output In/Output DS96DZ80301 (11/96) Z86C02/E02/L02 Low-Cost, 512-Byte ROM , 1-4 1 Z86C02/E02/L02 Low-Cost, 512-Byte ROM Microcontrollers ABSOLUTE MAXIMUM RATINGS |
ZiLOG Original |
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p03 transistor 3 pin pin configuration of Z86E08 SL-190 512-B Z86E0208PSC Z86L0208PSC Z86C0208PSC Z86E0208PSC1903 Z86E0208SSC |
z86e0208pscAbstract: Z86C02 PRELIMINARY PRODUCT SPECIFICATION 1 Z86C02/E02/L02 1 COST EFFECTIVE, 512-BYTE ROM CMOS , counting/timing and I/O data communi- PRELIMINARY 1 Z86C02/E02/L02 Cost Effective, 512-Byte ROM , Diagram 2 PRELIMINARY DS96DZ80301 Z86C02/E02/L02 Cost Effective, 512-Byte ROM CMOS Z8 , Input In/Output In/Output DS96DZ80301 Z86C02/E02/L02 Cost Effective, 512-Byte ROM CMOS Z8 , /E02/L02 Cost Effective, 512-Byte ROM CMOS Z8® Microcontrollers Zilog ABSOLUTE MAXIMUM RATINGS |
ZiLOG Original |
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z86e0208pscAbstract: P2M9 PRELIMINARY CUSTOMER PROCUREMENT SPECIFICATION 1 Z86C02/E02/L02 1 LOW-COST, 512-BYTE , such as counting/timing and I/O data communi- PRELIMINARY 1-1 Z86C02/E02/L02 Low-Cost, 512-Byte , PRELIMINARY DS96DZ80301 (11/96) Z86C02/E02/L02 Low-Cost, 512-Byte ROM Microcontrollers GENERAL , /Output DS96DZ80301 (11/96) Z86C02/E02/L02 Low-Cost, 512-Byte ROM Microcontrollers D4 1 18 , Low-Cost, 512-Byte ROM Microcontrollers ABSOLUTE MAXIMUM RATINGS Parameter Ambient Temperature under |
ZiLOG Original |
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P2M9 P33OE 3F CAPACITOR 5.5v dc Z86L0208SSC Z86C0208SSC Z86E0208SSC1903 Z86E0208PEC Z86L0208PEC Z86C0208PEC |
rc oscillatorAbstract: Comparators Counter/Timers 1 Counter/Timer P0 1K ROM/OTP 128 RAM Description C02 = 512-Byte ROM/64 RAM L02 = 512-Byte ROM/64 RAM (2-3.9V) E02 = 512-Byte OTP /64 RAM C03 = 512-Byte ROM/128 RAM C06 = 1K ROM/128 RAM E03= 512-Byte OTP/128 RAM E06=1K OTP/128 RAM C04 = 1K ROM/128 RAM L04 = 1K |
ZiLOG Original |
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rc oscillator Comparators Z86E08/C08/L08 Z86E04/C04/L04 Z86E03/E06/C03/C06 Z86E02/C02/L02 ROM/128K C06/E06 |
serial flash memory ic 2gb formatAbstract: CFG8B12MKABCSFAA . Equipped with 8bit/512Byte, 15bit/512Byte ECC (BCH). 42.8±0.1 0.5±0.15 Dimensions in mm , . Equipped with 8bit/512Byte, 15bit/512Byte ECC (BCH). 5. TDK Global Static ware leveling function (TDK Smart , with 8bit/512Byte, 15bit/512Byte ECC (BCH). 5. TDK Global Static ware leveling function (TDK Smart Swap , 1: 1.5Gbps / Gen2: 3.0Gbps). 4. Equipped with 8bit, 15bit/512Byte, 30bit, 44bit/1KByte ECC (BCH). 5 , : 1.5Gbps Gen2: 3.0Gbps 95MB/s 40MB/s 8bit/512Byte, 15bit/512Byte 15G 1,500G 0 to +70° C[40 to +85° C |
TDK Original |
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serial flash memory ic 2gb format CFG8B12MKABCSFAA TDK GBDriver RA3 controller TDK GBDriver RS2 CFG8B CFG8B08G 55MB/ 30MB/ AES128 I-BO001E-A |
DF703Abstract: NEC 78k0R FG3 RRM RRM *1 256Byte ID78K0-QB V3.0 ROM RRM RRM 512Byte 256Byte 256Byte , 512Byte 256Byte 256Byte 78K0/Fx2 384Byte 640Byte 384Byte 512Byte 78K0/Lx2 256Byte 512Byte 256Byte 256Byte 78K0/Kx1+ 256Byte 512Byte 256Byte 256Byte PD78F0711 PD78F0712 PD78F0714 256Byte 512Byte 256Byte 384Byte PD78F0730 256Byte 512Byte 256Byte 256Byte PD179F11x 256Byte 512Byte 256Byte 256Byte PD179F12x |
NEC Original |
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PD179F11 DF703 NEC 78k0R FG3 ID850QB RRM16 v850 fg3 ZUD-CD-09-0151 78K0S 78K0R 78K0/K 78K0/I 78K0/L |
MIPS 32-bit bus architectureAbstract: cache architecture for MIPS 1 - 9.4 MIPS* Sustained Execution at 25 MHz 512-Byte On-Chip Instruction Cache - Direct Mapped - , 512-byte instruction cache and a built-in interrupt controller. The 80960KA has a large register set , -BIT INSTRUCTION EXECUTION UNIT Tf 32-BIT BUS CONTROL LOGIC INSTRUCTION FETCH UNIT 512-BYTE INSTRUCTION |
- OCR Scan |
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MIPS 32-bit bus architecture cache architecture for MIPS 1 132-L 80960KB VAX-11/780 VAX-11TM |
Static Random Access Memory SRAMAbstract: F848 feature, the 512-byte arrays can be used as additional SRAM. A register map showing the SRAM and overlay , high order address lines (IADDR[31:N] N=13 and 9 for 8K and 512-byte arrays) are compared with the , that SRAM data may be located and is always on a 8K or 512-byte boundary. The SRAM array top is on a , SRAM Array Addressing The BIU of the SRAM module compares IADDR[31:N] (N = 13 for 8K and 9 for 512byte , Operation The four 512-byte SRAM blocks can be used independently of the main 8K SRAM array. The blocks |
Motorola Original |
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MC68F375 Static Random Access Memory SRAM F848 F85A F844 F84A F852 |
ATtiny84Abstract: ATMEL Tape and Reel product requirement , Internal Calibrated Oscillator SOIC8 ATtiny85 AVR Microcontroller with 8-Kbyte Flash MCU, 512-byte RAM, 512-byte EEPROM, 10-bit ADC, up to 16 MIPS, LIN-capable USI, Internal Calibrated Oscillator , , 512-byte RAM, 512-byte EEPROM, 10-bit ADC, up to 16 MIPS, LIN-capable USI, Internal Calibrated Oscillator SOIC14, QFN28 ATtiny167 AVR Microcontroller with 16-Kbyte Flash MCU, 512-byte RAM, 512-byte , MCU, 512-byte RAM, 256-byte EEPROM, 10-bit ADC, up to 16 MIPS, LIN-capable UART, Internal Calibrated |
Atmel Original |
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ATtiny84 ATMEL Tape and Reel product requirement transistors cross reference ATA6612 c code for bldc motor control using avr ATA6662 ATA6622/23/24/25/26 ATA6612/13 ATA6823/33/34 ATA6862/33/34 AEC-Q100 |
VAX-11Abstract: MIPS embedded * Sustained Execution at 25 MHz 512-Byte On-Chip Instruction Cache - Direct Mapped - Parallel Load/Decode , -bit processor family, which is designed especially for embedded applications. It Includes a 512-byte instruction , printers, I/O control and specialty instrumentation. rru T - INSTRUCTION FETCH UNIT 512-BYTE |
- OCR Scan |
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VAX-11 MIPS embedded RRU 32 |
89lpc932Abstract: 89lpc932 eeprom 8 KB 3 V low-power Flash with 512-byte data EEPROM 2002 Nov 22 User's Manual - - Subject to , two-clock instructions two-cycle core P89LPC932 8 KB 3 V low-power Flash with 512-byte data EEPROM , P89LPC932 8 KB 3 V low-power Flash with 512-byte data EEPROM 8KB Flash with 512 Byte Data EEPROM and 768 , instructions two-cycle core P89LPC932 8 KB 3 V low-power Flash with 512-byte data EEPROM 8KB Flash with , two-cycle core P89LPC932 8 KB 3 V low-power Flash with 512-byte data EEPROM 8KB Flash with 512 Byte |
Philips Semiconductors Original |
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80C51 89lpc932 89lpc932 eeprom TCR202 ic str 6554 a LPC932 |
F844Abstract: Static Random Access Memory SRAM additional feature, the 512-byte arrays can be used as additional SRAM. A register map showing the SRAM and , high order address lines (IADDR[31:N] N=13 and nine for 8-Kbyte and 512-byte arrays) are compared with , address that SRAM data may be located and is always on an 8-Kbyte or 512-byte boundary. The SRAM array , for 512-byte arrays) of the IMB3 with the value of the array base address registers. If they match , below its specified value when the SRAM module is in stop mode. 12.4.5 Overlay Operation The four 512-byte |
Motorola Original |
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MC68377 F840 power transistor array memory sram |
| Abstract: 80960SB EMBEDDED 32-BIT MICROPROCESSOR WITH 16-BIT BURST DATA BUS High-Performance Embedded Architecture - 16 MIPS* Burst Execution at 16 MHz - 5 MIPS Sustained Execution at 16 MHz 512-Byte On-Chip Instruction Cache - Direct Mapped - Parallel Load/Decode for Uncached Instructions Multiple Register Sets , applications. It Includes a 512-byte instruction cache, an integrated floating-point unit and a built-in , lo INSTRUCTION FETCH UNIT 512-BYTE INSTRUCTIOI CACHE INSTRUCTION DECODER MICRO INSTRUCTION SEQUENCER |
- OCR Scan |
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80960SA 80960KA/KB/CA/C |
ST7265Abstract: ST72651 USB bulk packets and 512-byte blocks TQFP64 10x10 TQFP64 14x14 I I I I I I , transceivers. A dedicated 24 MHz Data Buffer Manager state machine for handling 512-byte data blocks , TRANSFER DATA TRANSFER BUFFER ST7 CORE BUFFER ACCESS ARBITRATION 512-byte RAM Buffer 512-byte , in Play Mode DATA TRANSFER BUFFER 512-byte RAM Buffer 512-byte RAM Buffer BUFFER ACCESS |
STMicroelectronics Original |
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ST7265 ST72651 ST72652 ST72F651 ST72F652 |
QFN65Abstract: toggle ic memory, 512-Byte SRAM and EEPROM Customer Requirements 40°C; +85°C www.atmel.com , SOIC8 ATtiny85 AVR Microcontroller with 8-Kbyte Flash MCU, 512-byte RAM, 512-byte EEPROM, 10 , SOIC14, QFN28 ATtiny84 AVR Microcontroller with 8-Kbyte Flash MCU, 512-byte RAM, 512-byte EEPROM , ATtiny167 AVR Microcontroller with 16-Kbyte Flash MCU, 512-byte RAM, 512-byte EEPROM, 10-bit ADC, up to , ® Part Number Description Package ATmega48 AVR Microcontroller with 4-Kbyte Flash MCU, 512-byte |
Atmel Original |
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QFN65 toggle ic UHF analog AM Transceiver IC TPMS transceiver ATR4262 U642B |
P89LPC932BAAbstract: 80C51 KB 3 V low-power Flash with 512-byte data EEPROM Preliminary data 2002 Oct 21 Preliminary , with 512-byte data EEPROM GENERAL DESCRIPTION The P89LPC932 is a single-chip microcontroller , -byte erasable page size. · 256-byte RAM data memory. 512-byte auxiliary on-chip RAM. · 512-byte customer Data , 512-byte data EEPROM · In-Application Programming of the Flash code memory. This allows changing the , low-power Flash with 512-byte data EEPROM BLOCK DIAGRAM High Performance LPC932 CPU 8KB Code Flash |
Philips Semiconductors Original |
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P89LPC932BA P89LPC932BDH PLCC28 TSSOP28 |
usb to parallel portAbstract: ST7265 packets and 512-byte blocks PLL for generating 48 MHz USB clock using a 12 MHz crystal DTC (Data , dedicated 24 MHz Data Buffer Manager state machine for handling 512-byte data blocks (this size , BUFFER ST7 CORE BUFFER ACCESS ARBITRATION 512-byte RAM Buffer 512-byte RAM Buffer DATA , BUFFER 512-byte RAM Buffer 512-byte RAM Buffer BUFFER ACCESS ARBITRATION ST7 CORE DATA |
STMicroelectronics Original |
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usb to parallel port |
Hitachi DSA0086Abstract: H8/3114 0.35 WDT,RNG,FMU,PLL 16 Bit Timer AE460 64 KB + 512Byte 96 KB 3 KB - 0.35 |
Hitachi Semiconductor Original |
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H8/3114 H8/3153 Hitachi DSA0086 H8/3112 H8/3151 H8/3152 H8/3155 |
Microprocessor z86Abstract: zilog z86 computer ECC Algorithm (512Byte) Flash Planning Group Memory Division Samsung Electronics Co., Ltd , 512Byte Generate ECC Parity Code(24bit) during program operation on 512byte & Write it to NAND Flash's spare area Generate New ECC Parity Code (24bit) during read main area data (512byte) Compare , 512Byte 1st byte 2nd byte 3rd byte 4th byte Bit7 Bit7 Bit7 Bit7 Bit6 Bit6 Bit6 Bit6 , Technology P2048` P2048 Parity Generation for Main Array (Row) For 512Byte 1st byte 2nd byte |
ZiLOG Original |
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Microprocessor z86 zilog z86 computer z86e5408ssc R242 R243 R246 Z86E54 PS020102-1003 |
AN82527F8Abstract: AS82527F8 PRELIMINARY PRODUCT SPECIFICATION 1 Z86C02/E02/L02 1 COST EFFECTIVE, 512-BYTE ROM CMOS , counting/timing and I/O data communi- PRELIMINARY 1 Z86C02/E02/L02 Cost Effective, 512-Byte ROM , Diagram 2 PRELIMINARY DS96DZ80301 Z86C02/E02/L02 Cost Effective, 512-Byte ROM CMOS Z8 , Input In/Output In/Output DS96DZ80301 Z86C02/E02/L02 Cost Effective, 512-Byte ROM CMOS Z8 , /E02/L02 Cost Effective, 512-Byte ROM CMOS Z8® Microcontrollers Zilog ABSOLUTE MAXIMUM RATINGS |
DigiKey Electronics Catalog Original |
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AN82527F8 AS82527F8 SB82558B S82595FX TA80960KB25 TL82543GC A80960JA3V25 A80960JA3V33 A80960JD3V33 A80960JD3V50 A80960JD3V66 A80960JF3V25 |
motorola 68020 instruction setAbstract: motorola 68020 manual PRELIMINARY CUSTOMER PROCUREMENT SPECIFICATION 1 Z86C02/E02/L02 1 LOW-COST, 512-BYTE , such as counting/timing and I/O data communi- PRELIMINARY 1-1 Z86C02/E02/L02 Low-Cost, 512-Byte , PRELIMINARY DS96DZ80301 (11/96) Z86C02/E02/L02 Low-Cost, 512-Byte ROM Microcontrollers GENERAL , /Output DS96DZ80301 (11/96) Z86C02/E02/L02 Low-Cost, 512-Byte ROM Microcontrollers D4 1 18 , Low-Cost, 512-Byte ROM Microcontrollers ABSOLUTE MAXIMUM RATINGS Parameter Ambient Temperature under |
Motorola Original |
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68LC060 MCF5267 motorola 68020 instruction set motorola 68020 manual 68EC030 motorola XCF5102 68EC030 ColdFire v5 MC680 MPC60 MC683 100MH 140MH 68020/CPU32 |
NET2272Abstract: netchip net2272 Optimized for high-level language constructs - 13.5 MIPS at 33Mhz · 512-Byte Direct-Mapped Instruction Cache · 512-Byte On-Chip SRAM - Provides one-cycle access to critical code and data · Universal , single clock. The MCF5204 processor uses a 512-byte, direct-mapped instruction cache to achieve 13.5 , SRAM The 512-byte on-chip SRAM provides one clock-cycle access for the ColdFire core. This SRAM can |
PLX Technology Original |
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NET2272 82801DB netchip net2272 NET2272PCI-RDK NetChip |
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