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50nsec

Catalog Datasheet MFG & Type PDF Document Tags
Abstract: of 50nsec prior to the transition of that input. Because the MN674A's control logic latches the Ao , example, CS should_be a "0" 50nsec prior to the CE transition (tssc=50nsec min), R/C should be a "0" 50nsec prior to the CE transition (tsRc =50nsec min), and Ao should be stable Onsec prior to the CE transition (tsAC =0nsec min). The minimum pulse width for CE="1" is 50nsec (tHEC =50nsec min) and both CS and R/C must be valid for at least 50nsec while CE="1" (tHsc and tHRC =50nsec min) to effectively -
OCR Scan
HI-674A AD674A MN574A MN574 MN674AJ MN674AK 28-PIN
Abstract: ●Reference data (BU2280FV basic data) 1.0V/div 1.0V/div 10dB/div RBW=1kHz VBW=100Hz 5.0nsec , 1.0V/div RBW=1kHz VBW=100Hz 10kHz/div 500psec/div 5.0nsec/div Fig.4 36.9MHz output , Spectrum VDD=3.3V, at CL=15pF 5.0nsec/div 10dB/div 1.0V/div 1.0V/div RBW=1kHz VBW , =1kHz VBW=100Hz 5.0nsec/div Fig.10 24.6MHz output waveform VDD=3.3V, at CL=15pF www.rohm.com  , =15pF 500psec/div Fig.17 18.4MHz Period-Jitter VDD=3.3V, at CL=15pF 5.0nsec/div Fig.19 27MHz output ROHM
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BU2360FV BU2362FV 12005EBT04
Abstract: -50 50nsec / div ESD 150pF-330 ESD 2kV ESD 6 4 2 0 -2 50nsec , 0603AV 8 8 A ESD 50nsec / div AVR-M1005C120MTAAB AVR-M1608C120MT2AB -
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AVR-M1608C080M AVR-M1608C120MB6AB AVR-M1005C270MAAB AVR-M1608C270MAAB TTL 7404 ic ttl 7404 AVR-M1608C270M ABB ic 7404 datasheet 7404 ic AVR-M1005 AVR-M1608 AVR-M1005C080M AVR-M1608C180M AVR-M1005C120M
Abstract: =15pF 1.0V/div 5.0nsec/div Fig.1 33.9MHz output waveform VDD=3.3V, at CL=15pF 1.0V/div 10kHz/div Fig.3 33.9MHz Spectrum VDD=3.3V, at CL=15pF RBW=1kHz VBW=100Hz 1.0V/div 1.0V/div 10dB/div 5.0nsec/div , 1.0V/div 10dB/div 5.0nsec/div Fig.7 22.6MHz output waveform VDD=3.3V, at CL=15pF 500psec/div , =15pF RBW=1kHz VBW=100Hz 1.0V/div 5.0nsec/div Fig.10 24.6MHz output waveform VDD=3.3V, at CL=15pF 1.0V , CL=15pF 1.0V/div 1.0V/div 5.0nsec/div Fig.19 27MHz output waveform VDD=3.3V, at CL ROHM
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pj 87 diode SSOP-B24 SSOP-B16 BU2360F R1120A
Abstract: SDR705 thru SDR720 Solid State Devices, Inc. 14701 Firestone Blvd * La Mirada, Ca 90638 Phone: (562) 404-4474 * Fax: (562) 404-1773 ssdi@ssdi-power.com * www.ssdi-power.com 70A, 50nsec, 50-200 V Ultra Fast Recovery Rectifier Designer's Data Sheet Part Number/Ordering Information SDR _ _ 1/ Screening 2/ _ = Not Screened TX = TX Level TXV = TXV Level S = S Level Family/Voltage 705 = , Fast Recovery: 50nsec Maximum Low Forward Voltage Drop High Surge Current Capability PIV to 200 Solid State Devices
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SDR710 SDR715 RU0059 SDR803R SDR806R MIL-PRF-19500
Abstract: : 100nsec to 10sec (10MHz to 0·1Hz). Jitter: , : 50nsec to 5sec Jitter: Thurlby Thandar Instruments
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TGP110 EN61010-1 EN50082-1 Frequency Generator 0.1Hz 10MHz squarewave generator Thurlby Thandar Instruments 20VA TTL/50 50/60H EN55081-1
Abstract: =15pF 1.0V/div 5.0nsec/div Fig.1 33.9MHz output waveform VDD=3.3V, at CL=15pF 1.0V/div 10kHz/div Fig.3 33.9MHz Spectrum VDD=3.3V, at CL=15pF RBW=1kHz VBW=100Hz 1.0V/div 1.0V/div 10dB/div 5.0nsec/div , 1.0V/div 10dB/div 5.0nsec/div Fig.7 22.6MHz output waveform VDD=3.3V, at CL=15pF 500psec/div , =15pF RBW=1kHz VBW=100Hz 1.0V/div 5.0nsec/div Fig.10 24.6MHz output waveform VDD=3.3V, at CL=15pF 1.0V , CL=15pF 1.0V/div 1.0V/div 5.0nsec/div Fig.19 27MHz output waveform VDD=3.3V, at CL ROHM
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Abstract: =15pF 1.0V/div 5.0nsec/div Fig.1 33.9MHz output waveform VDD=3.3V, at CL=15pF 1.0V/div 10kHz/div Fig.3 33.9MHz Spectrum VDD=3.3V, at CL=15pF RBW=1kHz VBW=100Hz 1.0V/div 1.0V/div 10dB/div 5.0nsec/div , 1.0V/div 10dB/div 5.0nsec/div Fig.7 22.6MHz output waveform VDD=3.3V, at CL=15pF 500psec/div , =15pF RBW=1kHz VBW=100Hz 1.0V/div 5.0nsec/div Fig.10 24.6MHz output waveform VDD=3.3V, at CL=15pF 1.0V , CL=15pF 1.0V/div 1.0V/div 5.0nsec/div Fig.19 27MHz output waveform VDD=3.3V, at CL ROHM
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pj 88 diode 2pin XTAL 27.0000MHZ bu228
Abstract: =15pF 1.0V/div 5.0nsec/div Fig.1 33.9MHz output waveform VDD=3.3V, at CL=15pF 1.0V/div 10kHz/div Fig.3 33.9MHz Spectrum VDD=3.3V, at CL=15pF RBW=1kHz VBW=100Hz 1.0V/div 1.0V/div 10dB/div 5.0nsec , 1.0V/div 10dB/div 5.0nsec/div Fig.7 22.6MHz output waveform VDD=3.3V, at CL=15pF 500psec/div , =15pF RBW=1kHz VBW=100Hz 1.0V/div 5.0nsec/div Fig.10 24.6MHz output waveform VDD=3.3V, at CL=15pF 1.0V , CL=15pF 1.0V/div 1.0V/div 5.0nsec/div Fig.19 27MHz output waveform VDD=3.3V, at CL ROHM
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Abstract: ) RBW=1KHz VBW=100Hz 10dB / div 1.0V / div 1.0V / div Technical Note 5.0nsec / div Fig , / div 5.0nsec / div Fig.6 36.864MHz output waveform VDD=3.3V,CL=32pF 500psec / div Fig.7 36.864MHz , Period-Jitter VDD=3.3V,CL=15pF 10KHz / div Fig.14 24.576MHz spectrum VDD=3.3V,CL=15pF 5.0nsec / div Fig , / div 10dB / div Technical Note 5.0nsec / div Fig.15 54MHz output waveform VDD=3.3V,CL , VDD=3.3V,CL=50pF 5.0nsec / div Fig.18 BUF_OUT (27MHz) output waveform VDD=3.3V,CL=50pF 10KHz ROHM
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exs00a 24.576MHZ VCXO Nihon Dempa Kogyo BU2365FV 09005EAT05 R0039A
Abstract: / div RBW=1KHz VBW=100Hz 500psec / div 5.0nsec / div Fig.3 33.8688MHz output waveform VDD , VDD=3.3V,CL=32pF 10dB / div 1.0V / div 1.0V / div RBW=1KHz VBW=100Hz 5.0nsec / div , =100Hz 5.0nsec / div Fig.12 24.576MHz output waveform VDD=3.3V,CL=15pF www.rohm.com © 2009 ROHM Co., Ltd , ●Reference data (Basic data) 10dB / div 1.0V / div 1.0V / div RBW=1KHz VBW=100Hz 5.0nsec , / div RBW=1KHz VBW=100Hz 5.0nsec / div 500psec / div 10KHz / div Fig.18 BUF_OUT (27MHz ROHM
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Abstract: =15pF 1.0V/div 5.0nsec/div Fig.1 33.9MHz output waveform VDD=3.3V, at CL=15pF 1.0V/div 10kHz/div Fig.3 33.9MHz Spectrum VDD=3.3V, at CL=15pF RBW=1kHz VBW=100Hz 1.0V/div 1.0V/div 10dB/div 5.0nsec/div , 1.0V/div 10dB/div 5.0nsec/div Fig.7 22.6MHz output waveform VDD=3.3V, at CL=15pF 500psec/div , =15pF RBW=1kHz VBW=100Hz 1.0V/div 5.0nsec/div Fig.10 24.6MHz output waveform VDD=3.3V, at CL=15pF 1.0V , CL=15pF 1.0V/div 1.0V/div 5.0nsec/div Fig.19 27MHz output waveform VDD=3.3V, at CL ROHM
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pj 71 diode pj 67 diode
Abstract: SDR705 thru SDR720 Solid State Devices, Inc. 14701 Firestone Blvd * La Mirada, Ca 90638 Phone: (562) 404-4474 * Fax: (562) 404-1773 ssdi@ssdi-power.com * www.ssdi-power.com 70A, 50nsec, 50-200 V Ultra Fast Recovery Rectifier Designerâ'™s Data Sheet Part Number/Ordering Information SDR _ _ 1/ Screening 2/ _ = Not Screened TX = TX Level TXV = TXV Level S = S Level Family/Voltage , '· Maximum Ratings 4/ Ultra Fast Recovery: 50nsec Maximum Low Forward Voltage Drop High Surge Current Solid State Devices
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RU0057B 10VDC
Abstract: 10A 200V 1.45V 10A 500V 1.45V 10A 1000V 1.55V 10A trr 50nsec 50nsec 50nsec 75nsec PIN International Rectifier
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OM9027SP1 OM9029SP1 OM9028SP1 OM9030SP1 MOSFET 1000v 30a 10A, 100v fast recovery diode diode 1000V 10a OM9027 OM9028
Abstract: is 60nsec. Minimum Setup Time Digital Data to Enable is 50nsec. Digital Data Hold Time from , '¢ Monotonicity Guaranteed Over Temperature â'¢ 50nsec Data Setup Time â'¢ 4/(Sec Settling Time â'¢ 5 Output , facilitate microprocessor interfacing. The register has a minimum setup time of 50nsec; a hold time of Onsec , Enable must go low for a minimum of 60nsec and digital input data must be valid for a minimum of 50nsec -
OCR Scan
MIL-H-38534 MIL-STD-1772
Abstract: be respon sible for starting the conversion, the other two should be stable a minimum of 50nsec prior , example, C§ should be a " 0" 50nsec prior to the CE transition (tssc=50nsec min), R/C should be a " 0 " 50nsec prior to the CE transition (tsRC =50nsec min), and Ao should be stable Onsec prior to the CE transition (tsAc =0nsec min). The minimum pulse width for CE=``1" is 50nsec (tHEC =50nsec min) and both CS and R/C must be valid for at least 50nsec while CE="1" (tHsc and tHRc =50nsec min) to effectively -
OCR Scan
MN574AK MN574AJ HI-574A AD574A
Abstract: this example CS should be a â' 0â' 50nsec prior to the CE transition (ssc = 50nsec min), R/C should be a "0 â' 50nsec prior to the CE transition (tSRC = 50nsec min), and A0 should be stable Onsec prior to the CE transition (tSAc = 0nsec min). The minimum pulse width for CE = â' 1â' is 50nsec (tnEC = 50nsec min) and both CS and R/C must be valid for at least 50nsec while CE = â' 1â' (tHsc and tHRC = 50nsec min) to effectively in­ itiate the conversion. Aâ'ž must be valid for at least -
OCR Scan
MN6231 MN6232 MNS74A OOO00000 111J0
Abstract: ) 1.0 - 3 .0 AMPERES 5 .0-6.0 AMPERES U L T R A PACKAGE SIZE tr r * A 25nsec 30nsec 50nsec 75nsec lOOnsec E 30nsec 50nsec 75nsec lOOnsec VOLTS FAST/FAST 2 I > w 0) 0) (0 4-1 £ -
OCR Scan
MB313 MB215 MB344 MB216 MC8936 1N6542 1N914F 1N5189 MB347 MX4115 MB207 MB341 MB314 1N4150 1N4150-1
Abstract: RATINGS @25°C Rectifier MOSFET PIV Vp .065Q Id 30A 100V 1.1V lo 10A 50nsec 200V 0.1Q 25A 200V 1.45V 10A 50nsec OM9029SP1 500V 0.4Q 12A 500V 1.45V 10A 50nsec OM9030SP1 1000V 3Q 4A 1000V 1.55V 10A 75nsec PART , 30pA 1.1rtlA 75 nsec OM9030SP1 Timet2) 50nsec (1) Pulse Test: Pulse Width s 300/isec -
OCR Scan
OM9Q28SP1 27SP1 OM9029 OM9030
Abstract: other two should be stable a minimum of 50nsec prior to the transition of that input. Because the , example, CS should be a â' 0â' 50nsec prior to the CE transition (tssc =50nsec min), R/C should be a "0 â' 50nsec prior to the CE transition (ts R C =50nsec min), and Ao should be stable Onsec prior to the CE transition ( t s A C =0nsec min). The minimum pulse width for CE=â' 1â' is 50nsec (tH E C =50nsec min) and both CS and R/C must be valid for at least 50nsec while CE = â' 1â' (tHSC and t HR c -
OCR Scan
Abstract: of 50nsec prior to the transition of that input. Because the MN674A's control logic latches the Ao , example, CS should_be a "0" 50nsec prior to the CE transition (tssc=50nsec min), R/C should be a "0" 50nsec prior to the CE transition (tsRc =50nsec min), and Ao should be stable Onsec prior to the CE transition (tsAC =0nsec min). The minimum pulse width for CE="1" is 50nsec (tHEC =50nsec min) and both CS and R/C must be valid for at least 50nsec while CE="1" (tHsc and tHRC =50nsec min) to effectively -
OCR Scan
CA3127 OP-07 OP-16 UJT 2n3904
Abstract: be respon sible for starting the conversion, the other two should be stable a minimum of 50nsec prior , example, C§ should be a " 0" 50nsec prior to the CE transition (tssc=50nsec min), R/C should be a " 0 " 50nsec prior to the CE transition (tsRC =50nsec min), and Ao should be stable Onsec prior to the CE transition (tsAc =0nsec min). The minimum pulse width for CE=``1" is 50nsec (tHEC =50nsec min) and both CS and R/C must be valid for at least 50nsec while CE="1" (tHsc and tHRc =50nsec min) to effectively -
OCR Scan
POWER MOSFET Rise Time 1000V NS inverter circuit 200v to 100v mosfet 400 V 10A mosfet 10a 500v OM9Q27SP1 0M9028 100-TYP
Abstract: =15pF 1.0V/div 5.0nsec/div Fig.1 33.9MHz output waveform VDD=3.3V, at CL=15pF 1.0V/div 10kHz/div Fig.3 33.9MHz Spectrum VDD=3.3V, at CL=15pF RBW=1kHz VBW=100Hz 1.0V/div 1.0V/div 10dB/div 5.0nsec/div , 1.0V/div 10dB/div 5.0nsec/div Fig.7 22.6MHz output waveform VDD=3.3V, at CL=15pF 500psec/div , =15pF RBW=1kHz VBW=100Hz 1.0V/div 5.0nsec/div Fig.10 24.6MHz output waveform VDD=3.3V, at CL=15pF 1.0V , CL=15pF 1.0V/div 1.0V/div 5.0nsec/div Fig.19 27MHz output waveform VDD=3.3V, at CL Texas Instruments
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TMS320 TMS320C51 instruction set of TMS320C5x TMS320C5x TMS320C52 TMS320C5x dsp TMS320C5 SPRA243 40-MH
Abstract: =15pF 1.0V/div 5.0nsec/div Fig.1 33.9MHz output waveform VDD=3.3V, at CL=15pF 1.0V/div 10kHz/div Fig.3 33.9MHz Spectrum VDD=3.3V, at CL=15pF RBW=1kHz VBW=100Hz 1.0V/div 1.0V/div 10dB/div 5.0nsec/div , 1.0V/div 10dB/div 5.0nsec/div Fig.7 22.6MHz output waveform VDD=3.3V, at CL=15pF 500psec/div , =15pF RBW=1kHz VBW=100Hz 1.0V/div 5.0nsec/div Fig.10 24.6MHz output waveform VDD=3.3V, at CL=15pF 1.0V , CL=15pF 1.0V/div 1.0V/div 5.0nsec/div Fig.19 27MHz output waveform VDD=3.3V, at CL -
OCR Scan
ADS774 MN574/674/774
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