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Abstract: Rev. 0.1, Oct.2010 VFX Controller ­ Optimal TRIM Size Application Note for moviNAND Rev.0.0 Optimal TRIM Size of VFX Controller Density NAND 4GB Page Size Pages / Block Super Page Size Super Block Size TRIM Size 32nm 16Gb 16KB 2MB 128KB 128KB 32nm 16Gb 16KB 4MB 256KB 256KB 27nm 32Gb 32KB 4MB 256KB 256KB 8GB 8KB 128 Pages 16GB 27nm 32Gb 32KB 4MB 256KB 256KB 32GB 27nm 32Gb 32KB 4MB 256KB 256KB 64GB 27nm 32Gb 32KB 8MB 512KB 512KB ... Original
datasheet

2 pages,
280.57 Kb

on 8gb transistor movinand datasheet MOVINAND 8GB 32nm 32KB 32GB moviNAND datasheet abstract
datasheet frame
Abstract: 2 eye 2010 2 Volume 210 CONTENTS 32nmNAND SSD 2 125SO8 125SO8 :TLP2418/TLP2404/TLP2451 TLP2418/TLP2404/TLP2451 3 32nm 0.7V1/10000 7V1/10000 LSISRAM 4 NEW PRODUCTS 1 32nmNANDSSD 32nm NANDSSD (Solid State Drive) HG 3mm PCSG PC 2.51.8 HG 2 , : 4:NC 5:GND 6:VO() 7:NC 8:VCC 3 32nm 0.7V1/10000 7V1/10000 LSISRAM LSI SRAM , SRAM 2 SRAM 32nm 30%0.7V SRAM 1/10000 ... Original
datasheet

4 pages,
421.03 Kb

TLP2451 TLP2418 TLP2404 128GB 256GB datasheet abstract
datasheet frame
Abstract: 3232 32nm NAND 32nm1 232 4 43nm NAND NAND USB 16 2 32 2 20097 32nm NAND 2 16 20093 43nm 32 NAND 1012 8 32 32nm 32 ... Original
datasheet

4 pages,
396.35 Kb

TPCP8202 LQFP100 QFP100 TMPM370FYFG TPC8027 cortex cpu TPCA*8025 tpca8025 TPCP8004 TPCP8006 MOSFET dual SOP-8 TPC8028 datasheet abstract
datasheet frame
Abstract: 3232 32nm NAND 32nm1 232 4 43nm NAND NAND USB 16 2 32 2 20097 32nm NAND 2 16 20093 43nm 32 NAND 1012 8 32 32nm 32 ... Original
datasheet

4 pages,
416.87 Kb

TPCP8202 TPCP8006 TPCP8004 TMPM370FYFG QFP100 LQFP100 TPC8028 datasheet abstract
datasheet frame
Abstract: 64 HD8.3 SD19.2 322.5 5 3 32nmNAND 64 30 32nm 32 16 1 , 1 eye 2010 1 Volume 209 CONTENTS 17 64 NAND 2 TLP173A TLP173A 3 NEW PRODUCTS 1 117 264 NAND 64 1JEDEC/MMCA Ver. 4.4 NAND NAND 20101 64 JEDEC 32nm 32 NAND 16 2 64 2 30 NAND 16 117 NAND ... Original
datasheet

4 pages,
393.26 Kb

20101Q 20102Q eMMC MMC 4 169ball mmca THGBM2 THGBM2G thgbm2g9dbfbai2 THGBM2G6D THGBM2G8D8FBAIB THGBM THGBM2G6D2FBAI9 THGBM2G7D4FBAI9 datasheet abstract
datasheet frame
Abstract: / 32 32nm 4 /43nm 1 64 2 /4 2 3 /8 3 , 32nm 32 3 / 8 NAND 3 4 / 7.8 / 32nm 32 2009 ISSCC 210 1 nm: -9m 10 2 ... Original
datasheet

4 pages,
354.91 Kb

TLP3203 TLP3100 TLP3219 30W01-D datasheet abstract
datasheet frame
Abstract: NAND 3 / 32 32nm 4 /43nm 1 64 2 /4 2 3 /8 3 , 3 4 / 7.8 / 32nm 32 2009 ISSCC 210 32nm 32 3 / 8 NAND eye 1 nm: -9m 10 2 ... Original
datasheet

4 pages,
377.22 Kb

TLP3203 TLP3100 datasheet abstract
datasheet frame
Abstract: 20063 VOLUME 164 CONTENTS INFORMATION IBM .2 PIN (rs ).2 CMOS (VCX ) .3 .4 March INFORMATION IBM IBM ( IBM) ()( ) 5 32nm IBM 3 IBM300mm 3 IBM 5 Cell *SOI( )= 90 65nm SOI* 1 PIN(rs ... Original
datasheet

4 pages,
362.93 Kb

VQON16 TC74VCXR2245FTG TC74VCX541FTG TC74VCX2541FTG TC74VCX245FTG JDP2S08SC JDP2S05SC datasheet abstract
datasheet frame
Abstract: H26M68001ANR H26M54001BKR H26M42001EFR ) Mono 3.3v/X8 VLGA Now H27UBG8T2A H27UBG8T2A 32nm 32Gb 2MB(8KB Page ... Original
datasheet

27 pages,
1020.03 Kb

hy5du281622ftp-j H27UBG8T2A H5MS1G62AFR-J3M H5MS1G62 H5TQ2G63BFR-11C H5MS2G22MFR HY27US08121B h27u1g8f2b H5RS1H23MFR H5MS1G62MFP-J3M H5MS2G22MFR-J3M H5MS2G62MFR H5TQ1G63BFR-H9C datasheet abstract
datasheet frame
Abstract: following conditions for use. (1) Maximum screw terminal tightening torque; 3.2N·m or less. (2) Maximum ... Original
datasheet

2 pages,
109.84 Kb

450WV datasheet abstract
datasheet frame
Abstract: Renesas Technology Develops Promising Technology for Implementing On-Chip SOI SRAM of 32-Nanometer Generation and Beyond Technology for improving operation margins by means of individual control of transistor substrate (body) potential Tokyo, June 12, 2007 Renesas Technology Corp. today announced the development of a technology that is effective in implementing SRAM in processes of the 32 nm (nanometer) generation and beyond, for on-chip SRAM incorporated in a microprocessor or SoC (sy ... Original
datasheet

3 pages,
14.15 Kb

datasheet abstract
datasheet frame
Abstract: KOUHI KT0603IJC KT0603IJC ANODE MARX 1.5 2 4 2 PCB 0.8 0.3 4 2.6 1.20 1.6 1 3 1.50 0.8 1 3 0.5 0.9 RECOMMEND PAD LAYOUT RESIN 0.35 NOTES: 1.All dimensions are in millimeters(inches); 2.Tolerances are +/- 0.1mm(0.004inch)unless otherwise noted. ABSOLUTE MAXIMUMRATINGS(TA=25) PARAMETER VALUE SYMBOL Y G 75 81 UNIT POWER DISSIPATION Pd mW FORWARD CURRENT If 30 mA REVERSE VOLTAGE Vr 5 OPERATIN ... Original
datasheet

1 pages,
224.71 Kb

KT0603IJC KT0603IJC abstract
datasheet frame
Abstract: LED lamp ELD-465-523-2 ELD-465-523-2 Color Type Technology Case Blue ELD-465-523-2 ELD-465-523-2 lnGaN/AI203 5 mm plastic lens Maximum Ratings T3frb = 25°C, unless otherwise specified Parameter Test conditions Symbol Value Unit Forward current (DC) If 30 mA Peak forward current (tp < 50 jjs, tp/T = 1/2) Ifm 100 mA Reverse voltage lR=10 uA vR . 5 V Power dissipation Pd 120 mW Operating temperature range -40 to +85 °C Storage temperature range Tstg -40 to+100 °C Mass m 0.33 g Optical and Electrical Charac ... OCR Scan
datasheet

1 pages,
132.97 Kb

AI203 ELD-465-523-2 ELD-465-523-2 abstract
datasheet frame
Abstract: use. 1 3.2N m Maximum screw terminal tightening torque; 3.2Nm or less. 2 M5 60Arms ... Original
datasheet

2 pages,
98.19 Kb

450WV datasheet abstract
datasheet frame
Abstract: Iwl I ^^ DESCRIPTION MI51TA-2 MI51TA-2 & MI51TA-3 MI51TA-3 is GaAlAs infrared emitting diode molded in T-l 3/4 standard 5mm diameter clear transparent lens. MI51TA-2 MI51TA-2 MI51TA-3 MI51TA-3 100mA 100mA 1A* 1A* 5V 5V 200mW 230mW -25 to +85°C 260°C for 5 sec. * Pulse Width = 10/xs, Duty Ratio = 0.01. 04.98 1.3 "(0.05) 0.64lna, (0.025) °'6Z _ V ' (0.024p (0.024) 1.5(0.06) îathode -2.54(0.1) • All Dimension in mm (inch) • No Scale • Toi. : + / - 0.3mm ABSOLUTE MAXIMUM RATING (Ta=25°C) Forward Current (Continuo ... OCR Scan
datasheet

1 pages,
48.42 Kb

MI51TA-3 MI51TA-2 MI51TA-2 abstract
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Extended Electronics Archive (Experimental)

Abstract Saved from Date Saved File Size Type Download
Over 1.1 million files (1986-2013): html articles, reference designs, gerber files, chemical content, spice models, programs, code, pricing, images, circuits, parametric data, RoHS data, cross references, pcns, military data, and more. Please note that due to their age, these files do not always format correctly in modern browsers. Disclaimer.
 
=0.32 nm No LW T673-Q2R2-1 T673-Q2R2-1 T673-Q2R2-1 T673-Q2R2-1 SMT white 20 mA 140 . 280 mcd Single TOPLED colored diffused taped on reel N hyper-bright (InGaN) 120 Grad x=0.30, y=0.32 nm No LW T673-R1 T673-R1 T673-R1 T673-R1 SMT white 20 mA 112 . 140 mcd Single TOPLED colored diffused taped on reel N hyper-bright (InGaN) 120 Grad x=0.30, y=0.32 nm No LW T GaN) 120 Grad x=0.30, y=0.32 nm No LW T673-R2S2-1 T673-R2S2-1 T673-R2S2-1 T673-R2S2-1 SMT white 20 mA 140 . 280 mcd Single TOPLED colored diffused taped on reel N hyper-bright (InGaN) 120 Grad x=0.30, y=0.32 nm No LW T673-S1 T673-S1 T673-S1 T673-S1 SMT white 20 m
www.datasheetarchive.com/files/infineon/wwwinf~1.com/produc~1/para~661.htm
Infineon 19/10/2000 62.22 Kb HTM para~661.htm
=0.32 nm No LW A673-Q2R2-1 A673-Q2R2-1 A673-Q2R2-1 A673-Q2R2-1 SMT white 20 mA 90 . 180 mcd Single SIDELED colored diffused taped on reel N hyper-bright (InGaN) 120 Grad x=0.30, y=0.32 nm No LW A673-R1 A673-R1 A673-R1 A673-R1 SMT white 20 mA 112 . 140 mcd Single SIDELED colored diffused taped on reel N hyper-bright (InGaN) 120 Grad x=0.30, y=0.32 nm No LW -bright (InGaN) 120 Grad x=0.30, y=0.32 nm No LW A673-R2S2-1 A673-R2S2-1 A673-R2S2-1 A673-R2S2-1 SMT white 20 mA 140 . 280 mcd Single SIDELED colored diffused taped on reel N hyper-bright (InGaN) 120 Grad x=0.30, y=0.32 nm No LW A673-S1 A673-S1 A673-S1 A673-S1 SMT
www.datasheetarchive.com/files/infineon/wwwinf~1.com/produc~1/para~656.htm
Infineon 19/10/2000 34.72 Kb HTM para~656.htm
)/u-boot.bin $(TOPDIR)/tools/mkimage -A ppc -O u-boot -T standalone -C none -a $(LOAD_ADDR) \ -e `ppc-elf32-nm updater _ADDR) \ -e `ppc-elf32-nm updater | grep _main | cut -bytes=0-8` \ -n "Firmware Updater" -d /tmp
www.datasheetarchive.com/download/49104857-995987ZC/xapp542.zip (Makefile)
Xilinx 11/11/2004 9180.01 Kb ZIP xapp542.zip
.8 kg AM227M-wxy0 0.32 Nm 0.8 A - 4000 min -1 0.08 kg cm² 1.1 kg AM227M-wxy1 0.32 Nm 0.8 A AM297S-wxy0 32 Nm 20 A - 3000 min -1 104 kg cm² 32.5 kg AM297S-wxy1 32 Nm 20 A - 3000 min -1
www.datasheetarchive.com/files/beckhoff/catalog/english/drive_technology/am2xxx.htm
Beckhoff 10/11/2009 26.67 Kb HTM am2xxx.htm
AM227M-wxy0 0,32 Nm 0,8 A - 4000 min -1 0,08 kg cm² 1,1 kg AM227M-wxy1 0,32 Nm 0,8 A - 4000 min -1 AM297S-wxy0 32 Nm 20 A - 3000 min -1 104 kg cm² 32,5 kg AM297S-wxy1 32 Nm 20 A - 3000 min -1
www.datasheetarchive.com/files/beckhoff/catalog/german/drive_technology/am2xxx.htm
Beckhoff 10/11/2009 27.01 Kb HTM am2xxx.htm
-+LP070-M01-x-11y max. 16 Nm max. 32 Nm ≤ 12/8 arcmin AM237x/AM247x max. 32 Nm ≤ 15/10 arcmin AM237x/AM247x AM302x/AM303x/ AM3x4x
www.datasheetarchive.com/files/beckhoff/catalog/english/drive_technology/ag2200.htm
Beckhoff 10/11/2009 7.86 Kb HTM ag2200.htm
/AM302x AG2200- AG2200- AG2200- AG2200-+LP070-M01-x-11y max. 16 Nm max. 32 Nm ≤ 12 -M02-x-11y max. 16 Nm max. 32 Nm ≤ 15/10 arcmin AM237x/AM247x
www.datasheetarchive.com/files/beckhoff/catalog/german/drive_technology/ag2200.htm
Beckhoff 10/11/2009 8.14 Kb HTM ag2200.htm
MOS Scaling: Transistor Challenges for the 21st Century MOS Scaling: Transistor Challenges for the 21st Century (continued) Page 3 of 10 Oxide Scaling Gate oxide thickness scaling has been instrumental in controlling short channel effects as MOS gate dimensions have been reduced from 10 um to 0.1 um. Gate oxide thickness must be approximately linearly scaled with channel length to maintain the same amo
www.datasheetarchive.com/files/intel/techno~1/itj/q31998/articles/art_3c.htm
Intel 31/10/1998 12.31 Kb HTM art_3c.htm
MOS Scaling: Transistor Challenges for the 21st Century MOS Scaling: Transistor Challenges for the 21st Century (continued) Page 3 of 10 Oxide Scaling Gate oxide thickness scaling has been instrumental in controlling short channel effects as MOS gate dimensions have been reduced from 10 um to 0.1 um. Gate oxide thickness must be approximately linearly scaled with channel length to maintain the same amo
www.datasheetarchive.com/files/intel/techno~1/itj/q31998/articles/art_3c-v1.htm
Intel 02/02/1999 12.31 Kb HTM art_3c-v1.htm
MOS Scaling: Transistor Challenges for the 21st Century MOS Scaling: Transistor Challenges for the 21st Century (continued) Page 3 of 10 Oxide Scaling Gate oxide thickness scaling has been instrumental in controlling short channel effects as MOS gate dimensions have been reduced from 10 um to 0.1 um. Gate oxide thickness must be approximately linearly scaled with channel length to maintain the same amount of gate control over the channel
www.datasheetarchive.com/files/intel/technologies/itj/q31998/articles/art_3c-v1.htm