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3/GL850G Design Guideline

Catalog Datasheet MFG & Type PDF Document Tags

GL850G Design Guideline

Abstract: GL850G the ground plane. For detailed information, please refer to GL850G Design Guideline. Notation , rights reserved. Page 3 GL850G USB 2.0 Low-Power HUB Controller LIST OF FIGURES FIGURE 3.1ï¼GL850G , Logic Inc. - All rights reserved. Page 7 GL850G USB 2.0 Low-Power HUB Controller CHAPTER 3 , V5 47 14 X1 V33 48 13 AGND GL850G 1 2 3 4 5 6 7 8 , GL850G I/O Type Description 48Pin# DM0,DP0 3,4 B USB signals for USPORT DM1,DP1
Genesys Logic
Original
GL850G Design Guideline 3/GL850G Design Guideline GL852 GL850G-MNNXX GL850G-MNGXX

GL850G Design Guideline

Abstract: 3/GL850G Design Guideline the ground plane. For detailed information, please refer to GL850G Design Guideline. Notation , All rights reserved. Page 3 GL850G USB 2.0 Low-Power HUB Controller TABLE OF CONTENTS , Logic Inc. - All rights reserved. Page 8 GL850G USB 2.0 Low-Power HUB Controller CHAPTER 3 , V5 47 14 X1 V33 48 13 AGND GL850G 1 2 3 4 5 6 7 8 , GL850G I/O Type Description 48Pin# DM0,DP0 3,4 B USB signals for USPORT DM1,DP1
Genesys Logic
Original

GL850G application circuit

Abstract: GL850G Design Guideline detailed information, please refer to GL850G Design Guideline. HUB Interface GL850G Pin Name LQFP , , please refer to GL850G Design Guideline. Notation: Type O I I_5V B B/I B/O Output Input 5V , cutting edge technology on cost and power efficient serial interface design. GL850G has proven , worldwide. GL850G provide multiple advantages to simplify board level design that help achieve lowest BOM , All rights reserved. Page 9 GL850G USB 2.0 Low-Power HUB Controller CHAPTER 3 PIN ASSIGNMENT
Genesys Logic
Original
GL850G-HHNXX GL850G application circuit GL850G 31 GL850G-HHGXX GL850G-HONXX GL850G-HOGXX

GL850G

Abstract: GL850G-HHNXX carefully handled in PCB routing. For detailed information, please refer to GL850G Design Guideline. HUB , the ground plane. For detailed information, please refer to GL850G Design Guideline. Notation , Description ©2000-2008 Genesys Logic Inc. - All rights reserved. Page 3 GL850G USB 2.0 Low-Power HUB , Logicâ'™s cutting edge technology on cost and power efficient serial interface design. GL850G has proven , worldwide. GL850G provide multiple advantages to simplify board level design that help achieve lowest BOM
Genesys Logic
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gl850g-HHG GL850G 28 Pin

rom 93c46

Abstract: the ground plane. For detailed information, please refer to GL850G Design Guideline. Notation , .23 ©2000-2006 Genesys Logic Inc. - All rights reserved. Page 3 GL850G USB 2.0 Low-Power HUB , Logic Inc. - All rights reserved. Page 8 GL850G USB 2.0 Low-Power HUB Controller CHAPTER 3 , V5 47 14 X1 V33 48 13 AGND GL850G 1 2 3 4 5 6 7 8 , GL850G I/O Type Description 48Pin# DM0,DP0 3,4 B USB signals for USPORT DM1,DP1
Genesys Logic
Original
rom 93c46

GL850G Design Guideline

Abstract: GL850G detailed information, please refer to GL850G Design Guideline. ©2000-2007 Genesys Logic Inc. - All , , please refer to GL850G Design Guideline. Notation: Type O I I_5V B B/I B/O P A SO pu pd , Logic Inc. - All rights reserved. Page 8 GL850G USB 2.0 Low-Power HUB Controller CHAPTER 3 PIN , V5 47 14 X1 V33 48 13 AGND GL850G 3 4 5 6 7 8 9 10 , Pin Descriptions USB Interface Pin Name GL850G I/O Type Description 48Pin# DM0,DP0 3
Genesys Logic
Original

GL850G

Abstract: GL850G Design Guideline , please refer to GL850G Design Guideline. ©2000-2007 Genesys Logic Inc. - All rights reserved. Page , the ground plane. For detailed information, please refer to GL850G Design Guideline. Notation , .23 ©2000-2007 Genesys Logic Inc. - All rights reserved. Page 3 GL850G USB 2.0 Low-Power HUB Controller , 15 X2 V5 47 14 X1 V33 48 13 AGND GL850G 3 4 5 6 7 8 , Descriptions USB Interface Pin Name GL850G I/O Type Description 48Pin# DM0,DP0 3,4 B
Genesys Logic
Original
genesys logic GL852 Hub Controller genesys logic hub GL850 motherboard schematics Genesys Logic USB Repeater Circuit

GL850G Design Guideline

Abstract: GL850G application circuit detailed information, please refer to GL850G Design Guideline. Notation: Type O I I_5V Output , Inc. - All rights reserved. Page 3 GL850G USB 2.0 HUB Controller TABLE OF CONTENTS CHAPTER 1 , cutting edge technology on cost and power efficient serial interface design. GL850G has proven , worldwide. GL850G provides multiple advantages to simplify board level design that help achieve lowest BOM , . Page 9 GL850G USB 2.0 HUB Controller CHAPTER 3 PIN ASSIGNMENT 3.1 Pinouts PSELF 37 24
Genesys Logic
Original
GL850G-OHGXX

GL850G application circuit

Abstract: GL850G Design Guideline information, please refer to GL852 Design Guideline. HUB Interface GL852 Pin Name I/O Type , detailed information, please refer to GL852 Design Guideline. Notation: Type O I B B/I B/O P A , . Office: Genesys Logic, Inc. 12F, No. 205, Sec. 3, Beishin Rd., Shindian City, Taipei, Taiwan Tel , Description, table3.3, p.12 1.02 09/15/2005 Modify HUB Interface ,table3.3 Pin Description, p , Characteristics, Ch6, p.26~27 ©2000-2009 Genesys Logic Inc. - All rights reserved. Page 3 GL852 USB 2.0
Genesys Logic
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GL852-MSNXX GL852-MNNXX GL852-MSGXX GL852-MNGXX GL852-ONGXX GL852-HONXX

EMC design

Abstract: EMC for PCB Layout . . . . . . . . . . . . . . . . . .25 Application Note 3 1999-07 EMC DESIGN GUIDELINE Application Note 4 1999-07 EMC DESIGN GUIDELINE How to use this Guideline 1 How to use this , AP 2426 www.infineon.com EMC Design Guideline Microcontrollers EMC Design Guideline for Microcontroller Board Layout Application Note 1999-07 Version 01 EMC Design Guideline , other persons may be endangered. EMC DESIGN GUIDELINE Table of Contents Page 1 How To
Infineon Technologies
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0-7803-4703-X EMC design EMC for PCB Layout EMC PCB Layout EMC Design Guideline for Microcontroller Board capacitor 2D D-81541

Speaker 8ohm 0.5w

Abstract: GPC11501C Technology Inc. PAGE 2 APR. 21, 2008 AN0043 GPC11501C(OTP) Design Guideline APR. 21, 2008 3 , AN0043 GPC11501C(OTP) Design Guideline APR. 21, 2008 GPC11501C(OTP) Design Guideline Mask ROM , . PAGE 1 APR. 21, 2008 AN0043 GPC11501C(OTP) Design Guideline APR. 21, 2008 VDD=3V GPC11512C , , 2008 AN0043 GPC11501C(OTP) Design Guideline APR. 21, 2008 3.2 Mask ROM Version PAD Assignment , GPC11501C(OTP) Design Guideline APR. 21, 2008 4 Application Circuit Most application circuits used in
Generalplus Technology
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GPC11384C GPC11288C GPC11256C GPC11224C GPC11192C GPC11160C Speaker 8ohm 0.5w Speaker 8Ohm wavetable synthesizer gpc11512 760Kohm GPC11448C

fcbga package weight

Abstract: Thermagon .24 Thermal Design Guideline 3 Contents Tables 1 2 3 4 5 6 Micro-FCBGA , Thermal Design Guideline for Intel Processors in the BGA2 and Micro FC-BGA Packages for Embedded , Thermal Design Guideline Contents Contents 1.0 Introduction , . 6 2.0 Design Guideline , document. Thermal Design Guideline BGA2 and Micro FC-BGA Packages for Embedded Applications 1.0
Intel
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fcbga package weight Thermagon PBGA-B495 shinetsu fcBGA PACKAGE thermal resistance Thermagon t pad EID-LPT-ALX-001 EID-LPT-ALX-001B EID-LPT-ALX-002 EID-LPT-ALX-003 EID-LPT-ALX-004 EID-LPP3-ALX-001

GPCH8501A

Abstract: GPCH8501 Technology Inc. PAGE 2 Jan. 29, 2008 AN0036 GPCH8501A (OTP) Design Guideline JAN. 29, 2008 3 , Technology Inc. PAGE 3 Jan. 29, 2008 AN0036 GPCH8501A (OTP) Design Guideline JAN. 29, 2008 4 , AN0036 GPCH8501A (OTP) Design Guideline JAN. 29, 2008 GPCH8501A (OTP) Design Guideline Mask , Jan. 29, 2008 AN0036 GPCH8501A (OTP) Design Guideline JAN. 29, 2008 2 Electrical , . © Generalplus Technology Inc. PAGE 4 Jan. 29, 2008 AN0036 GPCH8501A (OTP) Design Guideline JAN. 29
Generalplus Technology
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GPCH8512A GPCH8501 gpy0030a GPCH8 gpch8001a generalplus GPCH5801A 512KB GPCH8001A/GPCH8501A 01/GPCH8501A MODE24B

wr1500 55

Abstract: GLW1500 ) 102.86 (2612) 108 (2743) 112 (2845) Advanced design o1 GUIDELine waveguide provides highest efficiency , B ro a d c a s t A n te n n a S y s te m s GUIDELine® Circular Waveguide GUIDELine low , waveguides. The unique design offers superior polarization stability and eliminates the need for on-site , every GUIDELine system. Low A ttenuation for High Efficiency GUIDELine circular waveguide is the , are shown on page 358. High Pow er Handling GUIDELine waveguide will handle television transmitter
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OCR Scan
GLW1500 wr1500 55 GLW1750 GLW1700 GLW1350

GLW-1350

Abstract: GLW1500 WR elbow configurations. Advanced design of GUIDELine waveguide provides highest efficiency and , Waveguide Transition. 3. Top Rigid Support 3a. GUIDELine Circular Waveguide Section with Bearing Flange 3b , GUIDELine® Circular Waveguide GUIDELine low attenuation waveguide is the premier transmission line , maximum power and has lower windload than rectangular waveguides. The unique design offers superior , and detailed installation instructions are provided with every GUIDELine system. Low Attenuation for
Andrew
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GLW-1350 waveguide transition ELBOW WR1500 wr -34 flange waveguide

gpes282a

Abstract: GPES250B2 GPES282A (OTP) Design Guideline APR. 18, 2008 3 Bonding PAD Although the pad number of GPES282A is , AN0042 GPES282A (OTP) Design Guideline APR. 18, 2008 GPES282A (OTP) Design Guideline Mask ROM , Technology Inc. PAGE 1 Apr. 18, 2008 AN0042 GPES282A (OTP) Design Guideline APR. 18, 2008 2 , @FCPU = 2.0MHz, No Load PAGE 2 Apr. 18, 2008 AN0042 GPES282A (OTP) Design Guideline APR. 18 , Technology Inc. PAGE 4 Apr. 18, 2008 AN0042 GPES282A (OTP) Design Guideline APR. 18, 2008 3.2
Generalplus Technology
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GPES250B2 GPES260B2 GPES270B1 GPES280B1 256KB GPES242A/GPES282A

AN10373

Abstract: pci pcb layout This document provides a practical guideline for incorporating the PCI Express PHY IC layout into the PCB design. AN10373 Philips Semiconductors PCI Express PHY PCB Layout Guideline Revision , Layout Guideline 8. Contents 1. 2. 2.1 2.2 2.2.1 2.2.2 2.2.3 2.2.4 2.3 2.4 2.5 2.6 2.7 3 , AN10373 PCI Express PHY PCB Layout Guideline Rev. 01 - 30 April 2005 Application note , AN10373 Philips Semiconductors PCI Express PHY PCB Layout Guideline 1. Introduction This
Philips Semiconductors
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pci pcb layout

TB-2082

Abstract: TB208 © Amphenol Corporation 2011 · All rights reserved Page 3 of 31 DFM and SMT Assembly Guideline 2.0 , DFM and SMT Assembly Guideline 3.0 Design Requirements 3.1 NeXLev Solder Joint Definition ­ , AMPHENOL TCS TB-2082 DFM and SMT Assembly Guideline Revision "F" Specification Revision , Update stencil design, JEDEC tray info, add weight table & GenRad ref, delete AirVac detail. Revised in , Assembly Guideline Table of Contents 1.0 DFM Guideline Introduction 1.1 Scope 1.2 Purpose 1.3 Reference
Amphenol TCS
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TB208 470-2075-100 reballing 470-3105-100 programming smt machine tray matrix bga S0043 S0802 S1760

ftl specification

Abstract: packard bell Portable PC Camera '98 Design Guideline PORTABLE PC CAMERA IMAGE PROCESSING Figure 3. Portable PC , Portable PC Camera '98 Design Guideline Digital Camera Peripherals for Volume PC Platforms July 1997 Portable PC Camera '98 Design Guideline Intel would like to thank the following , reserved. 2 Portable PC Camera '98 Design Guideline CONTENTS PAGE EXECUTIVE OVERVIEW , Portable PC Camera '98 Design Guideline FIGURES FIGURE 1. PC IMAGING USAGE MODEL
Intel
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ftl specification packard bell rgb sensor camera dell INTEL sdk aztech TC42/WG18 1394TA

socket pga370

Abstract: pw268 Thermal Design Guideline for the Intel® Pentium® III Processor with 512 Kbytes L2 Cache at 1.26 , . 5 2.0 Design Guideline , .15 Design Guide 3 Contents Tables 1 2 3 4 FC-PGA2 Mechanical Dimensions , document. Design Guide Thermal Design Guideline for the Intel® Pentium® III Processor with 512 , low power PCB Watt 5 Thermal Design Guideline for the Intel® Pentium® III Processor with
Intel
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socket pga370 pw268 PGA370 T725 celeron socket 370 motherboard 49428
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